David Brownell [Wed, 16 Dec 2009 22:17:31 +0000 (14:17 -0800)]
stellaris: avoid chip writes
Previously "reading" clock info (and part info) also, as a side
effect, wrote the flash timing register. Instead, be more safe:
"reading" should only read. Write paths still refresh timing,
coping with changes the application code may have made.
Also rename the routine which sets flash timing, indicating what
it's really doing; it's got nothing to do with a "mode".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Øyvind Harboe [Tue, 15 Dec 2009 14:43:38 +0000 (15:43 +0100)]
server: server loop will exhaust data inputs before sleeping
By exhausting data on input, the performance will be more
consistent + the code more clearly distinguishes between
polling and processing. A test showed gdb packet load
performance go from ~1550kByte/s to 1650kBytes/s + being
more stable.
David Brownell [Tue, 15 Dec 2009 03:56:36 +0000 (19:56 -0800)]
ARM11: improved reset support
Teach ARM11 how to use:
- the new "reset-assert" event
- vector catch to implement "reset halt"
- use SRST more like other cores do
- ... including leaving post-SRST delays up to config scripts
This gives OMAP2420 the ability to reset, and doesn't seem to
cause new iMX31 problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Eric Wetzel [Mon, 14 Dec 2009 20:59:27 +0000 (15:59 -0500)]
stellaris: device IDs
I added the remaining devices and device IDs to stellaris.c, and
removed several devices that don't exist on the Stellaris web page.
Additionally, I found a few devices with duplicate IDs ... the DID1
Version Number for LM3Sxxx parts have DID1 Version = 0x0, and for
LM3Sxxxx have DID1 Version = 0x1. So I extended the comparison to
use the VER and FAM fields from DID1 also.
ID=0x33: LM3S812 (DID1v0) and LM3S2616 (DID1v1)
ID=0x39: LM3S808 (DID1v0) and LM3S2276 (DID1v1)
These are the parts I removed from the file for lack of documentation
(no data sheet to confirm part ID):
David Brownell [Sun, 13 Dec 2009 20:52:23 +0000 (12:52 -0800)]
target files shouldn't #include <target/...h>
Make these ".h" files adopt the same policy the ".c" files already
follow: don't use <subsystem/...h> syntax for private interfaces.
If we ever get reviewed/supported "public" interfaces they should
come exclusively from some include/... directory; that'll be the
time to switch to <...> syntax for any subsystem's own interfaces.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Sun, 13 Dec 2009 20:52:23 +0000 (12:52 -0800)]
target: further shrink Jim-awareness
Don't include <helper/jim.h> from target.h ... not everything
which touches targets needs to be able to talk to Jim. Plus,
most files include this header by another path.
Also, switch the affected files to use the classic sequence
for #included files: all <framework/headers.h> first, then
the "local_headers.h". This helps prevent growth of problematic
layering, by minimizing entanglement.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Fri, 11 Dec 2009 23:26:10 +0000 (15:26 -0800)]
ARM DPM: support updating HW breakpoints
Abstract the DPM breakpoint and watchpoint data structures to
have a shared core for housekeeping.
Abstract the code updating the watchpoint registers so that it
can be used to update breakpoint registers. Then do so, when
something has set up the breakpoint state used by this code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Fri, 11 Dec 2009 23:24:08 +0000 (15:24 -0800)]
ARM11: minor cleanup, mostly ITR comments
ITR register handling seemed to be giving me problems, so I updated
the comments to better say what the code is trying to do ... and to
note the preconditions (one of which seems to be an issue) as listed
in the ARM1136 TRM.
Also removed the unused "ARM11_TAP_DEFAULT" from the ITR scan code;
all the callers already specify an exit path, since this register
isn't usable with such vague semantics.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Thu, 10 Dec 2009 05:16:09 +0000 (21:16 -0800)]
stellaris: flash protection updates, minor fixes
Bugfix the read side of flash protection:
- read the right register(s)!
- handle more than 64K
- record the results in the right places
- don't display garbage.
Partially bugfix the write side:
- use 2KB lock regions instead of 1KB pages (!)
- validate input range
- don't try to _remove_ protection (it's write-once)
- #define values we'll need to commit writes.
- ... still doesn't handle pages over 64KB mark, or commit writes
And minor cleanup and fixes:
- get rid of some forward decls
- properly locate a doxygen comment
- fix some bad indentation
- remove superfluous #include
- add a new part ID (many are still missing)
- make the downloaded algorithm code be read-only
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Tue, 8 Dec 2009 21:09:38 +0000 (13:09 -0800)]
target: remove more exit() calls
These were all basically "can't happen" cases ... like having
state be corrupted by an alpha particle after the previous check
for whether a value was in-range.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Tue, 8 Dec 2009 21:06:41 +0000 (13:06 -0800)]
target: move 'extern' decls to *.h files
The exception being declarations for drivers. Those should
be split out in some clean way -- like driver add/remove calls
made by initialization code -- but that's for another day.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Øyvind Harboe [Fri, 4 Dec 2009 15:00:43 +0000 (16:00 +0100)]
minidriver: fix inline capability of minidriver
Low latency low CPU processing power systems(embedded)
will benefit greatly from being able to inline certain
jtag_add_xxx() fn's. The trick is that this has to be
done in such a way as to allow implementing an OpenOCD
API with a shared library(eventually) on a PC hosted
OpenOCD.
David Brownell [Tue, 8 Dec 2009 02:14:46 +0000 (18:14 -0800)]
ARM: cope with stupidheaded compiler
Some versions of GCC don't understand that if you mask with 0x3
then have cases 0-3, it's not possible for a variable assigned in
all those branches to have no value at end-of-case. Feh.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 22:55:08 +0000 (14:55 -0800)]
ARM: list number of HW breakpoints/watchpoints
When starting up, say how many hardware breakpoints and watchpoints
are available on various targets.
This makes it easier to tell GDB how many of those resources exist.
Its remote protocol currently has no way to ask OpenOCD for that
information, so it must configured by hand (or not at all).
Update the docs to mention this; remove obsolete "don't do this" info.
Presentation of GDB setup information is still a mess, but at least
it calls out the three components that need setup.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 22:55:08 +0000 (14:55 -0800)]
target: add debug_reason_name()
Provide and use debug_reason_name() instead of expecting targets
to call Jim_Nvp_value2name_simple(). Less dependency on Jim, and
the code becomes more clear too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 22:55:08 +0000 (14:55 -0800)]
ARM: don't clone arm_arch_state() code
Have various ARM cores delegate to arm_arch_state() to display
basic information, instead of duplicating that logic.
This shrinks the code, makes them all report when semihosting
is active, and highlights which data are specific to this core.
(Like ARM720 not having separate instruction and data caches.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 22:55:07 +0000 (14:55 -0800)]
User's Guide: add quickie setup notes
Add a brief "setup with no customization" note showing the
how easily things can work if standard OpenOCD config scripts
already exist. We've had some new users comment that this
information is needlessly hard to find, so that starting to
use OpenOCD is more difficult than it should be.
Plus describe a few other issues that come up when setting
up an OpenOCD server.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 22:54:13 +0000 (14:54 -0800)]
ARM: use <target/arm.h> not armv4_5.h
Move most declarations in <target/armv4_5.h> to <target/arm.h>
and update users.
What's left in the older file is stuff that I think should be
removed ... the old register cache access stuff, which makes it
awkward to support microcontroller profile (Cortex-M) cores.
The armv4_5_run_algorithm() declaration was moved too, even
though it's not yet as generic as it probably ought to be.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 22:54:12 +0000 (14:54 -0800)]
ARM: move opcode macros to <target/arm_opcodes.h>
Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.
Removed duplicate opcodes from that v7m/Thumb2 set. Protected
a few macro argument references by adding missing parentheses.
Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 22:54:12 +0000 (14:54 -0800)]
ARM: remove mrc_opcode(), use MRC() or MCR()
Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where
arm*20t should have used it, ARMV4_5_MCR() instead.
Basically, *writing* coprocessor registers shouldn't have
used the *read* opcode ... and both should stick to standard
opcode constructors, not rearranging parameter sequence any
more than already needed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 7 Dec 2009 19:57:46 +0000 (11:57 -0800)]
OMAP2420: define reset-assert event
Behave like OMAP3530: force global software reset. Given the
patch to teach ARM11 how to use these events, and use VCR to
catch the reset vector, this works better than either the
current reset logic or than using SRST.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch [Mon, 7 Dec 2009 04:19:18 +0000 (20:19 -0800)]
allow 'flash_banks' command to give GDB output
The 'flash banks' command produces a list that needs to be formatted
properly for GDB's 'mem info' to work properly. The flash_banks TCL
wrapper provided this formatting, but wrappers no longer work for
second-level commands as they did in the past. With this patch,
the 'flash_banks' command can be used with the new command syntax
and display the required information.
Zachary T Welch [Sat, 5 Dec 2009 06:04:37 +0000 (22:04 -0800)]
rename nand.h to flash//nand/core.h
Rename nand.h as flash/nand/core.h, chase consumers. The public APIs
need to be sorted out with imp.h, but this allows other changes to
begin improving the separation between policy and mechanism.
Moves #include <target/target.h> and #include "driver.h" into the
internal headers or source files, removing it from <flash/nand/core.h>.
Zachary T Welch [Sat, 5 Dec 2009 02:24:14 +0000 (18:24 -0800)]
split NAND driver handling into nand/driver.[ch]
This work parallels the NOR directory, encapsulating the NAND drivers
into a separate file. This takes an extra step by encapsulating the
type of data structure used to manage the drivers, allowing it to be
changed from an array to a dynamic list in the future.
Zachary T Welch [Sat, 5 Dec 2009 00:07:47 +0000 (16:07 -0800)]
split flash.h into into flash/nor/*.h
Move the bulk of the flash.h file into flash/nor/core.h, leaving an
empty husk that will be removed in the next patch.
The NOR driver structure is an implementation detail, so move it into
its own private header file <flash/nor/driver.h> along with helper
declaration for finding them by name.
Zachary T Welch [Fri, 4 Dec 2009 12:01:45 +0000 (04:01 -0800)]
move more nor flash implementation details
Splits the exec mode commands out of flash.c into the flash/nor/ files.
The routines used by these high-level commands are moved into nor/core.c,
with their internal declarations placed in nor/imp.h.
David Brownell [Sat, 5 Dec 2009 00:51:48 +0000 (16:51 -0800)]
ARM: semihosting entry cleanup
Clean up arm_semihosting() entry a bit, comment some issues and just
which SVC opcodes are getting intercepted. Microcontroller profile
cores will need a new entry, since they use BKPT instead (and don't
have either SVC mode or an SPSR register).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch [Fri, 4 Dec 2009 00:47:49 +0000 (16:47 -0800)]
add flash/nor/{tcl.c,imp.h} from flash/flash.c
Moves the top-level 'flash' command handlers into flash/nor/tcl.c,
with flash/nor/imp.h providing an internal implementation header
to share non-public API components.
Zachary T Welch [Fri, 4 Dec 2009 00:25:51 +0000 (16:25 -0800)]
separate Jim from jtag/core.c
After previous efforts, only one Jim routine remained in jtag/core.c,
and moving it to jtag/tcl.c painlessly finishes separating these layers.
The headers need separating, but the implementation is clean.
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