ARM: cope with stupidheaded compiler

Some versions of GCC don't understand that if you mask with 0x3
then have cases 0-3, it's not possible for a variable assigned in
all those branches to have no value at end-of-case.  Feh.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index e76e3859018e12a9d64a1680e40d2d5fac9c3ef5..407d2904a44df9ff99911b0d62e92d99c93e496a 100644 (file)
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -135,7 +135,7 @@ static int evaluate_srs(uint32_t opcode,
                uint32_t address, struct arm_instruction *instruction)
 {
        const char *wback = (opcode & (1 << 21)) ? "!" : "";
-       const char *mode;
+       const char *mode = "";
 
        switch ((opcode >> 23) & 0x3) {
        case 0:
@@ -143,7 +143,6 @@ static int evaluate_srs(uint32_t opcode,
                break;
        case 1:
                /* "IA" is default */
-               mode = "";
                break;
        case 2:
                mode = "DB";