Lukasz Majewski [Tue, 8 Oct 2013 12:30:37 +0000 (14:30 +0200)]
usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
The s3c udc driver sends data in a max packet size. Therefore the dcache
invalidate range shall be equal to max packet, not the entire
DMA_BUFFER_SIZE.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
usb: gadget: ether: return error from rx_submit if no request
This prevents a crash if tftpboot is given a bad filename.
rx_req will be released by eth_reset_config
which is called by eth_disconnect,
which is called using the .disconnect member of usb_gadget_driver by mv_pullup in mv_udc
which is called using the .pullup member of usb_gadget_ops by usb_gadget_disconnect
which is called by usb_eth_halt
which is called using the .halt member of eth_device by eth_halt
which is called by TftpHandler when TFTP_ERR_FILE_NOT_FOUND or TFTP_ERR_ACCESS_DENIED occurs
I trigger this with the following commands
setenv ipaddr 10.0.0.2 && setenv netmask 255.255.255.0 && setenv serverip 10.0.0.1
setenv usbnet_devaddr 00:11:22:33:44:55 && setenv usbnet_hostaddr 00:aa:bb:cc:dd:ee
setenv ethprime usb_ether && setenv ethact usb_ether && setenv ncip 10.0.0.1
tftpboot 10800000 10.0.0.1:missing_file
set wMaxPacketSize for full speed descriptors
fs_source_desc, fs_sink_desc to 64.
Full-speed bulk endpoint can have a maximum packet size of
8, 16, 32, or 64 bytes, so choice 64.
The hs_source_desc, hs_sink_desc, already have their wMaxPacketSize
set to 512. That is the only legal value for high speed bulk endpoints.
Strictly speaking, this patch is not needed because
usb_ep_autoconfig will call ep_matches which will
override wMaxPacketSize for BULK endpoints only with
the size associated with the endpoint setup by the udc driver.
But if you want to rely on this, you may as well combine the
full speed descriptor with the high speed descriptor to
minimize confusion.
Julius Werner [Sat, 14 Sep 2013 08:32:53 +0000 (14:02 +0530)]
exynos: dts: Add USB VBUS GPIOs to the device tree
This patch adds a new samsung,vbus-gpio parameter to the device tree, in
preparation of replacing the currently hardcoded VBUS GPIO mechanism in
exynos5-dt.c with a device tree controlled solution, just as it already
exists in the Linux kernel.
Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de>
Julius Werner [Sat, 14 Sep 2013 08:32:52 +0000 (14:02 +0530)]
exynos: usb: Switch USB VBUS GPIOs to be device tree configured
Some Exynos boards, such as the SMDK5250, control USB port power through
a GPIO pin. For now this had been hardcoded in the exynos5-dt board
file, but not all boards use the same pin, requiring local changes to
support different boards.
This patch moves the GPIO initialization into the USB host controller
drivers which they belong to, and uses the samsung,vbus-gpio parameter
in the device tree to configure it.
Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de>
temp: config: exynos5250: Enable xHCI support for Exynos5
This enables support for xHCI host controller on Exynos5
and further disables EHCI support, to make sure only one
host controller is enabled at a time, since right now
using two controllers at a time is not possible with
current usb core infrastructure.
Anyone who wants to enable EHCI support again needs to
enable CONFIG_USB_EHCI, CONFIG_USB_EHCI_EXYNOS once again
in exynos5-dt config.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
XHCI stack driver needs this to align buffers to
CacheLine boundary. So define the same to be '64'
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
Adding device node for xhci host controller to enable
usb 3.0 on exynos5250.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI
Adding required compatible string for xHCI host controller
as well as USB 3.0 PHY to enable dt support for usb 3.0 on
exynos5.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
arm: exynos: Add methods to control power to USB 3.0 PHY
Adding methods to turn on/off power to USB3.0 type PHY
as and when required by the controller.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
USB: XHCI: Add xHCI host controller support for Exynos5
This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
This adds stack layer for eXtensible Host Controller Interface
which facilitates use of USB 3.0 in host mode.
Adapting xHCI host controller driver in linux-kernel
by Sarah Sharp to needs in u-boot.
Initial porting from Linux kernel version 3.4, with following
top commit history of drivers/usb/host/xhci* : cf84055 xHCI: Cleanup isoc transfer ring when TD length mismatch found
This adds the basic xHCI host controller driver with bare minimum
features:
- Control/Bulk transfer support has been added with required
infrastructure for necessary xHC data structures.
- Stream protocol hasn't been supported yet.
- No support for quirky devices has been added.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
usb: Move 'bmRequestType' USB device request macros from EHCI header
Macros defining bmRequestType field of USB device request,
given in table 9.2 USB 2.0 spec, are rather generic macros
which can be further used by other Host controller stacks.
So moving them to usb_defs header.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
Michal Simek [Wed, 16 Oct 2013 07:06:32 +0000 (09:06 +0200)]
microblaze: Fix watchdog initialization
The patch:
"blackfin: Move blackfin watchdog driver out of the blackfin arch folder."
(sha1: e9a389a18477c1c57a0b30e9ea8f4d38c6e26e63)
changed hw_watchdog_init() prototype which didn't match
with Microblaze one.
This patch fixes the driver and Microblaze initialization.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Scott Wood [Tue, 15 Oct 2013 22:41:27 +0000 (17:41 -0500)]
mtd: fix warnings due to 64-bit partition support
commit 39ac34473f3c96e77cbe03a49141771ed1639486 ("cmd_mtdparts: use 64
bits for flash size, partition size & offset") introduced warnings
in a couple places due to printf formats or pointer casting.
This patch fixes the warnings pointed out here:
http://lists.denx.de/pipermail/u-boot/2013-October/164981.html
Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Tom Rini <trini@ti.com>
Bo Shen [Thu, 10 Oct 2013 05:07:37 +0000 (13:07 +0800)]
sf: probe: Add missing Atmel at25df321 flash
As the spi flash transfer to multiple parts, it is forgot to add
Atmel AT25DF321 spi flash support, which broken several Atmel EK
boards which this chip. So, add it
Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
The do_tftpb(), do_ext2load(), and do_get_fat() functions expect a valid
cmdtp. Passing in NULL is particularly bad in the do_tftpb() case,
because eventually boot_get_kernel() will be called with a NULL cmdtp:
Dan Murphy [Thu, 10 Oct 2013 13:54:23 +0000 (08:54 -0500)]
ARM: omap4-panda: Add MAC address creation for panda
Add a MAC address create based on the OMAP die ID registers.
Then poplulate the ethaddr enviroment variable so that the device
tree alias can be updated prior to boot.
Bo Shen [Tue, 8 Oct 2013 08:30:21 +0000 (16:30 +0800)]
env: dataflash: fix env_init issue
As the SPI controller is not initialized before env_init(), it causes
reading env in dataflash failed. So, although saveenv() successfully,
it shows warning information when reboot the system as following:
*** Warning - bad CRC, using default environment
Let the env_relocate() to check env CRC and import it.
Wolfgang Denk [Tue, 8 Oct 2013 19:53:45 +0000 (21:53 +0200)]
SPDX: document dual license notation
In [1] we discussed how we should deal with dual (or, more generally,
multiple) licensed files. Add this to Licenses/README so it's
properly documented.
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Add the word 'list' to the end of the line, per Stephen Warren's
feedback] Signed-off-by: Tom Rini <trini@ti.com>
Stephen Warren [Wed, 9 Oct 2013 20:28:09 +0000 (14:28 -0600)]
buildman: don't fail --list-toolchains when toolchains fail
When a toolchain invocation fails, an exception is thrown but not caught
which then aborts the entire toolchain detection process. To solve this,
request that exceptions not be thrown, since the toolchain init code
already error-checks the command result. This solves e.g.:
Change-Id: I579c72ab3b021e38b14132893c3375ea257c74f0 Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
(formatted to 80cols)
Andrew Murray [Sun, 29 Sep 2013 17:02:22 +0000 (18:02 +0100)]
usb: Prevent using reserved registers on DM36x usb
The musb driver defines and uses MUSB_CSR0_H_DIS_PING, however this
bit is reserved on the DM36x. Thus this patch ensures that the
reserved bit is not accesssed.
It has been observed that some USB devices will fail to enumerate
with errors such as 'error in inquiry' without this patch.
See http://www.ti.com/litv/pdf/sprufh9a for details.
Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Acked-by: Marek Vasut <marex@denx.de>
Tom Rini [Wed, 9 Oct 2013 14:59:33 +0000 (10:59 -0400)]
omap5_common: Re-work mmc boot to try SD and eMMC, correct root device
OMAP5 boards may have both eMMC (on MMC2) and an SD slot (on MMC1). We
Update the default bootcmd to match what happens on AM335x where we try
SD first, and then eMMC. In this case however, the hardware layout used
for powering both of these means that in the kernel eMMC shall be found
first as it is powered by a fixed regulator and SD found second as SD is
powered via the palmas which will result in deferred probing.
Tested-by: Aparna Balasubramanian <aparnab@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
Paul Burton [Wed, 4 Sep 2013 14:16:59 +0000 (15:16 +0100)]
cmd_ubi: add write.part command, to write a volume in multiple parts
This allows you to write data to an UBI volume when the amount of memory
available to write that data from is less than the total size of the
data. For example, you may split a root filesystem UBIFS image into
parts, provide the total size of the image to the first write.part
command and then use multiple write.part commands to write the
subsequent parts of the volume. This results in a sequence of commands
akin to:
Paul Burton [Wed, 4 Sep 2013 14:16:58 +0000 (15:16 +0100)]
cmd_ubi: use int64_t volume size for 'ubi create'
int64_t matches the bytes field in struct ubi_mkvol_req to which the
size is assigned. With the prior signed 32 bit integer, volumes were
restricted to being less than 2GiB in size.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stefan Roese <sr@denx.de>
Paul Burton [Wed, 4 Sep 2013 14:16:57 +0000 (15:16 +0100)]
cmd_mtdparts: use 64 bits for flash size, partition size & offset
This matches the 64 bit size in struct mtd_info and allows the mtdparts
command to function correctly with a flash >= 4GiB. Format specifiers
for size & offset are given the ll length, matching its use in
drivers/mtd in absence of something like inttypes.h/PRIx64.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stefan Roese <sr@denx.de>
Linux modified the MTD driver interface in commit edbc4540 (with the
same name as this commit). The effect is that calls to mtd_read will
not return -EUCLEAN if the number of ECC-corrected bit errors is below
a certain threshold, which defaults to the strength of the ECC. This
allows -EUCLEAN to stop indicating "some bits were corrected" and begin
indicating "a large number of bits were corrected, the data held in
this region of flash may be lost soon". UBI makes use of this and when
-EUCLEAN is returned from mtd_read it will move data to another block
of flash. Without adopting this interface change UBI on U-boot attempts
to move data between blocks every time a single bit is corrected using
the ECC, which is a very common occurance on some devices.
For some devices where bit errors are common enough, UBI can get stuck
constantly moving data around because each block it attempts to use has
a single bit error. This condition is hit when wear_leveling_worker
attempts to move data from one PEB to another in response to an
-EUCLEAN/UBI_IO_BITFLIPS error. When this happens ubi_eba_copy_leb is
called to perform the data copy, and after the data is written it is
read back to check its validity. If that read returns UBI_IO_BITFLIPS
(in response to an MTD -EUCLEAN) then ubi_eba_copy_leb returns 1 to
wear_leveling worker, which then proceeds to schedule the destination
PEB for erasure. This leads to erase_worker running on the PEB, and
following a successful erase wear_leveling_worker is called which
begins this whole cycle all over again. The end result is that (without
UBI debug output enabled) the boot appears to simply hang whilst in
reality U-boot busily works away at destroying a block of the NAND
flash. Debug output from this situation:
UBI DBG: ensure_wear_leveling: schedule scrubbing
UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083
UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 1027
UBI DBG: ubi_io_read: read 4096 bytes from PEB 1027:4096
UBI DBG: ubi_eba_copy_leb: copy LEB 0:0, PEB 1027 to PEB 4083
UBI DBG: ubi_eba_copy_leb: read 1040384 bytes of data
UBI DBG: ubi_io_read: read 1040384 bytes from PEB 1027:8192
UBI: fixable bit-flip detected at PEB 1027
UBI DBG: ubi_io_write_vid_hdr: write VID header to PEB 4083
UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:4096
UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 4083
UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:4096
UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:8192
UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:8192
UBI: fixable bit-flip detected at PEB 4083
UBI DBG: schedule_erase: schedule erasure of PEB 4083, EC 55, torture 0
UBI DBG: erase_worker: erase PEB 4083 EC 55
UBI DBG: sync_erase: erase PEB 4083, old EC 55
UBI DBG: do_sync_erase: erase PEB 4083
UBI DBG: sync_erase: erased PEB 4083, new EC 56
UBI DBG: ubi_io_write_ec_hdr: write EC header to PEB 4083
UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:0
UBI DBG: ensure_wear_leveling: schedule scrubbing
UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083
...
This patch adopts the interface change as in Linux commit edbc4540 in
order to avoid such situations. Given that none of the drivers under
drivers/mtd return -EUCLEAN, this should only affect those using
software ECC. I have tested that it works on a board which is
currently out of tree, but which I hope to be able to begin
upstreaming soon.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stefan Roese <sr@denx.de>
Tom Rini [Tue, 8 Oct 2013 15:09:17 +0000 (11:09 -0400)]
Revert "am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot."
Upon further inspection and review and chatting with kernel folks, what
happens here is that what mmcblk# a device gets is based on probe order.
So a system with an SD card inserted with place eMMC on mmcblk1, but
without an SD card, it will be on mmcblk0. So U-boot can only provide a
best guess. In this case, if no SD card is present, we would want to
pass mmcblk0p2 still. If an SD card is present, it woudl be able to
provide a uEnv.txt that would be loaded (even if the kernel is NOT
there) which can still update mmcroot variable.
Since SPI register access is so expensive, it is worth transferring data
a word at a time if we can. This complicates the driver unfortunately.
Use the byte-swapping feature to avoid having to convert to/from big
endian in software.
This change increases speed from about 2MB/s to about 4.5MB/s.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Accessing SPI registers is slow, but access to the FIFO level register
in particular seems to be extraordinarily expensive (I measure up to
600ns). Perhaps it is required to synchronise with the SPI byte output
logic which might run at 1/8th of the 40MHz SPI speed (just a guess).
Reduce access to this register by filling up and emptying FIFOs
more completely, rather than just one word each time around the inner
loop.
Since the rxfifo value will now likely be much greater that what we read
before we fill the txfifo, we only fill the txfifo halfway. This is
because if the txfifo is empty, but the rxfifo has data in it, then writing
too much data to the txfifo may overflow the rxfifo as data arrives.
This speeds up SPI flash reading from about 1MB/s to about 2MB/s on snow.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
For devices that need some time to react after a spi transaction
finishes, add the ability to set a delay.
Implement this as a delay on the first/next transaction to avoid
any delay in the fairly common case where a SPI transaction is
followed by other processing.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
exynos: Export timer_get_us() to get microsecond timer
This function, if implemented by the board, provides a microsecond
timer. The granularity may be larger than 1us if hardware does not
support this.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Wolfgang Denk [Sat, 5 Oct 2013 19:07:25 +0000 (21:07 +0200)]
Fix number base handling of "load" command
As documented, almost all U-Boot commands expect numbers to be entered
in hexadecimal input format. (Exception: for historical reasons, the
"sleep" command takes its argument in decimal input format.)
This rule was broken for the "load" command; for details please see
especially commits 045fa1e "fs: add filesystem switch libary,
implement ls and fsload commands" and 3f83c87 "fs: fix number base
behaviour change in fatload/ext*load". In the result, the load
command would always require an explicit "0x" prefix for regular
(i. e. base 16 formatted) input.
Change this to use the standard notation of base 16 input format.
While strictly speaking this is a change of the user interface, we
hope that it will not cause trouble. Stephen Warren comments (see
[1]):
I suppose you can change the behaviour if you want; anyone
writing "0x..." for their values presumably won't be
affected, and if people really do assume all values in U-Boot
are in hex, presumably nobody currently relies upon using
non-prefixed values with the generic load command, since it
doesn't work like that right now.
Adding the generated pin mux configuration by Preloader
Generator tool
Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Albert ARIBAUD [Mon, 23 Sep 2013 17:11:38 +0000 (19:11 +0200)]
omap1510inn: arm925t: remove support
omap1510inn is orphan and has been for years now.
Reove it and, as it was the only arm925t target,
also remove arm925t support.
Update doc/README.scrapyard accordingly.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Poddar, Sourav [Mon, 7 Oct 2013 10:23:01 +0000 (15:53 +0530)]
sf: Add memory mapped read support
Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.
This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".
This will enable the spi controller to do memory mapped configurations
if required.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
projects / u-boot / log