]> git.sur5r.net Git - u-boot/commit
arm: rmobile: r8a7791: Fix initialize L2 cache
authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Thu, 7 Aug 2014 23:41:15 +0000 (08:41 +0900)
committerNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Thu, 9 Oct 2014 05:45:03 +0000 (14:45 +0900)
commit237faf095fb43abbed6e40266ef7efccc8b9308b
tree4635d3f0042ce1ba74f2039199d302067f98d98e
parent7d835803640e743a60572b49a736370c75f9cb44
arm: rmobile: r8a7791: Fix initialize L2 cache

rmobile/lowlevel_init_ca15.S are common in r8a7790 and r8a7791 of
rmobile SoC. But L2 cache of r8a7791 does not use L2CTLR[5].
This adds fix to set L2CTLR [5] only when the r8a7790.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S