1 /******************************************************************************
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3 * @brief CMSIS-DAP Definitions
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8 * Copyright (C) 2012 ARM Limited. All rights reserved.
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11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
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12 * processor based microcontrollers.
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15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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18 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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19 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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21 ******************************************************************************/
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28 #define ID_DAP_Info 0x00
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29 #define ID_DAP_LED 0x01
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30 #define ID_DAP_Connect 0x02
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31 #define ID_DAP_Disconnect 0x03
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32 #define ID_DAP_TransferConfigure 0x04
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33 #define ID_DAP_Transfer 0x05
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34 #define ID_DAP_TransferBlock 0x06
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35 #define ID_DAP_TransferAbort 0x07
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36 #define ID_DAP_WriteABORT 0x08
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37 #define ID_DAP_Delay 0x09
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38 #define ID_DAP_ResetTarget 0x0A
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39 #define ID_DAP_SWJ_Pins 0x10
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40 #define ID_DAP_SWJ_Clock 0x11
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41 #define ID_DAP_SWJ_Sequence 0x12
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42 #define ID_DAP_SWD_Configure 0x13
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43 #define ID_DAP_JTAG_Sequence 0x14
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44 #define ID_DAP_JTAG_Configure 0x15
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45 #define ID_DAP_JTAG_IDCODE 0x16
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47 // DAP Vendor Command IDs
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48 #define ID_DAP_Vendor0 0x80
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49 #define ID_DAP_Vendor1 0x81
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50 #define ID_DAP_Vendor2 0x82
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51 #define ID_DAP_Vendor3 0x83
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52 #define ID_DAP_Vendor4 0x84
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53 #define ID_DAP_Vendor5 0x85
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54 #define ID_DAP_Vendor6 0x86
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55 #define ID_DAP_Vendor7 0x87
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56 #define ID_DAP_Vendor8 0x88
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57 #define ID_DAP_Vendor9 0x89
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58 #define ID_DAP_Vendor10 0x8A
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59 #define ID_DAP_Vendor11 0x8B
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60 #define ID_DAP_Vendor12 0x8C
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61 #define ID_DAP_Vendor13 0x8D
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62 #define ID_DAP_Vendor14 0x8E
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63 #define ID_DAP_Vendor15 0x8F
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64 #define ID_DAP_Vendor16 0x90
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65 #define ID_DAP_Vendor17 0x91
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66 #define ID_DAP_Vendor18 0x92
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67 #define ID_DAP_Vendor19 0x93
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68 #define ID_DAP_Vendor20 0x94
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69 #define ID_DAP_Vendor21 0x95
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70 #define ID_DAP_Vendor22 0x96
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71 #define ID_DAP_Vendor23 0x97
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72 #define ID_DAP_Vendor24 0x98
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73 #define ID_DAP_Vendor25 0x99
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74 #define ID_DAP_Vendor26 0x9A
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75 #define ID_DAP_Vendor27 0x9B
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76 #define ID_DAP_Vendor28 0x9C
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77 #define ID_DAP_Vendor29 0x9D
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78 #define ID_DAP_Vendor30 0x9E
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79 #define ID_DAP_Vendor31 0x9F
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81 #define ID_DAP_Invalid 0xFF
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85 #define DAP_ERROR 0xFF
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88 #define DAP_ID_VENDOR 1
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89 #define DAP_ID_PRODUCT 2
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90 #define DAP_ID_SER_NUM 3
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91 #define DAP_ID_FW_VER 4
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92 #define DAP_ID_DEVICE_VENDOR 5
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93 #define DAP_ID_DEVICE_NAME 6
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94 #define DAP_ID_CAPABILITIES 0xF0
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95 #define DAP_ID_PACKET_COUNT 0xFE
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96 #define DAP_ID_PACKET_SIZE 0xFF
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99 #define DAP_LED_DEBUGGER_CONNECTED 0
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100 #define DAP_LED_TARGET_RUNNING 1
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103 #define DAP_PORT_AUTODETECT 0 // Autodetect Port
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104 #define DAP_PORT_DISABLED 0 // Port Disabled (I/O pins in High-Z)
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105 #define DAP_PORT_SWD 1 // SWD Port (SWCLK, SWDIO) + nRESET
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106 #define DAP_PORT_JTAG 2 // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET
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109 #define DAP_SWJ_SWCLK_TCK 0 // SWCLK/TCK
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110 #define DAP_SWJ_SWDIO_TMS 1 // SWDIO/TMS
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111 #define DAP_SWJ_TDI 2 // TDI
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112 #define DAP_SWJ_TDO 3 // TDO
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113 #define DAP_SWJ_nTRST 5 // nTRST
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114 #define DAP_SWJ_nRESET 7 // nRESET
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116 // DAP Transfer Request
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117 #define DAP_TRANSFER_APnDP (1<<0)
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118 #define DAP_TRANSFER_RnW (1<<1)
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119 #define DAP_TRANSFER_A2 (1<<2)
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120 #define DAP_TRANSFER_A3 (1<<3)
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121 #define DAP_TRANSFER_MATCH_VALUE (1<<4)
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122 #define DAP_TRANSFER_MATCH_MASK (1<<5)
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124 // DAP Transfer Response
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125 #define DAP_TRANSFER_OK (1<<0)
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126 #define DAP_TRANSFER_WAIT (1<<1)
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127 #define DAP_TRANSFER_FAULT (1<<2)
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128 #define DAP_TRANSFER_ERROR (1<<3)
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129 #define DAP_TRANSFER_MISMATCH (1<<4)
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132 // Debug Port Register Addresses
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133 #define DP_IDCODE 0x00 // IDCODE Register (SW Read only)
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134 #define DP_ABORT 0x00 // Abort Register (SW Write only)
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135 #define DP_CTRL_STAT 0x04 // Control & Status
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136 #define DP_WCR 0x04 // Wire Control Register (SW Only)
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137 #define DP_SELECT 0x08 // Select Register (JTAG R/W & SW W)
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138 #define DP_RESEND 0x08 // Resend (SW Read Only)
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139 #define DP_RDBUFF 0x0C // Read Buffer (Read Only)
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142 #define JTAG_ABORT 0x08
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143 #define JTAG_DPACC 0x0A
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144 #define JTAG_APACC 0x0B
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145 #define JTAG_IDCODE 0x0E
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146 #define JTAG_BYPASS 0x0F
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148 // JTAG Sequence Info
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149 #define JTAG_SEQUENCE_TCK 0x3F // TCK count
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150 #define JTAG_SEQUENCE_TMS 0x40 // TMS value
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151 #define JTAG_SEQUENCE_TDO 0x80 // TDO capture
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154 #include <stddef.h>
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155 #include <stdint.h>
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157 // DAP Data structure
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159 uint8_t debug_port; // Debug Port
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160 uint8_t fast_clock; // Fast Clock Flag
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161 uint32_t clock_delay; // Clock Delay
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162 struct { // Transfer Configuration
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163 uint8_t idle_cycles; // Idle cycles after transfer
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164 uint16_t retry_count; // Number of retries after WAIT response
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165 uint16_t match_retry; // Number of retries if read value does not match
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166 uint32_t match_mask; // Match Mask
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169 struct { // SWD Configuration
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170 uint8_t turnaround; // Turnaround period
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171 uint8_t data_phase; // Always generate Data Phase
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174 #if (DAP_JTAG != 0)
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175 struct { // JTAG Device Chain
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176 uint8_t count; // Number of devices
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177 uint8_t index; // Device index (device at TDO has index 0)
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178 #if (DAP_JTAG_DEV_CNT != 0)
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179 uint8_t ir_length[DAP_JTAG_DEV_CNT]; // IR Length in bits
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180 uint16_t ir_before[DAP_JTAG_DEV_CNT]; // Bits before IR
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181 uint16_t ir_after [DAP_JTAG_DEV_CNT]; // Bits after IR
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187 extern DAP_Data_t DAP_Data; // DAP Data
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188 extern volatile uint8_t DAP_TransferAbort; // Transfer Abort Flag
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192 extern void SWJ_Sequence (uint32_t count, uint8_t *data);
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193 extern void JTAG_Sequence (uint32_t info, uint8_t *tdi, uint8_t *tdo);
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194 extern void JTAG_IR (uint32_t ir);
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195 extern uint32_t JTAG_ReadIDCode (void);
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196 extern void JTAG_WriteAbort (uint32_t data);
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197 extern uint8_t JTAG_Transfer (uint32_t request, uint32_t *data);
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198 extern uint8_t SWD_Transfer (uint32_t request, uint32_t *data);
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200 extern void Delayms (uint32_t delay);
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202 extern uint32_t DAP_ProcessVendorCommand (uint8_t *request, uint8_t *response);
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204 extern uint32_t DAP_ProcessCommand (uint8_t *request, uint8_t *response);
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205 extern void DAP_Setup (void);
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207 // Configurable delay for clock generation
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208 #ifndef DELAY_SLOW_CYCLES
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209 #define DELAY_SLOW_CYCLES 3 // Number of cycles for one iteration
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211 static __forceinline void PIN_DELAY_SLOW (uint32_t delay) {
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218 // Fixed delay for fast clock generation
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219 #ifndef DELAY_FAST_CYCLES
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220 #define DELAY_FAST_CYCLES 0 // Number of cycles: 0..3
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222 static __forceinline void PIN_DELAY_FAST (void) {
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223 #if (DELAY_FAST_CYCLES >= 1)
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226 #if (DELAY_FAST_CYCLES >= 2)
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229 #if (DELAY_FAST_CYCLES >= 3)
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235 #endif /* __DAP_H__ */
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