Updated to use the new VIA register names.

diff --git a/libsrc/vic20/joy/vic20-ptvjoy.s b/libsrc/vic20/joy/vic20-ptvjoy.s
index bf0ff128effe046578383f17569f4afb7ede7895..496653e9d3d40cf06a12de08916eebfc5ca556be 100644 (file)
--- a/libsrc/vic20/joy/vic20-ptvjoy.s
+++ b/libsrc/vic20/joy/vic20-ptvjoy.s
@@ -40,7 +40,6 @@
 ; ------------------------------------------------------------------------
 ; Constants
 
-VIA1_PRB        := VIA1         ; User port register
 JOY_COUNT       = 3             ; Number of joysticks we support
 
 
@@ -91,13 +90,13 @@ joy1:   lda     #$7F            ; mask for VIA2 JOYBIT: sw3
 
         ldy     VIA2_DDRB       ; remember the date of DDRB
         sta     VIA2_DDRB       ; set JOYBITS on this VIA for input
-        lda     VIA2_JOY        ; read JOYBIT: sw3
+        lda     VIA2_PB         ; read JOYBIT: sw3
         sty     VIA2_DDRB       ; restore the state of DDRB
         asl                     ; Shift sw3 into carry
 
         ldy     VIA1_DDRA       ; remember the state of DDRA
         stx     VIA1_DDRA       ; set JOYBITS on this VIA for input
-        lda     VIA1_JOY        ; read JOYBITS: sw0,sw1,sw2,sw4
+        lda     VIA1_PA1        ; read JOYBITS: sw0,sw1,sw2,sw4
         sty     VIA1_DDRA       ; restore the state of DDRA
 
         cli                     ; necessary?
@@ -127,9 +126,9 @@ joy2:   lda     #%10000000      ; via port B Data-Direction
         bne     joy3
 
         lda     #$80            ; via port B read/write
-        sta     VIA1_PRB        ; (output one at PB7)
+        sta     VIA1_PB         ; (output one at PB7)
 
-        lda     VIA1_PRB        ; via port B read/write
+        lda     VIA1_PB         ; via port B read/write
         and     #$1F            ; get bit 4-0 (PB4-PB0)
         eor     #$1F
         rts
@@ -137,13 +136,13 @@ joy2:   lda     #%10000000      ; via port B Data-Direction
 ; Read joystick 3
 
 joy3:   lda     #$00            ; via port B read/write
-        sta     VIA1_PRB        ; (output zero at PB7)
+        sta     VIA1_PB         ; (output zero at PB7)
 
-        lda     VIA1_PRB        ; via port B read/write
+        lda     VIA1_PB         ; via port B read/write
         and     #$0F            ; get bit 3-0 (PB3-PB0)
         sta     tmp1            ; joy 4 directions
 
-        lda     VIA1_PRB        ; via port B read/write
+        lda     VIA1_PB         ; via port B read/write
         and     #%00100000      ; get bit 5 (PB5)
         lsr
         ora     tmp1

diff --git a/libsrc/vic20/joy/vic20-stdjoy.s b/libsrc/vic20/joy/vic20-stdjoy.s
index e5539c65355dc3c556329ef7b6a7b4719c49afeb..ee8dc93d73d5dae96a643a84c63cf7b4960eab31 100644 (file)
--- a/libsrc/vic20/joy/vic20-stdjoy.s
+++ b/libsrc/vic20/joy/vic20-stdjoy.s
@@ -90,13 +90,13 @@ READ:   lda     #$7F            ; mask for VIA2 JOYBIT: sw3
 
         ldy     VIA2_DDRB       ; remember the date of DDRB
         sta     VIA2_DDRB       ; set JOYBITS on this VIA for input
-        lda     VIA2_JOY        ; read JOYBIT: sw3
+        lda     VIA2_PB         ; read JOYBIT: sw3
         sty     VIA2_DDRB       ; restore the state of DDRB
         asl                     ; Shift sw3 into carry
 
         ldy     VIA1_DDRA       ; remember the state of DDRA
         stx     VIA1_DDRA       ; set JOYBITS on this VIA for input
-        lda     VIA1_JOY        ; read JOYBITS: sw0,sw1,sw2,sw4
+        lda     VIA1_PA1        ; read JOYBITS: sw0,sw1,sw2,sw4
         sty     VIA1_DDRA       ; restore the state of DDRA
 
         cli                     ; necessary?