Cleaned up comments in Atari 8-bit headers.
Internal keycodes (POKEY's KBCODE) were already #defined in atari.h,
so didn't need a whole new set in _pokey.h.
/* */
/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
/* 24-Jan-2011: Christian Krueger: Added defines for Antic instruction set */
-/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: More defines for registers */
+/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: More defines for registers */
/* */
/* */
/* This software is provided 'as-is', without any expressed or implied */
#ifndef __ANTIC_H
#define __ANTIC_H
-/* Define a structure with the ANTIC coprocessor's register offsets */
+/*****************************************************************************/
+/* Define a structure with the ANTIC coprocessor's register offsets */
+/*****************************************************************************/
+
struct __antic {
unsigned char dmactl; /* (W) direct memory access control */
unsigned char chactl; /* (W) character mode control */
};
-/* DMACTL register options */
+/*****************************************************************************/
+/* DMACTL register options */
+/*****************************************************************************/
+
/* Initialized to 0x22: DMA fetch, normal playfield, no PMG DMA, double-line PMGs */
/* Playfield modes: */
#define DMACTL_DMA_FETCH 0x20
-/* CHACTL register options */
+/*****************************************************************************/
+/* CHACTL register options */
+/*****************************************************************************/
+
/* Initialized to 2 (CHACTL_CHAR_NORMAL | CHACTL_INV_PRESENT) */
/* Inverted (upside-down) characters */
#define CHACTL_INV_PRESENT 0x02 /* chars with high-bit are reverse-video */
-/* Register bits for NMIEN (enabling interrupts)
-** and NMIST (determining the cause for the NMI interrupt)
-*/
+/*****************************************************************************/
+/* Values for NMIEN (enabling interrupts) & NMIST (cause for the interrupt) */
+/*****************************************************************************/
-#define NMIEN_DLI 0x80
/* Display List Interrupts
** Called on a modeline when "DL_DLI" bit is set the ANTIC instruction,
** and jumps through VDSLST vector.
*/
+#define NMIEN_DLI 0x80
-#define NMIEN_VBI 0x40
/* Vertical Blank Interrupt
** Called during every vertical blank; see SYSVBV, VVBLKI, CRITIC, and VVBLKD,
** as well as the SETVBV routine.
*/
+#define NMIEN_VBI 0x40
-#define NMIEN_RESET 0x20
/* [Reset] key pressed */
+#define NMIEN_RESET 0x20
-/* ANTIC instruction set */
+/*****************************************************************************/
+/* ANTIC instruction set */
+/*****************************************************************************/
/* Absolute instructions (non mode lines) */
#define DL_JMP ((unsigned char) 1)
#define DL_BLK7 ((unsigned char) 96)
#define DL_BLK8 ((unsigned char) 112)
+
/* Absolute instructions (mode lines) */
-/* Note: Actual width varies (e.g., 40 vs 32 vs 48) depending on normal vs narrow vs wide (overscan) playfield setting; see DMACTL */
+
+/* Note: Actual width varies (e.g., 40 vs 32 vs 48) depending on
+** normal vs narrow vs wide (overscan) playfield setting; see DMACTL
+*/
/* Character modes (text, tile graphics, etc.) */
-#define DL_CHR40x8x1 ((unsigned char) 2) /* monochrome, 40 character & 8 scanlines per mode line (aka Atari BASIC GRAPHICS 0 via OS's CIO routines) */
-#define DL_CHR40x10x1 ((unsigned char) 3) /* monochrome, 40 character & 10 scanlines per mode line (like GR. 0, with descenders) */
-#define DL_CHR40x8x4 ((unsigned char) 4) /* colour, 40 character & 8 scanlines per mode line (GR. 12) */
-#define DL_CHR40x16x4 ((unsigned char) 5) /* colour, 40 character & 16 scanlines per mode line (GR. 13) */
-#define DL_CHR20x8x2 ((unsigned char) 6) /* colour (duochrome per character), 20 character & 8 scanlines per mode line (GR. 1) */
-#define DL_CHR20x16x2 ((unsigned char) 7) /* colour (duochrome per character), 20 character & 16 scanlines per mode line (GR. 2) */
+
+/* monochrome, 40 character & 8 scanlines per mode line (aka Atari BASIC GRAPHICS 0 via OS's CIO routines) */
+#define DL_CHR40x8x1 ((unsigned char) 2)
+
+/* monochrome, 40 character & 10 scanlines per mode line (like GR. 0, with descenders) */
+#define DL_CHR40x10x1 ((unsigned char) 3)
+
+/* colour, 40 character & 8 scanlines per mode line (GR. 12) */
+#define DL_CHR40x8x4 ((unsigned char) 4)
+
+/* colour, 40 character & 16 scanlines per mode line (GR. 13) */
+#define DL_CHR40x16x4 ((unsigned char) 5)
+
+/* colour (duochrome per character), 20 character & 8 scanlines per mode line (GR. 1) */
+#define DL_CHR20x8x2 ((unsigned char) 6)
+
+/* colour (duochrome per character), 20 character & 16 scanlines per mode line (GR. 2) */
+#define DL_CHR20x16x2 ((unsigned char) 7)
+
/* Bitmap modes */
-#define DL_MAP40x8x4 ((unsigned char) 8) /* colour, 40 pixel & 8 scanlines per mode line (GR. 3) */
-#define DL_MAP80x4x2 ((unsigned char) 9) /* 'duochrome', 80 pixel & 4 scanlines per mode line (GR.4) */
-#define DL_MAP80x4x4 ((unsigned char) 10) /* colour, 80 pixel & 4 scanlines per mode line (GR.5) */
-#define DL_MAP160x2x2 ((unsigned char) 11) /* 'duochrome', 160 pixel & 2 scanlines per mode line (GR.6) */
-#define DL_MAP160x1x2 ((unsigned char) 12) /* 'duochrome', 160 pixel & 1 scanline per mode line (GR.14) */
-#define DL_MAP160x2x4 ((unsigned char) 13) /* 4 colours, 160 pixel & 2 scanlines per mode line (GR.7) */
-#define DL_MAP160x1x4 ((unsigned char) 14) /* 4 colours, 160 pixel & 1 scanline per mode line (GR.15) */
-#define DL_MAP320x1x1 ((unsigned char) 15) /* monochrome, 320 pixel & 1 scanline per mode line (GR.8) */
+
+/* colour, 40 pixel & 8 scanlines per mode line (GR. 3) */
+#define DL_MAP40x8x4 ((unsigned char) 8)
+
+/* 'duochrome', 80 pixel & 4 scanlines per mode line (GR.4) */
+#define DL_MAP80x4x2 ((unsigned char) 9)
+
+/* colour, 80 pixel & 4 scanlines per mode line (GR.5) */
+#define DL_MAP80x4x4 ((unsigned char) 10)
+
+/* 'duochrome', 160 pixel & 2 scanlines per mode line (GR.6) */
+#define DL_MAP160x2x2 ((unsigned char) 11)
+
+/* 'duochrome', 160 pixel & 1 scanline per mode line (GR.14) */
+#define DL_MAP160x1x2 ((unsigned char) 12)
+
+/* 4 colours, 160 pixel & 2 scanlines per mode line (GR.7) */
+#define DL_MAP160x2x4 ((unsigned char) 13)
+
+/* 4 colours, 160 pixel & 1 scanline per mode line (GR.15) */
+#define DL_MAP160x1x4 ((unsigned char) 14)
+
+/* monochrome, 320 pixel & 1 scanline per mode line (GR.8) */
+#define DL_MAP320x1x1 ((unsigned char) 15)
+
/* Equivalents, for people familiar with Atari 8-bit OS */
+
#define DL_GRAPHICS0 DL_CHR40x8x1
#define DL_GRAPHICS1 DL_CHR20x8x2
#define DL_GRAPHICS2 DL_CHR20x16x2
#define DL_LMS(x) ((unsigned char)((x) | 64)) /* Load Memory Scan (next two bytes must be the LSB/MSB of the data to load) */
/* General modifier */
-#define DL_DLI(x) ((unsigned char)((x) | 128)) /* enable Display List Interrupt on this mode line; requires NMIEN be set to enable DLIs */
+#define DL_DLI(x) ((unsigned char)((x) | 128)) /* enable Display List Interrupt on this mode line */
/* End of _antic.h */
/* */
/* */
/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
-/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: More defines for registers */
+/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: More defines for registers */
/* */
/* */
/* This software is provided 'as-is', without any expressed or implied */
#ifndef __GTIA_H
#define __GTIA_H
-/* Define a structure with the GTIA register offsets for write (W) */
+/*****************************************************************************/
+/* Define a structure with the GTIA register offsets for write (W) */
+/*****************************************************************************/
+
struct __gtia_write {
unsigned char hposp0; /* 0x00: horizontal position of player 0 */
unsigned char hposp1; /* 0x01: horizontal position of player 1 */
};
-/* Values for SIZEP0-SIZEP3 and SIZEM registers: */
+/*****************************************************************************/
+/* (W) Values for SIZEP0-SIZEP3 and SIZEM registers: */
+/*****************************************************************************/
+
#define PMG_SIZE_NORMAL 0x0 /* one color clock per pixel */
#define PMG_SIZE_DOUBLE 0x1 /* two color clocks per pixel */
#define PMG_SIZE_QUAD 0x2 /* four color clocks per pixel */
** Bitwise OR (|) with 0x00 (darkest) through 0x0F (lightest) (only even values are unique)
*/
-/* PRIOR register values */
+
+/*****************************************************************************/
+/* (W) PRIOR register values */
+/*****************************************************************************/
#define PRIOR_P03_PF03 0x01 /* Players 0-3, then Playfields 0-3, then background */
#define PRIOR_P01_PF03_P23 0x02 /* Players 0-1, then Playfields 0-3, then Players 2-3, then background */
#define PRIOR_5TH_PLAYER 0x10 /* Four missiles combine to be a 5th player (uses COLPF3) */
-#define PRIOR_OVERLAP_3RD_COLOR 0x20 /* Overlap of players result in a 3rd color */
-/* Overlap of players 0 & 1 and of players 2 & 3 results in a third color,
-** the logical OR of the two players' colors;
-** Other overlaps (e.g., players 0 and 2) result in black (0x00).
+/* Causes overlap of players 0 & 1 and of players 2 & 3 to result in a third color,
+** the logical OR of the two players' colors, and other overlaps (e.g., players 0 and 2)
+** to result in black (0x00).
*/
+#define PRIOR_OVERLAP_3RD_COLOR 0x20
+
+
+/*****************************************************************************/
+/* (W) GTIA special graphics mode options for GPRIOR */
+/*****************************************************************************/
-/* GTIA special graphics mode options */
/* Pixels are 2 color clocks wide, and one scanline tall
** (so 80x192 in normal playfield width).
** May be used with both bitmap and character modelines.
*/
-#define PRIOR_GFX_MODE_9 0x40
/* 16 shade shades of the background (COLBK) hue;
** Note: brightnesses other than 0 (darkest) in COLBK cause additional effects
*/
+#define PRIOR_GFX_MODE_9 0x40
-#define PRIOR_GFX_MODE_10 0x80
/* 9 color palette mode;
** COLPM0 (acts as background) thru COLPM3, followed by COLPF0 thru COLPF3, and COLBK
*/
+#define PRIOR_GFX_MODE_10 0x80
-#define PRIOR_GFX_MODE_11 0xC0
/* 16 hues of the background (COLBK) brightness;
** Note: hues other than 0 (greys) in COLBK caus additional effects
*/
+#define PRIOR_GFX_MODE_11 0xC0
-/* VDELAY register values */
+/*****************************************************************************/
+/* (W) VDELAY register values */
+/*****************************************************************************/
#define VDELAY_MISSILE0 0x01
#define VDELAY_MISSILE1 0x02
#define VDELAY_PLAYER3 0x80
-/* GRACTL register values */
+/*****************************************************************************/
+/* (W) GRACTL register values */
+/*****************************************************************************/
#define GRACTL_MISSLES 0x01 /* enable missiles */
#define GRACTL_PLAYERS 0x02 /* enable players */
-#define GRACTL_LATCH_TRIGGER_INPUTS 0x04
/* "Latch" triggers; once pressed, will give a continuous
** pressed input until this bit is cleared
*/
+#define GRACTL_LATCH_TRIGGER_INPUTS 0x04
-/* Define a structure with the GTIA register offsets for read (R) */
+/*****************************************************************************/
+/* Define a structure with the GTIA register offsets for read (R) */
+/*****************************************************************************/
+
struct __gtia_read {
unsigned char m0pf; /* 0x00: missile 0 to playfield collision */
unsigned char m1pf; /* 0x01: missile 1 to playfield collision */
};
-/* PAL register possible values */
+/*****************************************************************************/
+/* (R) PAL register possible values */
+/*****************************************************************************/
+
+/* Note: This only tells you whether the GTIA is PAL or NTSC; some NTSC
+** systems are modded with PAL ANTIC chips; testing VCOUNT limits can be
+** done to check for that. Seems like it's not possible to test for SECAM
+*/
#define TV_STD_PAL 0x1
#define TV_STD_NTSC 0xE
-/* Note: This only tells you whether the GTIA is PAL or NTSC; some NTSC systems are modded with PAL ANTIC chips; testing VCOUNT limits can be done to check for that */
-/* Note: Seems like it's not possible to test for SECAM */
-/* Reading console keys (Start, Select, Option) via CONSOL register: */
+/*****************************************************************************/
+/* Macros for reading console keys (Start/Select/Option) via CONSOL register */
+/*****************************************************************************/
#define CONSOL_START(x) !((unsigned char)((x) & 1)) /* true if Start pressed */
#define CONSOL_SELECT(x) !((unsigned char)((x) & 2)) /* true if Select pressed */
/* The Peripheral Interface Adapter (PIA) chip provides parallel I/O */
/* interfacing; it was used in Atari 400/800 and Commodore PET family of */
/* computers, for joystick and interrupts. */
-/* - Sources; various + Wikpedia article on "Peripheral Interface Adapter" */
+/* Sources; various + Wikpedia article on "Peripheral Interface Adapter". */
/* */
/* */
/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
-/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: Defines for registers */
+/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: Defines for registers */
/* */
/* */
/* This software is provided 'as-is', without any expressed or implied */
};
-/* PORTA and PORTB register bits */
+/*****************************************************************************/
+/* PORTA and PORTB register bits */
+/*****************************************************************************/
/* See also: "JOY_xxx_MASK" in "atari.h" */
** LED control (1200XL model only) register (read/write):
*/
-#define PORTB_OSROM 0x01
/* If set, the built-in OS is enabled, and occupies the address range $C000-$FFFF
** (except that the area $D000-$D7FF will only access the hardware registers.)
** If clear, RAM is enabled in this area (again, save for the hole.)
*/
+#define PORTB_OSROM 0x01
-#define PORTB_BASICROM 0x02
/* If set, RAM is enabled for the address range $A000-$BFFF.
** If clear, the built-in BASIC ROM is enabled at this address.
** And if there is a cartridge installed in the computer, it makes no difference.
*/
+#define PORTB_BASICROM 0x02
-#define PORTB_LED1 0x04
-#define PORTB_LED2 0x08
/* If set, the corresponding LED is turned off. If clear, the LED will be on.
** (1200XL only)
*/
+#define PORTB_LED1 0x04
+#define PORTB_LED2 0x08
/* On the XE series of computers, PORTB is a bank-selected memory control register (read/write): */
#define PORTB_BANKSELECT3 0x08
#define PORTB_BANKSELECT4 0x0C
-
-#define PORTB_BANKSWITCH_CPU 0x10
-#define PORTB_BANKSWITCH_ANTIC 0x20
/* If set, the CPU and/or ANTIC chip will access bank-switched memory mapped to the
** address range $4000-$7FFF.
** If clear, the CPU and/or ANTIC will see normal memory in this region.
*/
+#define PORTB_BANKSWITCH_CPU 0x10
+#define PORTB_BANKSWITCH_ANTIC 0x20
-
-#define PORTB_SELFTEST 0x80
/* If set, RAM is enabled for the address range $5000-$57FF.
** If clear, the self-test ROM (physically located at $D000-$D7FF, under the hardware registers)
** is remapped to this memory area.
*/
+#define PORTB_SELFTEST 0x80
-/* PACTL and PBCTL register bits */
+/*****************************************************************************/
+/* PACTL and PBCTL register bits */
+/*****************************************************************************/
-#define PxCTL_IRQ_ENABLE 0x01 /* (W) Peripheral A interrupt (IRQ) enable. */
-/* One equals enable. Set by the OS but available to the user; reset on powerup. */
+/* (W) Peripheral A interrupt (IRQ) enable.
+** One equals enable. Set by the OS but available to the user; reset on powerup.
+*/
+#define PxCTL_IRQ_ENABLE 0x01
-#define PxCTL_BIT1 0x02 /* "Set to zero" */
+/* "Set to zero" */
+#define PxCTL_BIT1 0x02
-#define PxCTL_ADDRESSING 0x04 /* (W) Controls PORTA addressing */
-/* One equals PORTA register; zero equals direction control register */
+/* (W) Controls PORTA addressing
+** One equals PORTA register; zero equals direction control register
+*/
+#define PxCTL_ADDRESSING 0x04
#define PxCTL_BIT4 0x10 /* "Set to one" */
#define PxCTL_BIT5 0x20 /* "Set to one" */
#define PxCTL_BIT6 0x40 /* "Set to zero" */
-#define PxCTL_IRQ_STATUS 0x80 /* Peripheral interrupt (IRQ) status bit. */
-/* Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB. */
+
+/* Peripheral interrupt (IRQ) status bit.
+** Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB.
+*/
+#define PxCTL_IRQ_STATUS 0x80
/* PACTL-specific register bit */
-#define PACTL_MOTOR_CONTROL 0x08 /* (W) Peripheral motor control line */
-/* Turn the cassette on or off; zero equals on) */
+/* (W) Peripheral motor control line
+** Turn the cassette on or off; zero equals on)
+*/
+#define PACTL_MOTOR_CONTROL 0x08
/* PBCTL-specific register bit */
-#define PBCTL_PERIPH_CMD_IDENT 0x08 /* Peripheral command identification (serial bus command) */
-
+/* Peripheral command identification (serial bus command) */
+#define PBCTL_PERIPH_CMD_IDENT 0x08
/* End of _pia.h */
/* */
/* */
/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
-/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: More defines for registers */
+/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: More defines for registers */
/* */
/* */
/* This software is provided 'as-is', without any expressed or implied */
-/* Define a structure with the POKEY register offsets for write (W) */
+/*****************************************************************************/
+/* Define a structure with the POKEY register offsets for write (W) */
+/*****************************************************************************/
+
struct __pokey_write {
unsigned char audf1; /* audio channel #1 frequency */
unsigned char audc1; /* audio channel #1 control */
};
-
-/* AUDC1-4 register values */
+/*****************************************************************************/
+/* (W) AUDC1-4 register values */
+/*****************************************************************************/
/* Meaningful values for the distortion bits.
** The first process is to divide the clock value by the frequency,
#define AUDC_VOLUME_ONLY 0x10
-/* AUDCTL register values */
+/*****************************************************************************/
+/* (W) AUDCTL register values */
+/*****************************************************************************/
#define AUDCTL_CLOCKBASE_15HZ 0x01 /* Switch main clock base from 64 KHz to 15 KHz */
#define AUDCTL_HIGHPASS_CHAN2 0x02 /* Insert high pass filter into channel two, clocked by channel four */
#define AUDCTL_9BIT_POLY 0x80 /* Makes the 17 bit poly counter into nine bit poly (see also: RANDOM) */
-/* IRQEN register values */
+/*****************************************************************************/
+/* (W) IRQEN register values */
+/*****************************************************************************/
#define IRQEN_TIMER_1 0x01 /* The POKEY timer one interrupt is enabled */
#define IRQEN_TIMER_2 0x02 /* The POKEY timer two interrupt is enabled */
#define IRQEN_BREAK_KEY 0x80 /* The BREAK key is enabled */
-/* SKCTL register values */
+/*****************************************************************************/
+/* (W) SKCTL register values */
+/*****************************************************************************/
#define SKCTL_KEYBOARD_DEBOUNCE 0x01 /* Enable keyboard debounce circuits */
#define SKCTL_KEYBOARD_SCANNING 0x02 /* Enable keyboard scanning circuit */
-#define SKCTL_FAST_POT_SCAN 0x04 /* Fast pot scan */
-/* The pot scan counter completes its sequence in two TV line times instead of
+/* Fast pot scan
+** The pot scan counter completes its sequence in two TV line times instead of
** one frame time (228 scan lines). Not as accurate as the normal pot scan
*/
+#define SKCTL_FAST_POT_SCAN 0x04
-#define SKCTL_TWO_TONE_MODE 0x08 /* POKEY two-tone mode */
-/* Serial output is transmitted as a two-tone signal rather than a logic true/false. */
+/* POKEY two-tone mode
+** Serial output is transmitted as a two-tone signal rather than a logic true/false.
+*/
+#define SKCTL_TWO_TONE_MODE 0x08
+
+/* Force break (serial output to zero) */
+#define SKCTL_FORCE_BREAK 0x80
/* Bits 4, 5, and 6 of SKCTL set Serial Mode Control: */
-#define SKCTL_SER_MODE_TX_EXT_RX_EXT 0x00
/* Trans. & Receive rates set by external clock; Also internal clock phase reset to zero. */
+#define SKCTL_SER_MODE_TX_EXT_RX_EXT 0x00
-#define SKCTL_SER_MODE_TX_EXT_RX_ASYNC 0x10
/* Trans. rate set by external clock; Receive asynch. (ch. 4) (CH3 and CH4). */
+#define SKCTL_SER_MODE_TX_EXT_RX_ASYNC 0x10
-#define SKCTL_SER_MODE_TX_CH4_RX_CH4_BIDIR 0x20
/* Trans. & Receive rates set by Chan. 4; Chan. 4 output on Bi-Direct. clock line. */
+#define SKCTL_SER_MODE_TX_CH4_RX_CH4_BIDIR 0x20
/* N.B.: Bit combination 0,1,1 not useful */
-#define SKCTL_SER_MODE_TX_CH4_RX_EXT 0x40
/* Trans. rate set by Chan. 4; Receive rate set by external clock. */
+#define SKCTL_SER_MODE_TX_CH4_RX_EXT 0x40
/* N.B.: Bit combination 1,0,1 not useful */
-#define SKCTL_SER_MODE_TX_CH2_RX_CH4_BIDIR 0x60
/* Trans. rate set by Chan. 2; Receive rate set by Chan. 4; Chan. 4 out on Bi-Direct. clock line. */
+#define SKCTL_SER_MODE_TX_CH2_RX_CH4_BIDIR 0x60
-#define SKCTL_SER_MODE_TX_CH4_RX_ASYNC 0x70
/* Trans. rate set by Chan. 2; Receive asynch. (chan 3 & 4); Bi-Direct. clock not used (tri-state condition). */
+#define SKCTL_SER_MODE_TX_CH4_RX_ASYNC 0x70
-#define SKCTL_FORCE_BREAK 0x80 /* Force break (serial output to zero) */
-
+/*****************************************************************************/
+/* Define a structure with the POKEY register offsets for read (R) */
+/*****************************************************************************/
-/* Define a structure with the POKEY register offsets for read (R) */
struct __pokey_read {
unsigned char pot0; /* paddle 0 value */
unsigned char pot1; /* paddle 1 value */
};
-/* SKSTAT register values */
+/*****************************************************************************/
+/* (R) SKSTAT register values */
+/*****************************************************************************/
+
#define SKSTAT_SERIN_SHIFTREG_BUSY 0x02 /* Serial input shift register busy */
#define SKSTAT_LASTKEY_PRESSED 0x04 /* the last key is still pressed */
#define SKSTAT_SHIFTKEY_PRESSED 0x08 /* the [Shift] key is pressed */
#define SKSTAT_INPUT_FRAMEERROR 0x80 /* Serial data input frame error caused by missing or extra bits. Reset latches as above. */
-/* KBCODE internal keyboard codes for Atari 8-bit computers*/
-
-/* Defined below in the order the keys appear on a 1200XL keyboard,
-** from top left to bottom right.
-** Note: Numerous Shift+Ctrl+key combos are unavailable.
-** (Source: "Compute!'s Thrid Book of Atari", "Reading the Keyboard Codes")
+/* KBCODE, internal keyboard codes for Atari 8-bit computers,
+** are #defined as "KEY_..." in "atari.h".
+** Note some keys are not read via KBCODE:
+** - Reset
+** - Start, Select, and Option; see CONSOL in "gtia.h"
+** - Break
*/
-#define KEYCODE_NONE 255 /* No key pressed (but also Ctrl+Shift+A) */
-
-
-/* Special keys: */
-
-/* N.B. Reset key not handled like other keys */
-
-/* N.B. Select, Start, and Option console keys not handled like other keys;
-** see CONSOL register in GTIA
-*/
-
-/* Fn (function) keys only available on 1200XL */
-#define KEYCODE_F1 3
-#define KEYCODE_F2 4
-#define KEYCODE_F3 19
-#define KEYCODE_F4 20
-
-/* HELP key only available on XL/XE series */
-#define KEYCODE_HELP 17
-
-/* N.B. Break key not handled like other keys */
-
-
-/* Keyboard top row */
-
-#define KEYCODE_ESC 28
-#define KEYCODE_1 31
-#define KEYCODE_2 30
-#define KEYCODE_3 26
-#define KEYCODE_4 24
-#define KEYCODE_5 29
-#define KEYCODE_6 27
-#define KEYCODE_7 51
-#define KEYCODE_8 53
-#define KEYCODE_9 48
-#define KEYCODE_0 50
-#define KEYCODE_LT 54
-#define KEYCODE_GT 55
-#define KEYCODE_BKSPC 52
-
-
-/* Keyboard second row */
-
-#define KEYCODE_TAB 44
-#define KEYCODE_Q 47
-#define KEYCODE_W 46
-#define KEYCODE_E 42
-#define KEYCODE_R 40
-#define KEYCODE_T 45
-#define KEYCODE_Y 43
-#define KEYCODE_U 11
-#define KEYCODE_I 13
-#define KEYCODE_O 8
-#define KEYCODE_P 10
-#define KEYCODE_MINUS 14
-#define KEYCODE_EQUALS 15
-#define KEYCODE_RETURN 12
-
-
-/* Keyboard third row */
-
-#define KEYCODE_CTRL 128 /* binary OR'd */
-/* N.B. Cannot read Ctrl key alone */
-
-#define KEYCODE_A 63
-#define KEYCODE_S 62
-#define KEYCODE_D 58
-#define KEYCODE_F 56
-#define KEYCODE_G 61
-#define KEYCODE_H 57
-#define KEYCODE_J 1
-#define KEYCODE_K 5
-#define KEYCODE_L 0
-#define KEYCODE_SEMICOLON 2
-#define KEYCODE_PLUS 6
-#define KEYCODE_ASTERISK 7
-#define KEYCODE_CAPS 60
-
-
-/* Keyboard bottom row */
-
-#define KEYCODE_SHIFT 64 /* binary OR'd */
-/* N.B. Cannot read Shift key alone via KBCODE;
-** instead, check "Shfit key press" bit of SKSTAT register
-*/
-
-#define KEYCODE_Z 23
-#define KEYCODE_X 22
-#define KEYCODE_C 18
-#define KEYCODE_V 16
-#define KEYCODE_B 21
-#define KEYCODE_N 35
-#define KEYCODE_M 37
-#define KEYCODE_COMMA 32
-#define KEYCODE_PERIOD 34
-#define KEYCODE_SLASH 38
-#define KEYCODE_FUJI 39 /* (as seen on 400/800) */
-#define KEYCODE_INVERSE 39 /* (alternative name; as seen on XL/XE) */
-
-/* N.B. No way to tell left from right Shift keys */
-
-
-/* Keyboard Space key */
-
-#define KEYCODE_SPACE 33
-
/* End of _pokey.h */
#endif /* #ifndef __POKEY_H */
/* */
/* */
/* */
-/* (C) 2000-2018 Mark Keates <markk@dendrite.co.uk> */
+/* (C) 2000-2019 Mark Keates <markk@dendrite.co.uk> */
/* Freddy Offenga <taf_offenga@yahoo.com> */
/* Christian Groessler <chris@groessler.org> */
+/* Bill Kendrick <nbs@sonic.net> */
/* */
/* */
/* This software is provided 'as-is', without any expressed or implied */
-/* Character codes */
+/*****************************************************************************/
+/* Character codes */
+/*****************************************************************************/
+
#define CH_DELCHR 0xFE /* delete char under the cursor */
#define CH_ENTER 0x9B
#define CH_ESC 0x1B
#define CH_VLINE 0x7C
-/* Color definitions */
+/*****************************************************************************/
+/* Color definitions */
+/*****************************************************************************/
/* Make a GTIA color value */
#define _gtia_mkcolor(hue,lum) (((hue) << 4) | ((lum) << 1))
#define TGI_COLOR_LIGHTBLUE COLOR_LIGHTBLUE
#define TGI_COLOR_GRAY3 COLOR_GRAY3
-/* Masks for joy_read */
+
+/*****************************************************************************/
+/* Masks for joy_read */
+/*****************************************************************************/
+
#define JOY_UP_MASK 0x01
#define JOY_DOWN_MASK 0x02
#define JOY_LEFT_MASK 0x04
#define JOY_FIRE_MASK JOY_BTN_1_MASK
#define JOY_FIRE(v) ((v) & JOY_FIRE_MASK)
-/* Keyboard values returned by kbcode / CH */
+
+/*****************************************************************************/
+/* Keyboard values returned by kbcode / CH */
+/*****************************************************************************/
+
#define KEY_NONE ((unsigned char) 0xFF)
#define KEY_0 ((unsigned char) 0x32)
#define KEY_INVERSE ((unsigned char) 0x27)
#define KEY_HELP ((unsigned char) 0x11)
+/* Function keys only exist on the 1200XL model. */
#define KEY_F1 ((unsigned char) 0x03)
#define KEY_F2 ((unsigned char) 0x04)
#define KEY_F3 ((unsigned char) 0x13)
#define KEY_F4 ((unsigned char) 0x14)
+/* N.B. Cannot read Ctrl key alone */
#define KEY_CTRL ((unsigned char) 0x80)
+
+/* N.B. Cannot read Shift key alone via KBCODE;
+** instead, check "Shfit key press" bit of SKSTAT register.
+** Also, no way to tell left Shift from right Shift.
+*/
#define KEY_SHIFT ((unsigned char) 0x40)
-/* Composed keys */
+
+/* Composed keys
+** (Other combinations are possible, including Shift+Ctrl+key,
+** though not all such combinations are available.)
+*/
#define KEY_EXCLAMATIONMARK (KEY_1 | KEY_SHIFT)
#define KEY_QUOTE (KEY_2 | KEY_SHIFT)
#define KEY_LEFT (KEY_PLUS | KEY_CTRL)
#define KEY_RIGHT (KEY_ASTERISK | KEY_CTRL)
-/* Color register functions */
+
+/*****************************************************************************/
+/* Color register functions */
+/*****************************************************************************/
+
extern void __fastcall__ _setcolor (unsigned char color_reg, unsigned char hue, unsigned char luminace);
extern void __fastcall__ _setcolor_low (unsigned char color_reg, unsigned char color_value);
extern unsigned char __fastcall__ _getcolor (unsigned char color_reg);
-/* Other screen functions */
+/*****************************************************************************/
+/* Other screen functions */
+/*****************************************************************************/
+
extern int __fastcall__ _graphics (unsigned char mode); /* mode value same as in BASIC */
extern void __fastcall__ _scroll (signed char numlines);
/* numlines > 0 scrolls up */
/* numlines < 0 scrolls down */
-/* Misc. functions */
+
+/*****************************************************************************/
+/* Misc. functions */
+/*****************************************************************************/
+
extern unsigned char get_ostype(void); /* get ROM version */
extern unsigned char get_tv(void); /* get TV system */
extern void _save_vecs(void); /* save system vectors */
extern char *_getdefdev(void); /* get default floppy device */
extern unsigned char _is_cmdline_dos(void); /* does DOS support command lines */
-/* Global variables */
+
+/*****************************************************************************/
+/* Global variables */
+/*****************************************************************************/
+
extern unsigned char _dos_type; /* the DOS flavour */
#ifndef __ATARIXL__
extern void atr130_emd[];
extern void atrx15p2_tgi[];
#endif
-/* get_ostype return value defines (for explanation, see ostype.s) */
+
+/*****************************************************************************/
+/* get_ostype return value defines (for explanation, see ostype.s) */
+/*****************************************************************************/
+
/* masks */
#define AT_OS_TYPE_MAIN 7
#define AT_OS_TYPE_MINOR (7 << 3)
#define AT_OS_XLXE_3 3
#define AT_OS_XLXE_4 4
-/* get_tv return values */
+
+/*****************************************************************************/
+/* get_tv return values */
+/*****************************************************************************/
+
#define AT_NTSC 0
#define AT_PAL 1
-/* valid _dos_type values */
+
+/*****************************************************************************/
+/* valid _dos_type values */
+/*****************************************************************************/
+
#define SPARTADOS 0
#define REALDOS 1
#define BWDOS 2
#define MYDOS 6
#define NODOS 255
-/* Define hardware */
+
+/*****************************************************************************/
+/* Define hardware and where they're mapped in memory */
+/*****************************************************************************/
+
#include <_gtia.h>
#define GTIA_READ (*(struct __gtia_read*)0xD000)
#define GTIA_WRITE (*(struct __gtia_write*)0xD000)
#include <_antic.h>
#define ANTIC (*(struct __antic*)0xD400)
-/* device control block */
+
+/*****************************************************************************/
+/* Device control block */
+/*****************************************************************************/
+
struct __dcb {
unsigned char device; /* device id */
unsigned char unit; /* unit number */
};
#define DCB (*(struct __dcb *)0x300)
-/* I/O control block */
+
+/*****************************************************************************/
+/* I/O control block */
+/*****************************************************************************/
+
struct __iocb {
unsigned char handler; /* handler index number (0xff free) */
unsigned char drive; /* device number (drive) */
projects / cc65 / commitdiff