2 FreeRTOS.org V5.3.1 - Copyright (C) 2003-2009 Richard Barry.
\r
4 This file is part of the FreeRTOS.org distribution.
\r
6 FreeRTOS.org is free software; you can redistribute it and/or modify it
\r
7 under the terms of the GNU General Public License (version 2) as published
\r
8 by the Free Software Foundation and modified by the FreeRTOS exception.
\r
9 **NOTE** The exception to the GPL is included to allow you to distribute a
\r
10 combined work that includes FreeRTOS.org without being obliged to provide
\r
11 the source code for any proprietary components. Alternative commercial
\r
12 license and support terms are also available upon request. See the
\r
13 licensing section of http://www.FreeRTOS.org for full details.
\r
15 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
\r
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
20 You should have received a copy of the GNU General Public License along
\r
21 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
\r
22 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
25 ***************************************************************************
\r
27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
\r
29 * This is a concise, step by step, 'hands on' guide that describes both *
\r
30 * general multitasking concepts and FreeRTOS specifics. It presents and *
\r
31 * explains numerous examples that are written using the FreeRTOS API. *
\r
32 * Full source code for all the examples is provided in an accompanying *
\r
35 ***************************************************************************
\r
39 Please ensure to read the configuration and relevant port sections of the
\r
40 online documentation.
\r
42 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
45 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
48 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
49 licensing and training services.
\r
54 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
\r
57 /* Standard includes. */
\r
60 /* Scheduler includes. */
\r
61 #include "FreeRTOS.h"
\r
65 /* Demo application includes. */
\r
68 /*-----------------------------------------------------------*/
\r
70 /* Constants to setup and access the UART. */
\r
71 #define serDLAB ( ( unsigned portCHAR ) 0x80 )
\r
72 #define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
\r
73 #define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
\r
74 #define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
\r
75 #define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
\r
76 #define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
\r
77 #define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
\r
78 #define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
\r
80 /* Constants to setup and access the VIC. */
\r
81 #define serU0VIC_CHANNEL ( ( unsigned portLONG ) 0x0006 )
\r
82 #define serU0VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0040 )
\r
83 #define serU0VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
\r
84 #define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
\r
86 /* Constants to determine the ISR source. */
\r
87 #define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
\r
88 #define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
\r
89 #define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
\r
90 #define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
\r
91 #define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
\r
94 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
\r
95 #define serHANDLE ( ( xComPortHandle ) 1 )
\r
96 #define serNO_BLOCK ( ( portTickType ) 0 )
\r
98 /*-----------------------------------------------------------*/
\r
100 /* Queues used to hold received characters, and characters waiting to be
\r
102 static xQueueHandle xRxedChars;
\r
103 static xQueueHandle xCharsForTx;
\r
104 static volatile portLONG lTHREEmpty = pdFALSE;
\r
106 /*-----------------------------------------------------------*/
\r
108 /* The ISR. Note that this is called by a wrapper written in the file
\r
109 SerialISR.s79. See the WEB documentation for this port for further
\r
111 __arm void vSerialISR( void );
\r
113 /*-----------------------------------------------------------*/
\r
115 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
\r
117 unsigned portLONG ulDivisor, ulWantedClock;
\r
118 xComPortHandle xReturn = serHANDLE;
\r
119 extern void ( vSerialISREntry) ( void );
\r
121 /* Create the queues used to hold Rx and Tx characters. */
\r
122 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
123 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
125 /* Initialise the THRE empty flag. */
\r
126 lTHREEmpty = pdTRUE;
\r
129 ( xRxedChars != serINVALID_QUEUE ) &&
\r
130 ( xCharsForTx != serINVALID_QUEUE ) &&
\r
131 ( ulWantedBaud != ( unsigned portLONG ) 0 )
\r
134 portENTER_CRITICAL();
\r
136 /* Setup the baud rate: Calculate the divisor value. */
\r
137 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
\r
138 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
\r
140 /* Set the DLAB bit so we can access the divisor. */
\r
143 /* Setup the divisor. */
\r
144 U0DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
\r
146 U0DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
\r
148 /* Turn on the FIFO's and clear the buffers. */
\r
149 U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
\r
151 /* Setup transmission format. */
\r
152 U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
\r
154 /* Setup the VIC for the UART. */
\r
155 VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
\r
156 VICIntEnable |= serU0VIC_CHANNEL_BIT;
\r
157 VICVectAddr1 = ( unsigned portLONG ) vSerialISREntry;
\r
158 VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
\r
160 /* Enable UART0 interrupts. */
\r
161 U0IER |= serENABLE_INTERRUPTS;
\r
163 portEXIT_CRITICAL();
\r
165 xReturn = ( xComPortHandle ) 1;
\r
169 xReturn = ( xComPortHandle ) 0;
\r
174 /*-----------------------------------------------------------*/
\r
176 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
\r
178 /* The port handle is not required as this driver only supports UART0. */
\r
181 /* Get the next character from the buffer. Return false if no characters
\r
182 are available, or arrive before xBlockTime expires. */
\r
183 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
\r
192 /*-----------------------------------------------------------*/
\r
194 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
196 signed portCHAR *pxNext;
\r
198 /* NOTE: This implementation does not handle the queue being full as no
\r
199 block time is used! */
\r
201 /* The port handle is not required as this driver only supports UART0. */
\r
203 ( void ) usStringLength;
\r
205 /* Send each character in the string, one at a time. */
\r
206 pxNext = ( signed portCHAR * ) pcString;
\r
209 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
\r
213 /*-----------------------------------------------------------*/
\r
215 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
\r
217 signed portBASE_TYPE xReturn;
\r
219 /* The port handle is not required as this driver only supports UART0. */
\r
222 portENTER_CRITICAL();
\r
224 /* Is there space to write directly to the UART? */
\r
225 if( lTHREEmpty == ( portLONG ) pdTRUE )
\r
227 /* We wrote the character directly to the UART, so was
\r
229 lTHREEmpty = pdFALSE;
\r
235 /* We cannot write directly to the UART, so queue the character.
\r
236 Block for a maximum of xBlockTime if there is no space in the
\r
237 queue. It is ok to block within a critical section as each
\r
238 task has it's own critical section management. */
\r
239 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
\r
241 /* Depending on queue sizing and task prioritisation: While we
\r
242 were blocked waiting to post interrupts were not disabled. It is
\r
243 possible that the serial ISR has emptied the Tx queue, in which
\r
244 case we need to start the Tx off again. */
\r
245 if( lTHREEmpty == ( portLONG ) pdTRUE )
\r
247 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
\r
248 lTHREEmpty = pdFALSE;
\r
253 portEXIT_CRITICAL();
\r
257 /*-----------------------------------------------------------*/
\r
259 __arm void vSerialISR( void )
\r
261 signed portCHAR cChar;
\r
262 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
264 /* What caused the interrupt? */
\r
265 switch( U0IIR & serINTERRUPT_SOURCE_MASK )
\r
267 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
\r
271 case serSOURCE_THRE : /* The THRE is empty. If there is another
\r
272 character in the Tx queue, send it now. */
\r
273 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
\r
279 /* There are no further characters
\r
280 queued to send so we can indicate
\r
281 that the THRE is available. */
\r
282 lTHREEmpty = pdTRUE;
\r
286 case serSOURCE_RX_TIMEOUT :
\r
287 case serSOURCE_RX : /* A character was received. Place it in
\r
288 the queue of received characters. */
\r
290 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
\r
293 default : /* There is nothing to do, leave the ISR. */
\r
297 /* Exit the ISR. If a task was woken by either a character being received
\r
298 or transmitted then a context switch will occur. */
\r
299 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
\r
301 /* Clear the ISR in the VIC. */
\r
302 VICVectAddr = serCLEAR_VIC_INTERRUPT;
\r
304 /*-----------------------------------------------------------*/
\r