2 This is the default Startup for STR75x devices for the GNU toolchain
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4 It has been designed by ST Microelectronics and modified by Raisonance
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7 You can use it, modify it, distribute it freely but without any waranty.
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14 /*; Depending on Your Application, Disable or Enable the following Defines*/
\r
15 /*; --------------------------------------------------------------------------
\r
16 ; SMI Bank0 configuration
\r
17 ; ----------------------------------------------------------------------------*/
\r
18 .set SMI_Bank0_EN, 0 /*; enable access the SMI Bank0 if 1*/
\r
20 /*; ----------------------------------------------------------------------------
\r
22 ; ----------------------------------------------------------------------------*/
\r
23 .set Remap_SRAM, 0 /* remap SRAM at address 0x00 if 1 */
\r
25 /* ; ----------------------------------------------------------------------------
\r
26 ; EIC initialization
\r
27 ; ----------------------------------------------------------------------------*/
\r
28 .set EIC_INIT, 1 /*; Configure and Initialize EIC if 1*/
\r
31 ;/* the following are useful for initializing the .data section */
\r
32 .extern _sidata ;/* start address for the initialization values of the .data section. defined in linker script */
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33 .extern _sdata ;/* start address for the .data section. defined in linker script */
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34 .extern _edata ;/* end address for the .data section. defined in linker script */
\r
36 ;/* the following are useful for initializing the .bss section */
\r
37 .extern _sbss ;/* start address for the .bss section. defined in linker script */
\r
38 .extern _ebss ;/* end address for the .bss section. defined in linker script */
\r
40 ;/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
\r
41 .set Mode_USR, 0x10 ;/* User Mode */
\r
42 .set Mode_FIQ, 0x11 ;/* FIQ Mode */
\r
43 .set Mode_IRQ, 0x12 ;/* IRQ Mode */
\r
44 .set Mode_SVC, 0x13 ;/* Supervisor Mode */
\r
45 .set Mode_ABT, 0x17 ;/* Abort Mode */
\r
46 .set Mode_UNDEF, 0x1B ;/* Undefined Mode */
\r
47 .set Mode_SYS, 0x1F ;/* System Mode */
\r
49 .equ I_Bit, 0x80 ;/* when I bit is set, IRQ is disabled */
\r
50 .equ F_Bit, 0x40 ;/* when F bit is set, FIQ is disabled */
\r
52 /*; --- System memory locations */
\r
54 ;/* init value for the stack pointer. defined in linker script */
\r
57 ;/* Stack Sizes. The default values are in the linker script, but they can be overriden. */
\r
58 .extern _UND_Stack_Init
\r
59 .extern _SVC_Stack_Init
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60 .extern _ABT_Stack_Init
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61 .extern _FIQ_Stack_Init
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62 .extern _IRQ_Stack_Init
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63 .extern _USR_Stack_Init
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65 .extern _UND_Stack_Size
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66 .extern _SVC_Stack_Size
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67 .extern _ABT_Stack_Size
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68 .extern _FIQ_Stack_Size
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69 .extern _IRQ_Stack_Size
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70 .extern _USR_Stack_Size
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71 .extern vTaskSwitchContext
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72 .extern ulCriticalNesting
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74 SVC_Stack = _SVC_Stack_Init /*_estack*/ /*; 32 byte SVC stack at*/
\r
75 /*; top of memory */
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77 IRQ_Stack = _IRQ_Stack_Init /*SVC_Stack - 32*/ /*; followed by IRQ stack */
\r
78 USR_Stack = _USR_Stack_Init /*IRQ_Stack-256*/ /*; followed by USR stack */
\r
79 FIQ_Stack = _FIQ_Stack_Init /*USR_Stack-256*/ /*; followed by FIQ stack*/
\r
80 ABT_Stack = _ABT_Stack_Init /*FIQ_Stack-64*/ /*; followed by ABT stack */
\r
81 UNDEF_Stack = _UND_Stack_Init /*ABT_Stack-0*/ /*; followed by UNDEF stack */
\r
83 /*; --- System memory locations*/
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86 MRCC_PCLKEN_Addr = 0x60000030 /*; Peripheral Clock Enable register base address*/
\r
89 CFG_GLCONF_Addr = 0x60000010 /*; Global Configuration register base address*/
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90 SRAM_mask = 0x0002 /*; to remap RAM at 0x0*/
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93 GPIOREMAP0R_Addr = 0xFFFFE420
\r
94 SMI_EN_Mask = 0x00000001
\r
97 SMI_CR1_Addr = 0x90000000
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99 /*; --- Stack Addres for each ARM mode*/
\r
100 /*; add FIQ_Stack, ABT_Stack, UNDEF_Stack here if you need them*/
\r
103 /*; --- EIC Registers offsets*/
\r
104 EIC_base_addr = 0xFFFFF800 /*; EIC base address*/
\r
105 ICR_off_addr = 0x00 /*; Interrupt Control register offset*/
\r
106 CICR_off_addr = 0x04 /*; Current Interrupt Channel Register*/
\r
107 CIPR_off_addr = 0x08 /*; Current Interrupt Priority Register offset*/
\r
108 IVR_off_addr = 0x18 /*; Interrupt Vector Register offset*/
\r
109 FIR_off_addr = 0x1C /*; Fast Interrupt Register offset*/
\r
110 IER_off_addr = 0x20 /*; Interrupt Enable Register offset*/
\r
111 IPR_off_addr = 0x40 /*; Interrupt Pending Bit Register offset*/
\r
112 SIR0_off_addr = 0x60 /*; Source Interrupt Register 0*/
\r
114 /***************************************************************************************/
\r
124 LDR PC, Undefined_Addr
\r
126 LDR PC, Prefetch_Addr
\r
128 NOP /*; Reserved vector*/
\r
136 Reset_Addr : .long Reset_Handler
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137 Undefined_Addr : .long UndefinedHandler
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138 SWI_Addr : .long SWIHandler
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139 Prefetch_Addr : .long PrefetchAbortHandler
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140 Abort_Addr : .long DataAbortHandler
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141 .long 0 /*; Reserved vector*/
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142 IRQ_Addr : .long IRQHandler
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143 FIQ_Addr : .long FIQHandler
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146 /*;*******************************************************************************
\r
147 ; Peripherals IRQ handlers address table
\r
148 ;********************************************************************************/
\r
150 /* execution goes there when an interrupt occurs and there is no associated ISR */
\r
151 .globl __wrongvector
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153 ldr PC, __wrongvector_Addr
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154 __wrongvector_Addr:
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157 WAKUP_Addr :.long WAKUPIRQHandler
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158 TIM2_OC2_Addr :.long TIM2_OC2IRQHandler
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159 TIM2_OC1_Addr :.long TIM2_OC1IRQHandler
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160 TIM2_IC12_Addr :.long TIM2_IC12IRQHandler
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161 TIM2_UP_Addr :.long TIM2_UPIRQHandler
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162 TIM1_OC2_Addr :.long TIM1_OC2IRQHandler
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163 TIM1_OC1_Addr :.long TIM1_OC1IRQHandler
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164 TIM1_IC12_Addr :.long TIM1_IC12IRQHandler
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165 TIM1_UP_Addr :.long TIM1_UPIRQHandler
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166 TIM0_OC2_Addr :.long TIM0_OC2IRQHandler
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167 TIM0_OC1_Addr :.long TIM0_OC1IRQHandler
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168 TIM0_IC12_Addr :.long TIM0_IC12IRQHandler
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169 TIM0_UP_Addr :.long TIM0_UPIRQHandler
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170 PWM_OC123_Addr :.long PWM_OC123IRQHandler
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171 PWM_EM_Addr :.long PWM_EMIRQHandler
\r
172 PWM_UP_Addr :.long PWM_UPIRQHandler
\r
173 I2C_Addr :.long I2CIRQHandler
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174 SSP1_Addr :.long SSP1IRQHandler
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175 SSP0_Addr :.long SSP0IRQHandler
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176 UART2_Addr :.long UART2IRQHandler
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177 UART1_Addr :.long UART1IRQHandler
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178 UART0_Addr :.long vSerialISR
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179 CAN_Addr :.long CANIRQHandler
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180 USB_LP_Addr :.long USB_LPIRQHandler
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181 USB_HP_Addr :.long USB_HPIRQHandler
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182 ADC_Addr :.long ADCIRQHandler
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183 DMA_Addr :.long DMAIRQHandler
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184 EXTIT_Addr :.long EXTITIRQHandler
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185 MRCC_Addr :.long MRCCIRQHandler
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186 FLASHSMI_Addr :.long FLASHSMIIRQHandler
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187 RTC_Addr :.long RTCIRQHandler
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188 TB_Addr :.long vPortTickISR
\r
190 /*;*******************************************************************************
\r
191 ; Exception Handlers
\r
192 ;********************************************************************************/
\r
195 /*;*******************************************************************************
\r
196 ;* FreeRTOS.org macros for saving and restoring a task context
\r
197 ;*******************************************************************************/
\r
199 .macro portSAVE_CONTEXT MACRO
\r
201 /* ; Push R0 as we are going to use the register. */
\r
204 /* ; Set R0 to point to the task stack pointer. */
\r
210 /* ; Push the return address onto the stack. */
\r
213 /* ; Now we have saved LR we can use it instead of R0. */
\r
216 /* ; Pop R0 so we can save it onto the system mode stack. */
\r
219 /* ; Push all the system mode registers onto the task stack. */
\r
224 /* ; Push the SPSR onto the task stack. */
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228 LDR R0, =ulCriticalNesting
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232 /* ; Store the new top of stack for the task. */
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233 LDR R1, =pxCurrentTCB
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240 .macro portRESTORE_CONTEXT MACRO
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242 /* ; Set the LR to the task stack. */
\r
243 LDR R1, =pxCurrentTCB
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247 /* ; The critical nesting depth is the first item on the stack.
\r
248 ; Load it into the ulCriticalNesting variable. */
\r
249 LDR R0, =ulCriticalNesting
\r
253 /* ; Get the SPSR from the stack. */
\r
257 /* ; Restore all system mode registers for the task. */
\r
258 LDMFD LR, {R0-R14}^
\r
261 /* ; Restore the return address. */
\r
264 /* ; And return - correcting the offset in the LR to obtain the
\r
265 ; correct address. */
\r
272 /*;*******************************************************************************
\r
273 ;* Macro Name : SaveContext
\r
274 ;* Description : This macro used to save the context before entering
\r
275 ; an exception handler.
\r
276 ;* Input : The range of registers to store.
\r
278 ;********************************************************************************/
\r
280 .macro SaveContext $r0,$r12
\r
281 STMFD sp!,{r0-r12,lr} /*; Save The workspace plus the current return*/
\r
282 /*; address lr_ mode into the stack.*/
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283 MRS r1,spsr /*; Save the spsr_mode into r1.*/
\r
284 STMFD sp!,{r1} /*; Save spsr.*/
\r
287 /*;*******************************************************************************
\r
288 ;* Macro Name : RestoreContext
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289 ;* Description : This macro used to restore the context to return from
\r
290 ; an exception handler and continue the program execution.
\r
291 ;* Input : The range of registers to restore.
\r
293 ;********************************************************************************/
\r
295 .macro RestoreContext $r0,$r12
\r
296 LDMFD sp!,{r1} /*; Restore the saved spsr_mode into r1.*/
\r
297 MSR spsr_cxsf,r1 /*; Restore spsr_mode.*/
\r
298 LDMFD sp!,{r0-r12,pc}^/*; Return to the instruction following...*/
\r
299 /*; ...the exception interrupt.*/
\r
304 /*;*******************************************************************************
\r
305 ;* Function Name : UndefinedHandler
\r
306 ;* Description : This function called when undefined instruction
\r
307 ; exception is entered.
\r
310 ;*********************************************************************************/
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313 SaveContext r0,r12 /*; Save the workspace plus the current*/
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314 /*; return address lr_ und and spsr_und.*/
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315 BL Undefined_Handler/*; Branch to Undefined_Handler*/
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316 RestoreContext r0,r12 /*; Return to the instruction following...*/
\r
317 /*; ...the undefined instruction.*/
\r
319 /*;*******************************************************************************
\r
320 ;* Function Name : SWIHandler
\r
321 ;* Description : This function called when SWI instruction executed.
\r
324 ;********************************************************************************/
\r
329 LDR R0, =vTaskSwitchContext
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332 portRESTORE_CONTEXT
\r
335 /*;*******************************************************************************
\r
336 ;* Function Name : IRQHandler
\r
337 ;* Description : This function called when IRQ exception is entered.
\r
340 ;********************************************************************************/
\r
345 portSAVE_CONTEXT /*; Save the context of the current task. */
\r
347 LDR r0, =EIC_base_addr
\r
348 LDR r1, =IVR_off_addr
\r
349 LDR lr, =ReturnAddress /*; Load the return address. */
\r
350 ADD pc,r0,r1 /*; Branch to the IRQ handler. */
\r
352 LDR r0, =EIC_base_addr
\r
353 LDR r2, [r0, #CICR_off_addr] /*; Get the IRQ channel number. */
\r
356 STR r3,[r0, #IPR_off_addr] /*; Clear the corresponding IPR bit. */
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358 portRESTORE_CONTEXT /*; Restore the context of the selected task. */
\r
360 /*;*******************************************************************************
\r
361 ;* Function Name : PrefetchAbortHandler
\r
362 ;* Description : This function called when Prefetch Abort
\r
363 ; exception is entered.
\r
366 ;*********************************************************************************/
\r
368 PrefetchAbortHandler:
\r
370 B PrefetchAbortHandler
\r
372 /*;*******************************************************************************
\r
373 ;* Function Name : DataAbortHandler
\r
374 ;* Description : This function is called when Data Abort
\r
375 ; exception is entered.
\r
378 ;********************************************************************************/
\r
384 /*; ...has generated the data abort exception.*/
\r
386 /*;*******************************************************************************
\r
387 ;* Function Name : FIQHandler
\r
388 ;* Description : This function is called when FIQ
\r
389 ;* exception is entered.
\r
392 ;********************************************************************************/
\r
395 SUB lr,lr,#4 /*; Update the link register.*/
\r
396 SaveContext r0,r7 /*; Save the workspace plus the current*/
\r
397 /*; return address lr_ fiq and spsr_fiq.*/
\r
398 BL FIQ_Handler /*; Branch to FIQ_Handler.*/
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399 RestoreContext r0,r7 /*; Restore the context and return to the...*/
\r
400 /*; ...program execution.*/
\r
402 /*;*******************************************************************************
\r
403 ;* Macro Name : IRQ_to_SYS
\r
404 ;* Description : This macro used to switch form IRQ mode to SYS mode
\r
407 ;*******************************************************************************/
\r
413 /*;*******************************************************************************
\r
414 ;* Macro Name : SYS_to_IRQ
\r
415 ;* Description : This macro used to switch from SYS mode to IRQ mode
\r
416 ; then to return to IRQHnadler routine.
\r
419 ;*******************************************************************************/
\r
421 LDMFD sp!,{lr} /*; Restore the link register. */
\r
422 MSR cpsr_c,#0xD2 /*; Switch to IRQ mode.*/
\r
423 MOV pc,lr /*; Return to IRQHandler routine to clear the*/
\r
427 /*;*******************************************************************************
\r
428 ;* Function Name : WAKUPIRQHandler
\r
429 ;* Description : This function used to switch to SYS mode before entering
\r
430 ;* the WAKUP_IRQHandler function located in 75x_it.c.
\r
431 ;* Then to return to IRQ mode after the
\r
432 ;* WAKUP_IRQHandler function termination.
\r
435 ;*******************************************************************************/
\r
438 BL WAKUP_IRQHandler
\r
441 /*;*******************************************************************************
\r
442 ;* Function Name : TIM2_OC2IRQHandler
\r
443 ;* Description : This function used to switch to SYS mode before entering
\r
444 ;* the TIM3_OC2_IRQHandler function located in 75x_it.c.
\r
445 ;* Then to return to IRQ mode after the
\r
446 ;* TIM2_OC2_IRQHandler function termination.
\r
449 ;*******************************************************************************/
\r
450 TIM2_OC2IRQHandler:
\r
452 BL TIM2_OC2_IRQHandler
\r
455 /*;*******************************************************************************
\r
456 ;* Function Name : TIM2_OC1IRQHandler
\r
457 ;* Description : This function used to switch to SYS mode before entering
\r
458 ;* the TIM2_OC1_IRQHandler function located in 75x_it.c.
\r
459 ;* Then to return to IRQ mode after the
\r
460 ;* TIM2_OC1_IRQHandler function termination.
\r
463 ;*******************************************************************************/
\r
464 TIM2_OC1IRQHandler:
\r
466 BL TIM2_OC1_IRQHandler
\r
469 /*;*******************************************************************************
\r
470 ;* Function Name : TIM2_IC12IRQHandler
\r
471 ;* Description : This function used to switch to SYS mode before entering
\r
472 ;* the TIM2_IC12_IRQHandler function located in 75x_it.c.
\r
473 ;* Then to return to IRQ mode after the
\r
474 ;* TIM2_IC12_IRQHandler function termination.
\r
477 ;*******************************************************************************/
\r
478 TIM2_IC12IRQHandler:
\r
480 BL TIM2_IC12_IRQHandler
\r
483 /*;*******************************************************************************
\r
484 ;* Function Name : TIM2_UPIRQHandler
\r
485 ;* Description : This function used to switch to SYS mode before entering
\r
486 ;* the TIM2_UP_IRQHandler function located in 75x_it.c.
\r
487 ;* Then to return to IRQ mode after the
\r
488 ;* TIM3_UP_IRQHandler function termination.
\r
491 ;*******************************************************************************/
\r
494 BL TIM2_UP_IRQHandler
\r
497 /*;*******************************************************************************
\r
498 ;* Function Name : TIM1_OC2IRQHandler
\r
499 ;* Description : This function used to switch to SYS mode before entering
\r
500 ;* the TIM1_OC2_IRQHandler function located in 75x_it.c.
\r
501 ;* Then to return to IRQ mode after the
\r
502 ;* TIM1_OC2_IRQHandler function termination.
\r
505 ;*******************************************************************************/
\r
506 TIM1_OC2IRQHandler:
\r
508 BL TIM1_OC2_IRQHandler
\r
511 /*;*******************************************************************************
\r
512 ;* Function Name : TIM1_OC1IRQHandler
\r
513 ;* Description : This function used to switch to SYS mode before entering
\r
514 ;* the TIM1_OC1_IRQHandler function located in 75x_it.c.
\r
515 ;* Then to return to IRQ mode after the
\r
516 ;* TIM1_OC1_IRQHandler function termination.
\r
519 ;*******************************************************************************/
\r
520 TIM1_OC1IRQHandler:
\r
522 BL TIM1_OC1_IRQHandler
\r
525 /*;*******************************************************************************
\r
526 ;* Function Name : TIM1_IC12IRQHandler
\r
527 ;* Description : This function used to switch to SYS mode before entering
\r
528 ;* the TIM1_IC12_IRQHandler function located in 75x_it.c.
\r
529 ;* Then to return to IRQ mode after the
\r
530 ;* TIM1_IC12_IRQHandler function termination.
\r
533 ;*******************************************************************************/
\r
534 TIM1_IC12IRQHandler:
\r
536 BL TIM1_IC12_IRQHandler
\r
539 /*;*******************************************************************************
\r
540 ;* Function Name : TIM1_UPIRQHandler
\r
541 ;* Description : This function used to switch to SYS mode before entering
\r
542 ;* the TIM1_UP_IRQHandler function located in 75x_it.c.
\r
543 ;* Then to return to IRQ mode after the
\r
544 ;* TIM1_UP_IRQHandler function termination.
\r
547 ;*******************************************************************************/
\r
550 BL TIM1_UP_IRQHandler
\r
553 /*;*******************************************************************************
\r
554 ;* Function Name : TIM0_OC2IRQHandler
\r
555 ;* Description : This function used to switch to SYS mode before entering
\r
556 ;* the TIM0_OC2_IRQHandler function located in 75x_it.c.
\r
557 ;* Then to return to IRQ mode after the
\r
558 ;* TIM0_OC2_IRQHandler function termination.
\r
561 ;*******************************************************************************/
\r
562 TIM0_OC2IRQHandler:
\r
564 BL TIM0_OC2_IRQHandler
\r
567 /*;*******************************************************************************
\r
568 ;* Function Name : TIM0_OC1IRQHandler
\r
569 ;* Description : This function used to switch to SYS mode before entering
\r
570 ;* the TIM0_OC1_IRQHandler function located in 75x_it.c.
\r
571 ;* Then to return to IRQ mode after the
\r
572 ;* TIM0_OC1_IRQHandler function termination.
\r
575 ;*******************************************************************************/
\r
576 TIM0_OC1IRQHandler:
\r
578 BL TIM0_OC1_IRQHandler
\r
581 /*;*******************************************************************************
\r
582 ;* Function Name : TIM0_IC12IRQHandler
\r
583 ;* Description : This function used to switch to SYS mode before entering
\r
584 ;* the TIM0_IC12_IRQHandler function located in 75x_it.c.
\r
585 ;* Then to return to IRQ mode after the
\r
586 ;* TIM0_IC12_IRQHandler function termination.
\r
589 ;********************************************************************************/
\r
590 TIM0_IC12IRQHandler:
\r
592 BL TIM0_IC12_IRQHandler
\r
595 /*;*******************************************************************************
\r
596 ;* Function Name : TIM0_UPIRQHandler
\r
597 ;* Description : This function used to switch to SYS mode before entering
\r
598 ;* the TIM0_UP_IRQHandler function located in 75x_it.c.
\r
599 ;* Then to return to IRQ mode after the
\r
600 ;* TIM0_UP_IRQHandler function termination.
\r
603 ;********************************************************************************/
\r
606 BL TIM0_UP_IRQHandler
\r
609 /*;*******************************************************************************
\r
610 ;* Function Name : PWM_OC123IRQHandler
\r
611 ;* Description : This function used to switch to SYS mode before entering
\r
612 ;* the PWM_OC123_IRQHandler function located in 75x_it.c.
\r
613 ;* Then to return to IRQ mode after the
\r
614 ;* PWM_OC123_IRQHandler function termination.
\r
617 ;********************************************************************************/
\r
618 PWM_OC123IRQHandler:
\r
620 BL PWM_OC123_IRQHandler
\r
623 /*;*******************************************************************************
\r
624 ;* Function Name : PWM_EMIRQHandler
\r
625 ;* Description : This function used to switch to SYS mode before entering
\r
626 ;* the PWM_EM_IRQHandler function located in 75x_it.c.
\r
627 ;* Then to return to IRQ mode after the
\r
628 ;* PWM_EM_IRQHandler function termination.
\r
631 ;*******************************************************************************/
\r
634 BL PWM_EM_IRQHandler
\r
637 /*;*******************************************************************************
\r
638 ;* Function Name : PWM_UPIRQHandler
\r
639 ;* Description : This function used to switch to SYS mode before entering
\r
640 ;* the PWM_UP_IRQHandler function located in 75x_it.c.
\r
641 ;* Then to return to IRQ mode after the
\r
642 ;* PWM_UP_IRQHandler function termination.
\r
645 ;*******************************************************************************/
\r
648 BL PWM_UP_IRQHandler
\r
651 /*;*******************************************************************************
\r
652 ;* Function Name : I2CIRQHandler
\r
653 ;* Description : This function used to switch to SYS mode before entering
\r
654 ;* the I2C_IRQHandler function located in 75x_it.c.
\r
655 ;* Then to return to IRQ mode after the
\r
656 ;* I2C_IRQHandler function termination.
\r
659 ;*******************************************************************************/
\r
665 /*;*******************************************************************************
\r
666 ;* Function Name : SSP1IRQHandler
\r
667 ;* Description : This function used to switch to SYS mode before entering
\r
668 ;* the SSP1_IRQHandler function located in 75x_it.c.
\r
669 ;* Then to return to IRQ mode after the
\r
670 ;* SSP1_IRQHandler function termination.
\r
673 ;*******************************************************************************/
\r
679 /*;*******************************************************************************
\r
680 ;* Function Name : SSP0IRQHandler
\r
681 ;* Description : This function used to switch to SYS mode before entering
\r
682 ;* the SSP0_IRQHandler function located in 75x_it.c.
\r
683 ;* Then to return to IRQ mode after the
\r
684 ;* SSP0_IRQHandler function termination.
\r
687 ;*******************************************************************************/
\r
693 /*;*******************************************************************************
\r
694 ;* Function Name : UART2IRQHandler
\r
695 ;* Description : This function used to switch to SYS mode before entering
\r
696 ;* the UART2_IRQHandler function located in 75x_it.c.
\r
697 ;* Then to return to IRQ mode after the
\r
698 ;* UART2_IRQHandler function termination.
\r
701 ;*******************************************************************************/
\r
704 BL UART2_IRQHandler
\r
707 /*;*******************************************************************************
\r
708 ;* Function Name : UART1IRQHandler
\r
709 ;* Description : This function used to switch to SYS mode before entering
\r
710 ;* the UART1_IRQHandler function located in 75x_it.c.
\r
711 ;* Then to return to IRQ mode after the
\r
712 ;* UART1_IRQHandler function termination.
\r
715 ;*******************************************************************************/
\r
718 BL UART1_IRQHandler
\r
721 /*;*******************************************************************************
\r
722 ;* Function Name : UART0IRQHandler
\r
723 ;* Description : This function used to switch to SYS mode before entering
\r
724 ;* the UART0_IRQHandler function located in 75x_it.c.
\r
725 ;* Then to return to IRQ mode after the
\r
726 ;* UART0_IRQHandler function termination.
\r
729 ;********************************************************************************/
\r
732 BL UART0_IRQHandler
\r
735 /*;*******************************************************************************
\r
736 ;* Function Name : CANIRQHandler
\r
737 ;* Description : This function used to switch to SYS mode before entering
\r
738 ;* the CAN_IRQHandler function located in 75x_it.c.
\r
739 ;* Then to return to IRQ mode after the
\r
740 ;* CAN_IRQHandler function termination.
\r
743 ;********************************************************************************/
\r
749 /*;*******************************************************************************
\r
750 ;* Function Name : USB_LPIRQHandler
\r
751 ;* Description : This function used to switch to SYS mode before entering
\r
752 ;* the USB_LP_IRQHandler function located in 75x_it.c.
\r
753 ;* Then to return to IRQ mode after the
\r
754 ;* USB_LP_IRQHandler function termination.
\r
757 ;********************************************************************************/
\r
760 BL USB_LP_IRQHandler
\r
763 /*;*******************************************************************************
\r
764 ;* Function Name : USB_HPIRQHandler
\r
765 ;* Description : This function used to switch to SYS mode before entering
\r
766 ;* the USB_HP_IRQHandler function located in 75x_it.c.
\r
767 ;* Then to return to IRQ mode after the
\r
768 ;* USB_HP_IRQHandler function termination.
\r
771 ;********************************************************************************/
\r
774 BL USB_HP_IRQHandler
\r
777 /*;*******************************************************************************
\r
778 ;* Function Name : ADCIRQHandler
\r
779 ;* Description : This function used to switch to SYS mode before entering
\r
780 ;* the ADC_IRQHandler function located in 75x_it.c.
\r
781 ;* Then to return to IRQ mode after the
\r
782 ;* ADC_IRQHandler function termination.
\r
785 ;********************************************************************************/
\r
791 /*;*******************************************************************************
\r
792 ;* Function Name : DMAIRQHandler
\r
793 ;* Description : This function used to switch to SYS mode before entering
\r
794 ;* the DMA_IRQHandler function located in 75x_it.c.
\r
795 ;* Then to return to IRQ mode after the
\r
796 ;* DMA_IRQHandler function termination.
\r
799 ;********************************************************************************/
\r
805 /*;*******************************************************************************
\r
806 ;* Function Name : EXTITIRQHandler
\r
807 ;* Description : This function used to switch to SYS mode before entering
\r
808 ;* the EXTIT_IRQHandler function located in 75x_it.c.
\r
809 ;* Then to return to IRQ mode after the
\r
810 ;* EXTIT_IRQHandler function termination.
\r
813 ;********************************************************************************/
\r
816 BL EXTIT_IRQHandler
\r
819 /*;*******************************************************************************
\r
820 ;* Function Name : MRCCIRQHandler
\r
821 ;* Description : This function used to switch to SYS mode before entering
\r
822 ;* the MRCC_IRQHandler function located in 75x_it.c.
\r
823 ;* Then to return to IRQ mode after the
\r
824 ;* MRCC_IRQHandler function termination.
\r
827 ;********************************************************************************/
\r
833 /*;*******************************************************************************
\r
834 ;* Function Name : FLASHSMIIRQHandler
\r
835 ;* Description : This function used to switch to SYS mode before entering
\r
836 ;* the FLASHSMI_IRQHandler function located in 75x_it.c.
\r
837 ;* Then to return to IRQ mode after the
\r
838 ;* FLASHSMI_IRQHandler function termination.
\r
841 ;********************************************************************************/
\r
842 FLASHSMIIRQHandler:
\r
844 BL FLASHSMI_IRQHandler
\r
847 /*;*******************************************************************************
\r
848 ;* Function Name : RTCIRQHandler
\r
849 ;* Description : This function used to switch to SYS mode before entering
\r
850 ;* the RTC_IRQHandler function located in 75x_it.c.
\r
851 ;* Then to return to IRQ mode after the
\r
852 ;* RTC_IRQHandler function termination.
\r
855 ;********************************************************************************/
\r
861 /*;*******************************************************************************
\r
862 ;* Function Name : TBIRQHandler
\r
863 ;* Description : This function used to switch to SYS mode before entering
\r
864 ;* the TB_IRQHandler function located in 75x_it.c.
\r
865 ;* Then to return to IRQ mode after the
\r
866 ;* TB_IRQHandler function termination.
\r
869 ;********************************************************************************/
\r
874 /*;**********************************************************************************/
\r
880 /*; Reset all Peripheral Clocks*/
\r
881 /*; This is usefull only when using debugger to Reset\Run the application*/
\r
884 LDR r0, =0x01000000 /*; Disable peripherals clock (except GPIO)*/
\r
886 LDR r0, =0x00000000 /*; Disable peripherals clock*/
\r
888 LDR r1, =MRCC_PCLKEN_Addr
\r
892 LDR r0, =0x1875623F /*; Peripherals kept under reset (except GPIO)*/
\r
894 LDR r0, =0x1975623F /*; Peripherals kept under reset*/
\r
903 STR r0, [r1,#4] /*; Disable peripherals reset*/
\r
905 /*; Initialize stack pointer registers
\r
906 ; Enter each mode in turn and set up the stack pointer*/
\r
910 MSR CPSR_c, #Mode_FIQ|I_Bit|F_Bit /*; No interrupts*/
\r
913 MSR CPSR_c, #Mode_IRQ|I_Bit|F_Bit /*; No interrupts*/
\r
916 MSR CPSR_c, #Mode_ABT|I_Bit|F_Bit /*; No interrupts*/
\r
919 MSR CPSR_c, #Mode_UNDEF|I_Bit|F_Bit /*; No interrupts*/
\r
920 ldr sp, =UNDEF_Stack
\r
922 MSR CPSR_c, #Mode_SVC|I_Bit|F_Bit /*; No interrupts*/
\r
925 /*; ------------------------------------------------------------------------------
\r
926 ; Description : Enable SMI Bank0: enable GPIOs clock in MRCC_PCLKEN register,
\r
927 ; enable SMI alternate function in GPIO_REMAP register and enable
\r
928 ; Bank0 in SMI_CR1 register.
\r
929 ; ------------------------------------------------------------------------------*/
\r
931 MOV r0, #0x01000000
\r
932 LDR r1, =MRCC_PCLKEN_Addr
\r
933 STR r0, [r1] /*; Enable GPIOs clock*/
\r
935 LDR r1, =GPIOREMAP0R_Addr
\r
936 MOV r0, #SMI_EN_Mask
\r
939 STR r2, [r1] /*; Enable SMI alternate function */
\r
941 LDR r0, =0x251 /*; SMI Bank0 enabled, Prescaler = 2, Deselect Time = 5*/
\r
942 LDR r1, =SMI_CR1_Addr
\r
943 STR r0, [r1] /*; Configure CR1 register */
\r
945 STR r0, [r1,#4] /*; Reset CR2 register */
\r
948 /*; ----------------------------------------------------------------------------
\r
949 ; Description : Remapping SRAM at address 0x00 after the application has
\r
950 ; started executing.
\r
951 ; ----------------------------------------------------------------------------*/
\r
954 LDR r1, =CFG_GLCONF_Addr
\r
955 LDR r2, [r1] /*; Read GLCONF Register*/
\r
956 BIC r2, r2, #0x03 /*; Reset the SW_BOOT bits*/
\r
957 ORR r2, r2, r0 /*; Change the SW_BOOT bits*/
\r
958 STR r2, [r1] /*; Write GLCONF Register*/
\r
961 /*;-------------------------------------------------------------------------------
\r
962 ;Description : Initialize the EIC as following :
\r
965 ; - IVR contains the load PC opcode
\r
966 ; - All channels are disabled
\r
967 ; - All channels priority equal to 0
\r
968 ; - All SIR registers contains offset to the related IRQ table entry
\r
969 ;-------------------------------------------------------------------------------*/
\r
971 LDR r3, =EIC_base_addr
\r
972 LDR r4, =0x00000000
\r
973 STR r4, [r3, #ICR_off_addr] /*; Disable FIQ and IRQ*/
\r
974 STR r4, [r3, #IER_off_addr] /*; Disable all interrupts channels*/
\r
976 LDR r4, =0xFFFFFFFF
\r
977 STR r4, [r3, #IPR_off_addr] /*; Clear all IRQ pending bits*/
\r
980 STR r4, [r3, #FIR_off_addr] /*; Disable FIQ channels and clear FIQ pending bits*/
\r
982 LDR r4, =0x00000000
\r
983 STR r4, [r3, #CIPR_off_addr] /*; Reset the current priority register*/
\r
985 LDR r4, =0xE59F0000 /*; Write the LDR pc,pc,#offset..*/
\r
986 STR r4, [r3, #IVR_off_addr] /*; ..instruction code in IVR[31:16]*/
\r
989 LDR r2,= 32 /*; 32 Channel to initialize*/
\r
990 LDR r0, =WAKUP_Addr /*; Read the address of the IRQs address table*/
\r
991 LDR r1, =0x00000FFF
\r
993 LDR r5,=SIR0_off_addr /*; Read SIR0 address*/
\r
994 SUB r4,r0,#8 /*; subtract 8 for prefetch*/
\r
995 LDR r1, =0xF7E8 /*; add the offset to the 0x00 address..*/
\r
996 /*; ..(IVR address + 7E8 = 0x00)*/
\r
997 /*; 0xF7E8 used to complete the LDR pc,offset opcode*/
\r
998 ADD r1,r4,r1 /*; compute the jump offset*/
\r
1000 MOV r4, r1, LSL #16 /*; Left shift the result*/
\r
1001 STR r4, [r3, r5] /*; Store the result in SIRx register*/
\r
1002 ADD r1, r1, #4 /*; Next IRQ address*/
\r
1003 ADD r5, r5, #4 /*; Next SIR*/
\r
1004 SUBS r2, r2, #1 /*; Decrement the number of SIR registers to initialize*/
\r
1005 BNE EIC_INI /*; If more then continue*/
\r
1013 /* ;copy the initial values for .data section from FLASH to RAM */
\r
1017 _reset_inidata_loop:
\r
1019 ldrlO R0, [R1], #4
\r
1020 strlO R0, [R2], #4
\r
1021 blO _reset_inidata_loop
\r
1023 ;/* Clear the .bss section */
\r
1024 mov r0,#0 ;/* get a zero */
\r
1025 ldr r1,=_sbss ;/* point to bss start */
\r
1026 ldr r2,=_ebss ;/* point to bss end */
\r
1027 _reset_inibss_loop:
\r
1028 cmp r1,r2 ;/* check if some data remains to clear */
\r
1029 strlo r0,[r1],#4 ;/* clear 4 bytes */
\r
1030 blo _reset_inibss_loop ;/* loop until done */
\r
1032 /************************************************************************************************/
\r
1034 /*; --- Now enter the C code */
\r
1035 B main /*; Note : use B not BL, because an application will*/
\r
1036 /*; never return this way*/
\r