1 //*****************************************************************************
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2 // To configure the same pin 1 of port 0, write
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3 // Control_P0_1(mode, drivestrength); where the mode is INPUT, INPUT_PD ...
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4 // OUTPUT_PP_GP ... OUTPUT_ODAF4. (see definitions below)
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5 // and drivestrength is WEAK, MEDIUM, STRONG or VERYSTRONG
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7 // To toggle reset or set a pin you need to call the macro and put in brackets
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8 // the name of the port pin.
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9 // Example: you want to toggle, reset and set pin 1 of port:
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13 //*****************************************************************************
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18 #include <XMC4500.h>
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21 #define INPUT_PD 0x01
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22 #define INPUT_PU 0x02
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23 #define INPUT_PPS 0x03
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24 #define INPUT_INV 0x04
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25 #define INPUT_INV_PD 0x05
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26 #define INPUT_INV_PU 0x06
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27 #define INPUT_INV_PPS 0x07
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28 #define OUTPUT_PP_GP 0x10
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29 #define OUTPUT_PP_AF1 0x11
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30 #define OUTPUT_PP_AF2 0x12
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31 #define OUTPUT_PP_AF3 0x13
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32 #define OUTPUT_PP_AF4 0x14
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33 #define OUTPUT_OD_GP 0x18
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34 #define OUTPUT_OD_AF1 0x19
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35 #define OUTPUT_OD_AF2 0x1A
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36 #define OUTPUT_OD_AF3 0x1B
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37 #define OUTPUT_OD_AF4 0X1C
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42 #define VERYSTRONG 0x0
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44 #define Set(PinName) SET_##PinName
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45 #define Reset(PinName) RESET_##PinName
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46 #define Toggle(PinName) TOGGLE_##PinName
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48 #define SET_P0_0 PORT0->OMR = 0x00000001
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49 #define SET_P0_1 PORT0->OMR = 0x00000002
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50 #define SET_P0_2 PORT0->OMR = 0x00000004
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51 #define SET_P0_3 PORT0->OMR = 0x00000008
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52 #define SET_P0_4 PORT0->OMR = 0x00000010
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53 #define SET_P0_5 PORT0->OMR = 0x00000020
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54 #define SET_P0_6 PORT0->OMR = 0x00000040
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55 #define SET_P0_7 PORT0->OMR = 0x00000080
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56 #define SET_P0_8 PORT0->OMR = 0x00000100
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57 #define SET_P0_9 PORT0->OMR = 0x00000200
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58 #define SET_P0_10 PORT0->OMR = 0x00000400
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59 #define SET_P0_11 PORT0->OMR = 0x00000800
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60 #define SET_P0_12 PORT0->OMR = 0x00001000
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61 #define SET_P0_13 PORT0->OMR = 0x00002000
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62 #define SET_P0_14 PORT0->OMR = 0x00004000
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63 #define SET_P0_15 PORT0->OMR = 0x00008000
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65 #define RESET_P0_0 PORT0->OMR = 0x00010000
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66 #define RESET_P0_1 PORT0->OMR = 0x00020000
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67 #define RESET_P0_2 PORT0->OMR = 0x00040000
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68 #define RESET_P0_3 PORT0->OMR = 0x00080000
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69 #define RESET_P0_4 PORT0->OMR = 0x00100000
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70 #define RESET_P0_5 PORT0->OMR = 0x00200000
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71 #define RESET_P0_6 PORT0->OMR = 0x00400000
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72 #define RESET_P0_7 PORT0->OMR = 0x00800000
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73 #define RESET_P0_8 PORT0->OMR = 0x01000000
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74 #define RESET_P0_9 PORT0->OMR = 0x02000000
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75 #define RESET_P0_10 PORT0->OMR = 0x04000000
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76 #define RESET_P0_11 PORT0->OMR= 0x08000000
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77 #define RESET_P0_12 PORT0->OMR = 0x10000000
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78 #define RESET_P0_13 PORT0->OMR = 0x20000000
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79 #define RESET_P0_14 PORT0->OMR = 0x40000000
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80 #define RESET_P0_15 PORT0->OMR = 0x80000000
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82 #define TOGGLE_P0_0 PORT0->OMR = 0x00010001
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83 #define TOGGLE_P0_1 PORT0->OMR = 0x00020002
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84 #define TOGGLE_P0_2 PORT0->OMR = 0x00040004
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85 #define TOGGLE_P0_3 PORT0->OMR = 0x00080008
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86 #define TOGGLE_P0_4 PORT0->OMR = 0x00100010
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87 #define TOGGLE_P0_5 PORT0->OMR = 0x00200020
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88 #define TOGGLE_P0_6 PORT0->OMR = 0x00400040
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89 #define TOGGLE_P0_7 PORT0->OMR = 0x00800080
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90 #define TOGGLE_P0_8 PORT0->OMR = 0x01000100
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91 #define TOGGLE_P0_9 PORT0->OMR = 0x02000200
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92 #define TOGGLE_P0_10 PORT0->OMR = 0x04000400
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93 #define TOGGLE_P0_11 PORT0->OMR = 0x08000800
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94 #define TOGGLE_P0_12 PORT0->OMR = 0x10001000
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95 #define TOGGLE_P0_13 PORT0->OMR = 0x20002000
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96 #define TOGGLE_P0_14 PORT0->OMR = 0x40004000
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97 #define TOGGLE_P0_15 PORT0->OMR = 0x80008000
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99 #define Control_P0_0(Mode, DriveStrength) PORT0->IOCR0 = (PORT0->IOCR0 & ~0x000000F8) | (Mode << 3); PORT0->PDR0 = (PORT0->PDR0 & ~0x00000007) | (DriveStrength)
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100 #define Control_P0_1(Mode, DriveStrength) PORT0->IOCR0 = (PORT0->IOCR0 & ~0x0000F800) | (Mode << 11); PORT0->PDR0 = (PORT0->PDR0 & ~0x00000070) | (DriveStrength << 4)
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101 #define Control_P0_2(Mode, DriveStrength) PORT0->IOCR0 = (PORT0->IOCR0 & ~0x00F80000) | (Mode << 19); PORT0->PDR0 = (PORT0->PDR0 & ~0x00000700) | (DriveStrength << 8)
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102 #define Control_P0_3(Mode, DriveStrength) PORT0->IOCR0 = (PORT0->IOCR0 & ~0xF8000000) | (Mode << 27); PORT0->PDR0 = (PORT0->PDR0 & ~0x00007000) | (DriveStrength << 12)
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103 #define Control_P0_4(Mode, DriveStrength) PORT0->IOCR4 = (PORT0->IOCR4 & ~0x000000F8) | (Mode << 3); PORT0->PDR0 = (PORT0->PDR0 & ~0x00070000) | (DriveStrength << 16)
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104 #define Control_P0_5(Mode, DriveStrength) PORT0->IOCR4 = (PORT0->IOCR4 & ~0x0000F800) | (Mode << 11); PORT0->PDR0 = (PORT0->PDR0 & ~0x00700000) | (DriveStrength << 20)
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105 #define Control_P0_6(Mode, DriveStrength) PORT0->IOCR4 = (PORT0->IOCR4 & ~0x00F80000) | (Mode << 19); PORT0->PDR0 = (PORT0->PDR0 & ~0x07000000) | (DriveStrength << 24)
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106 #define Control_P0_7(Mode, DriveStrength) PORT0->IOCR4 = (PORT0->IOCR4 & ~0xF8000000) | (Mode << 27); PORT0->PDR0 = (PORT0->PDR0 & ~0x70000000) | (DriveStrength << 28)
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107 #define Control_P0_8(Mode, DriveStrength) PORT0->IOCR8 = (PORT0->IOCR8 & ~0x000000F8) | (Mode << 3); PORT0->PDR1 = (PORT0->PDR1 & ~0x00000007) | (DriveStrength)
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108 #define Control_P0_9(Mode, DriveStrength) PORT0->IOCR8 = (PORT0->IOCR8 & ~0x0000F800) | (Mode << 11); PORT0->PDR1 = (PORT0->PDR1 & ~0x00000070) | (DriveStrength << 4)
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109 #define Control_P0_10(Mode, DriveStrength) PORT0->IOCR8 = (PORT0->IOCR8 & ~0x00F80000) | (Mode << 19); PORT0->PDR1 = (PORT0->PDR1 & ~0x00000700) | (DriveStrength << 8)
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110 #define Control_P0_11(Mode, DriveStrength) PORT0->IOCR8 = (PORT0->IOCR8 & ~0xF8000000) | (Mode << 27); PORT0->PDR1 = (PORT0->PDR1 & ~0x00007000) | (DriveStrength << 12)
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111 #define Control_P0_12(Mode, DriveStrength) PORT0->IOCR12 = (PORT0->IOCR12 & ~0x000000F8) | (Mode << 3); PORT0->PDR1 = (PORT0->PDR1 & ~0x00070000) | (DriveStrength << 16)
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112 #define Control_P0_13(Mode, DriveStrength) PORT0->IOCR12 = (PORT0->IOCR12 & ~0x0000F800) | (Mode << 11); PORT0->PDR1 = (PORT0->PDR1 & ~0x00700000) | (DriveStrength << 20)
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113 #define Control_P0_14(Mode, DriveStrength) PORT0->IOCR12 = (PORT0->IOCR12 & ~0x00F80000) | (Mode << 19); PORT0->PDR1 = (PORT0->PDR1 & ~0x07000000) | (DriveStrength << 24)
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114 #define Control_P0_15(Mode, DriveStrength) PORT0->IOCR12 = (PORT0->IOCR12 & ~0xF8000000) | (Mode << 27); PORT0->PDR1 = (PORT0->PDR1 & ~0x70000000) | (DriveStrength << 28)
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116 //********************************************
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118 #define SET_P1_0 PORT1->OMR = 0x00000001
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119 #define SET_P1_1 PORT1->OMR = 0x00000002
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120 #define SET_P1_2 PORT1->OMR = 0x00000004
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121 #define SET_P1_3 PORT1->OMR = 0x00000008
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122 #define SET_P1_4 PORT1->OMR = 0x00000010
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123 #define SET_P1_5 PORT1->OMR = 0x00000020
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124 #define SET_P1_6 PORT1->OMR = 0x00000040
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125 #define SET_P1_7 PORT1->OMR = 0x00000080
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126 #define SET_P1_8 PORT1->OMR = 0x00000100
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127 #define SET_P1_9 PORT1->OMR = 0x00000200
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128 #define SET_P1_10 PORT1->OMR = 0x00000400
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129 #define SET_P1_11 PORT1->OMR = 0x00000800
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130 #define SET_P1_12 PORT1->OMR = 0x00001000
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131 #define SET_P1_13 PORT1->OMR = 0x00002000
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132 #define SET_P1_14 PORT1->OMR = 0x00004000
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133 #define SET_P1_15 PORT1->OMR = 0x00008000
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135 #define RESET_P1_0 PORT1->OMR = 0x00010000
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136 #define RESET_P1_1 PORT1->OMR = 0x00020000
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137 #define RESET_P1_2 PORT1->OMR = 0x00040000
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138 #define RESET_P1_3 PORT1->OMR = 0x00080000
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139 #define RESET_P1_4 PORT1->OMR = 0x00100000
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140 #define RESET_P1_5 PORT1->OMR = 0x00200000
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141 #define RESET_P1_6 PORT1->OMR = 0x00400000
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142 #define RESET_P1_7 PORT1->OMR = 0x00800000
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143 #define RESET_P1_8 PORT1->OMR = 0x01000000
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144 #define RESET_P1_9 PORT1->OMR = 0x02000000
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145 #define RESET_P1_10 PORT1->OMR = 0x04000000
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146 #define RESET_P1_11 PORT1->OMR= 0x08000000
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147 #define RESET_P1_12 PORT1->OMR = 0x10000000
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148 #define RESET_P1_13 PORT1->OMR = 0x20000000
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149 #define RESET_P1_14 PORT1->OMR = 0x40000000
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150 #define RESET_P1_15 PORT1->OMR = 0x80000000
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152 #define TOGGLE_P1_0 PORT1->OMR = 0x00010001
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153 #define TOGGLE_P1_1 PORT1->OMR = 0x00020002
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154 #define TOGGLE_P1_2 PORT1->OMR = 0x00040004
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155 #define TOGGLE_P1_3 PORT1->OMR = 0x00080008
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156 #define TOGGLE_P1_4 PORT1->OMR = 0x00100010
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157 #define TOGGLE_P1_5 PORT1->OMR = 0x00200020
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158 #define TOGGLE_P1_6 PORT1->OMR = 0x00400040
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159 #define TOGGLE_P1_7 PORT1->OMR = 0x00800080
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160 #define TOGGLE_P1_8 PORT1->OMR = 0x01000100
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161 #define TOGGLE_P1_9 PORT1->OMR = 0x02000200
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162 #define TOGGLE_P1_10 PORT1->OMR = 0x04000400
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163 #define TOGGLE_P1_11 PORT1->OMR = 0x08000800
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164 #define TOGGLE_P1_12 PORT1->OMR = 0x10001000
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165 #define TOGGLE_P1_13 PORT1->OMR = 0x20002000
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166 #define TOGGLE_P1_14 PORT1->OMR = 0x40004000
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167 #define TOGGLE_P1_15 PORT1->OMR = 0x80008000
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169 #define Control_P1_0(Mode, DriveStrength) PORT1->IOCR0 = (PORT1->IOCR0 & ~0x000000F8) | (Mode << 3); PORT1->PDR0 = (PORT1->PDR0 & ~0x00000007) | (DriveStrength)
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170 #define Control_P1_1(Mode, DriveStrength) PORT1->IOCR0 = (PORT1->IOCR0 & ~0x0000F800) | (Mode << 11); PORT1->PDR0 = (PORT1->PDR0 & ~0x00000070) | (DriveStrength << 4)
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171 #define Control_P1_2(Mode, DriveStrength) PORT1->IOCR0 = (PORT1->IOCR0 & ~0x00F80000) | (Mode << 19); PORT1->PDR0 = (PORT1->PDR0 & ~0x00000700) | (DriveStrength << 8)
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172 #define Control_P1_3(Mode, DriveStrength) PORT1->IOCR0 = (PORT1->IOCR0 & ~0xF8000000) | (Mode << 27); PORT1->PDR0 = (PORT1->PDR0 & ~0x00007000) | (DriveStrength << 12)
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173 #define Control_P1_4(Mode, DriveStrength) PORT1->IOCR4 = (PORT1->IOCR4 & ~0x000000F8) | (Mode << 3); PORT1->PDR0 = (PORT1->PDR0 & ~0x00070000) | (DriveStrength << 16)
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174 #define Control_P1_5(Mode, DriveStrength) PORT1->IOCR4 = (PORT1->IOCR4 & ~0x0000F800) | (Mode << 11); PORT1->PDR0 = (PORT1->PDR0 & ~0x00700000) | (DriveStrength << 20)
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175 #define Control_P1_6(Mode, DriveStrength) PORT1->IOCR4 = (PORT1->IOCR4 & ~0x00F80000) | (Mode << 19); PORT1->PDR0 = (PORT1->PDR0 & ~0x07000000) | (DriveStrength << 24)
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176 #define Control_P1_7(Mode, DriveStrength) PORT1->IOCR4 = (PORT1->IOCR4 & ~0xF8000000) | (Mode << 27); PORT1->PDR0 = (PORT1->PDR0 & ~0x70000000) | (DriveStrength << 28)
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177 #define Control_P1_8(Mode, DriveStrength) PORT1->IOCR8 = (PORT1->IOCR8 & ~0x000000F8) | (Mode << 3); PORT1->PDR1 = (PORT1->PDR1 & ~0x00000007) | (DriveStrength)
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178 #define Control_P1_9(Mode, DriveStrength) PORT1->IOCR8 = (PORT1->IOCR8 & ~0x0000F800) | (Mode << 11); PORT1->PDR1 = (PORT1->PDR1 & ~0x00000070) | (DriveStrength << 4)
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179 #define Control_P1_10(Mode, DriveStrength) PORT1->IOCR8 = (PORT1->IOCR8 & ~0x00F80000) | (Mode << 19); PORT1->PDR1 = (PORT1->PDR1 & ~0x00000700) | (DriveStrength << 8)
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180 #define Control_P1_11(Mode, DriveStrength) PORT1->IOCR8 = (PORT1->IOCR8 & ~0xF8000000) | (Mode << 27); PORT1->PDR1 = (PORT1->PDR1 & ~0x00007000) | (DriveStrength << 12)
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181 #define Control_P1_12(Mode, DriveStrength) PORT1->IOCR12 = (PORT1->IOCR12 & ~0x000000F8) | (Mode << 3); PORT1->PDR1 = (PORT1->PDR1 & ~0x00070000) | (DriveStrength << 16)
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182 #define Control_P1_13(Mode, DriveStrength) PORT1->IOCR12 = (PORT1->IOCR12 & ~0x0000F800) | (Mode << 11); PORT1->PDR1 = (PORT1->PDR1 & ~0x00700000) | (DriveStrength << 20)
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183 #define Control_P1_14(Mode, DriveStrength) PORT1->IOCR12 = (PORT1->IOCR12 & ~0x00F80000) | (Mode << 19); PORT1->PDR1 = (PORT1->PDR1 & ~0x07000000) | (DriveStrength << 24)
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184 #define Control_P1_15(Mode, DriveStrength) PORT1->IOCR12 = (PORT1->IOCR12 & ~0xF8000000) | (Mode << 27); PORT1->PDR1 = (PORT1->PDR1 & ~0x70000000) | (DriveStrength << 28)
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186 //********************************************
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188 #define SET_P2_0 PORT2->OMR = 0x00000001
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189 #define SET_P2_1 PORT2->OMR = 0x00000002
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190 #define SET_P2_2 PORT2->OMR = 0x00000004
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191 #define SET_P2_3 PORT2->OMR = 0x00000008
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192 #define SET_P2_4 PORT2->OMR = 0x00000010
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193 #define SET_P2_5 PORT2->OMR = 0x00000020
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194 #define SET_P2_6 PORT2->OMR = 0x00000040
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195 #define SET_P2_7 PORT2->OMR = 0x00000080
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196 #define SET_P2_8 PORT2->OMR = 0x00000100
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197 #define SET_P2_9 PORT2->OMR = 0x00000200
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198 #define SET_P2_10 PORT2->OMR = 0x00000400
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199 #define SET_P2_11 PORT2->OMR = 0x00000800
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200 #define SET_P2_12 PORT2->OMR = 0x00001000
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201 #define SET_P2_13 PORT2->OMR = 0x00002000
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202 #define SET_P2_14 PORT2->OMR = 0x00004000
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203 #define SET_P2_15 PORT2->OMR = 0x00008000
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205 #define RESET_P2_0 PORT2->OMR = 0x00010000
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206 #define RESET_P2_1 PORT2->OMR = 0x00020000
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207 #define RESET_P2_2 PORT2->OMR = 0x00040000
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208 #define RESET_P2_3 PORT2->OMR = 0x00080000
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209 #define RESET_P2_4 PORT2->OMR = 0x00100000
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210 #define RESET_P2_5 PORT2->OMR = 0x00200000
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211 #define RESET_P2_6 PORT2->OMR = 0x00400000
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212 #define RESET_P2_7 PORT2->OMR = 0x00800000
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213 #define RESET_P2_8 PORT2->OMR = 0x01000000
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214 #define RESET_P2_9 PORT2->OMR = 0x02000000
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215 #define RESET_P2_10 PORT2->OMR = 0x04000000
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216 #define RESET_P2_11 PORT2->OMR= 0x08000000
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217 #define RESET_P2_12 PORT2->OMR = 0x10000000
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218 #define RESET_P2_13 PORT2->OMR = 0x20000000
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219 #define RESET_P2_14 PORT2->OMR = 0x40000000
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220 #define RESET_P2_15 PORT2->OMR = 0x80000000
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222 #define TOGGLE_P2_0 PORT2->OMR = 0x00010001
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223 #define TOGGLE_P2_1 PORT2->OMR = 0x00020002
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224 #define TOGGLE_P2_2 PORT2->OMR = 0x00040004
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225 #define TOGGLE_P2_3 PORT2->OMR = 0x00080008
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226 #define TOGGLE_P2_4 PORT2->OMR = 0x00100010
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227 #define TOGGLE_P2_5 PORT2->OMR = 0x00200020
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228 #define TOGGLE_P2_6 PORT2->OMR = 0x00400040
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229 #define TOGGLE_P2_7 PORT2->OMR = 0x00800080
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230 #define TOGGLE_P2_8 PORT2->OMR = 0x01000100
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231 #define TOGGLE_P2_9 PORT2->OMR = 0x02000200
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232 #define TOGGLE_P2_10 PORT2->OMR = 0x04000400
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233 #define TOGGLE_P2_11 PORT2->OMR = 0x08000800
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234 #define TOGGLE_P2_12 PORT2->OMR = 0x10001000
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235 #define TOGGLE_P2_13 PORT2->OMR = 0x20002000
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236 #define TOGGLE_P2_14 PORT2->OMR = 0x40004000
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237 #define TOGGLE_P2_15 PORT2->OMR = 0x80008000
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239 #define Control_P2_0(Mode, DriveStrength) PORT2->IOCR0 = (PORT2->IOCR0 & ~0x000000F8) | (Mode << 3); PORT2->PDR0 = (PORT2->PDR0 & ~0x00000007) | (DriveStrength)
\r
240 #define Control_P2_1(Mode, DriveStrength) PORT2->IOCR0 = (PORT2->IOCR0 & ~0x0000F800) | (Mode << 11); PORT2->PDR0 = (PORT2->PDR0 & ~0x00000070) | (DriveStrength << 4)
\r
241 #define Control_P2_2(Mode, DriveStrength) PORT2->IOCR0 = (PORT2->IOCR0 & ~0x00F80000) | (Mode << 19); PORT2->PDR0 = (PORT2->PDR0 & ~0x00000700) | (DriveStrength << 8)
\r
242 #define Control_P2_3(Mode, DriveStrength) PORT2->IOCR0 = (PORT2->IOCR0 & ~0xF8000000) | (Mode << 27); PORT2->PDR0 = (PORT2->PDR0 & ~0x00007000) | (DriveStrength << 12)
\r
243 #define Control_P2_4(Mode, DriveStrength) PORT2->IOCR4 = (PORT2->IOCR4 & ~0x000000F8) | (Mode << 3); PORT2->PDR0 = (PORT2->PDR0 & ~0x00070000) | (DriveStrength << 16)
\r
244 #define Control_P2_5(Mode, DriveStrength) PORT2->IOCR4 = (PORT2->IOCR4 & ~0x0000F800) | (Mode << 11); PORT2->PDR0 = (PORT2->PDR0 & ~0x00700000) | (DriveStrength << 20)
\r
245 #define Control_P2_6(Mode, DriveStrength) PORT2->IOCR4 = (PORT2->IOCR4 & ~0x00F80000) | (Mode << 19); PORT2->PDR0 = (PORT2->PDR0 & ~0x07000000) | (DriveStrength << 24)
\r
246 #define Control_P2_7(Mode, DriveStrength) PORT2->IOCR4 = (PORT2->IOCR4 & ~0xF8000000) | (Mode << 27); PORT2->PDR0 = (PORT2->PDR0 & ~0x70000000) | (DriveStrength << 28)
\r
247 #define Control_P2_8(Mode, DriveStrength) PORT2->IOCR8 = (PORT2->IOCR8 & ~0x000000F8) | (Mode << 3); PORT2->PDR1 = (PORT2->PDR1 & ~0x00000007) | (DriveStrength)
\r
248 #define Control_P2_9(Mode, DriveStrength) PORT2->IOCR8 = (PORT2->IOCR8 & ~0x0000F800) | (Mode << 11); PORT2->PDR1 = (PORT2->PDR1 & ~0x00000070) | (DriveStrength << 4)
\r
249 #define Control_P2_10(Mode, DriveStrength) PORT2->IOCR8 = (PORT2->IOCR8 & ~0x00F80000) | (Mode << 19); PORT2->PDR1 = (PORT2->PDR1 & ~0x00000700) | (DriveStrength << 8)
\r
250 #define Control_P2_11(Mode, DriveStrength) PORT2->IOCR8 = (PORT2->IOCR8 & ~0xF8000000) | (Mode << 27); PORT2->PDR1 = (PORT2->PDR1 & ~0x00007000) | (DriveStrength << 12)
\r
251 #define Control_P2_12(Mode, DriveStrength) PORT2->IOCR12 = (PORT2->IOCR12 & ~0x000000F8) | (Mode << 3); PORT2->PDR1 = (PORT2->PDR1 & ~0x00070000) | (DriveStrength << 16)
\r
252 #define Control_P2_13(Mode, DriveStrength) PORT2->IOCR12 = (PORT2->IOCR12 & ~0x0000F800) | (Mode << 11); PORT2->PDR1 = (PORT2->PDR1 & ~0x00700000) | (DriveStrength << 20)
\r
253 #define Control_P2_14(Mode, DriveStrength) PORT2->IOCR12 = (PORT2->IOCR12 & ~0x00F80000) | (Mode << 19); PORT2->PDR1 = (PORT2->PDR1 & ~0x07000000) | (DriveStrength << 24)
\r
254 #define Control_P2_15(Mode, DriveStrength) PORT2->IOCR12 = (PORT2->IOCR12 & ~0xF8000000) | (Mode << 27); PORT2->PDR1 = (PORT2->PDR1 & ~0x70000000) | (DriveStrength << 28)
\r
256 //********************************************
\r
258 #define SET_P3_0 PORT3->OMR = 0x00000001
\r
259 #define SET_P3_1 PORT3->OMR = 0x00000002
\r
260 #define SET_P3_2 PORT3->OMR = 0x00000004
\r
261 #define SET_P3_3 PORT3->OMR = 0x00000008
\r
262 #define SET_P3_4 PORT3->OMR = 0x00000010
\r
263 #define SET_P3_5 PORT3->OMR = 0x00000020
\r
264 #define SET_P3_6 PORT3->OMR = 0x00000040
\r
265 #define SET_P3_7 PORT3->OMR = 0x00000080
\r
266 #define SET_P3_8 PORT3->OMR = 0x00000100
\r
267 #define SET_P3_9 PORT3->OMR = 0x00000200
\r
268 #define SET_P3_10 PORT3->OMR = 0x00000400
\r
269 #define SET_P3_11 PORT3->OMR = 0x00000800
\r
270 #define SET_P3_12 PORT3->OMR = 0x00001000
\r
271 #define SET_P3_13 PORT3->OMR = 0x00002000
\r
272 #define SET_P3_14 PORT3->OMR = 0x00004000
\r
273 #define SET_P3_15 PORT3->OMR = 0x00008000
\r
275 #define RESET_P3_0 PORT3->OMR = 0x00010000
\r
276 #define RESET_P3_1 PORT3->OMR = 0x00020000
\r
277 #define RESET_P3_2 PORT3->OMR = 0x00040000
\r
278 #define RESET_P3_3 PORT3->OMR = 0x00080000
\r
279 #define RESET_P3_4 PORT3->OMR = 0x00100000
\r
280 #define RESET_P3_5 PORT3->OMR = 0x00200000
\r
281 #define RESET_P3_6 PORT3->OMR = 0x00400000
\r
282 #define RESET_P3_7 PORT3->OMR = 0x00800000
\r
283 #define RESET_P3_8 PORT3->OMR = 0x01000000
\r
284 #define RESET_P3_9 PORT3->OMR = 0x02000000
\r
285 #define RESET_P3_10 PORT3->OMR = 0x04000000
\r
286 #define RESET_P3_11 PORT3->OMR= 0x08000000
\r
287 #define RESET_P3_12 PORT3->OMR = 0x10000000
\r
288 #define RESET_P3_13 PORT3->OMR = 0x20000000
\r
289 #define RESET_P3_14 PORT3->OMR = 0x40000000
\r
290 #define RESET_P3_15 PORT3->OMR = 0x80000000
\r
292 #define TOGGLE_P3_0 PORT3->OMR = 0x00010001
\r
293 #define TOGGLE_P3_1 PORT3->OMR = 0x00020002
\r
294 #define TOGGLE_P3_2 PORT3->OMR = 0x00040004
\r
295 #define TOGGLE_P3_3 PORT3->OMR = 0x00080008
\r
296 #define TOGGLE_P3_4 PORT3->OMR = 0x00100010
\r
297 #define TOGGLE_P3_5 PORT3->OMR = 0x00200020
\r
298 #define TOGGLE_P3_6 PORT3->OMR = 0x00400040
\r
299 #define TOGGLE_P3_7 PORT3->OMR = 0x00800080
\r
300 #define TOGGLE_P3_8 PORT3->OMR = 0x01000100
\r
301 #define TOGGLE_P3_9 PORT3->OMR = 0x02000200
\r
302 #define TOGGLE_P3_10 PORT3->OMR = 0x04000400
\r
303 #define TOGGLE_P3_11 PORT3->OMR = 0x08000800
\r
304 #define TOGGLE_P3_12 PORT3->OMR = 0x10001000
\r
305 #define TOGGLE_P3_13 PORT3->OMR = 0x20002000
\r
306 #define TOGGLE_P3_14 PORT3->OMR = 0x40004000
\r
307 #define TOGGLE_P3_15 PORT3->OMR = 0x80008000
\r
309 #define Control_P3_0(Mode, DriveStrength) PORT3->IOCR0 = (PORT3->IOCR0 & ~0x000000F8) | (Mode << 3); PORT3->PDR0 = (PORT3->PDR0 & ~0x00000007) | (DriveStrength)
\r
310 #define Control_P3_1(Mode, DriveStrength) PORT3->IOCR0 = (PORT3->IOCR0 & ~0x0000F800) | (Mode << 11); PORT3->PDR0 = (PORT3->PDR0 & ~0x00000070) | (DriveStrength << 4)
\r
311 #define Control_P3_2(Mode, DriveStrength) PORT3->IOCR0 = (PORT3->IOCR0 & ~0x00F80000) | (Mode << 19); PORT3->PDR0 = (PORT3->PDR0 & ~0x00000700) | (DriveStrength << 8)
\r
312 #define Control_P3_3(Mode, DriveStrength) PORT3->IOCR0 = (PORT3->IOCR0 & ~0xF8000000) | (Mode << 27); PORT3->PDR0 = (PORT3->PDR0 & ~0x00007000) | (DriveStrength << 12)
\r
313 #define Control_P3_4(Mode, DriveStrength) PORT3->IOCR4 = (PORT3->IOCR4 & ~0x000000F8) | (Mode << 3); PORT3->PDR0 = (PORT3->PDR0 & ~0x00070000) | (DriveStrength << 16)
\r
314 #define Control_P3_5(Mode, DriveStrength) PORT3->IOCR4 = (PORT3->IOCR4 & ~0x0000F800) | (Mode << 11); PORT3->PDR0 = (PORT3->PDR0 & ~0x00700000) | (DriveStrength << 20)
\r
315 #define Control_P3_6(Mode, DriveStrength) PORT3->IOCR4 = (PORT3->IOCR4 & ~0x00F80000) | (Mode << 19); PORT3->PDR0 = (PORT3->PDR0 & ~0x07000000) | (DriveStrength << 24)
\r
316 #define Control_P3_7(Mode, DriveStrength) PORT3->IOCR4 = (PORT3->IOCR4 & ~0xF8000000) | (Mode << 27); PORT3->PDR0 = (PORT3->PDR0 & ~0x70000000) | (DriveStrength << 28)
\r
317 #define Control_P3_8(Mode, DriveStrength) PORT3->IOCR8 = (PORT3->IOCR8 & ~0x000000F8) | (Mode << 3); PORT3->PDR1 = (PORT3->PDR1 & ~0x00000007) | (DriveStrength)
\r
318 #define Control_P3_9(Mode, DriveStrength) PORT3->IOCR8 = (PORT3->IOCR8 & ~0x0000F800) | (Mode << 11); PORT3->PDR1 = (PORT3->PDR1 & ~0x00000070) | (DriveStrength << 4)
\r
319 #define Control_P3_10(Mode, DriveStrength) PORT3->IOCR8 = (PORT3->IOCR8 & ~0x00F80000) | (Mode << 19); PORT3->PDR1 = (PORT3->PDR1 & ~0x00000700) | (DriveStrength << 8)
\r
320 #define Control_P3_11(Mode, DriveStrength) PORT3->IOCR8 = (PORT3->IOCR8 & ~0xF8000000) | (Mode << 27); PORT3->PDR1 = (PORT3->PDR1 & ~0x00007000) | (DriveStrength << 12)
\r
321 #define Control_P3_12(Mode, DriveStrength) PORT3->IOCR12 = (PORT3->IOCR12 & ~0x000000F8) | (Mode << 3); PORT3->PDR1 = (PORT3->PDR1 & ~0x00070000) | (DriveStrength << 16)
\r
322 #define Control_P3_13(Mode, DriveStrength) PORT3->IOCR12 = (PORT3->IOCR12 & ~0x0000F800) | (Mode << 11); PORT3->PDR1 = (PORT3->PDR1 & ~0x00700000) | (DriveStrength << 20)
\r
323 #define Control_P3_14(Mode, DriveStrength) PORT3->IOCR12 = (PORT3->IOCR12 & ~0x00F80000) | (Mode << 19); PORT3->PDR1 = (PORT3->PDR1 & ~0x07000000) | (DriveStrength << 24)
\r
324 #define Control_P3_15(Mode, DriveStrength) PORT3->IOCR12 = (PORT3->IOCR12 & ~0xF8000000) | (Mode << 27); PORT3->PDR1 = (PORT3->PDR1 & ~0x70000000) | (DriveStrength << 28)
\r
326 //********************************************
\r
328 #define SET_P4_0 PORT4->OMR = 0x00000001
\r
329 #define SET_P4_1 PORT4->OMR = 0x00000002
\r
330 #define SET_P4_2 PORT4->OMR = 0x00000004
\r
331 #define SET_P4_3 PORT4->OMR = 0x00000008
\r
332 #define SET_P4_4 PORT4->OMR = 0x00000010
\r
333 #define SET_P4_5 PORT4->OMR = 0x00000020
\r
334 #define SET_P4_6 PORT4->OMR = 0x00000040
\r
335 #define SET_P4_7 PORT4->OMR = 0x00000080
\r
337 #define RESET_P4_0 PORT4->OMR = 0x00010000
\r
338 #define RESET_P4_1 PORT4->OMR = 0x00020000
\r
339 #define RESET_P4_2 PORT4->OMR = 0x00040000
\r
340 #define RESET_P4_3 PORT4->OMR = 0x00080000
\r
341 #define RESET_P4_4 PORT4->OMR = 0x00100000
\r
342 #define RESET_P4_5 PORT4->OMR = 0x00200000
\r
343 #define RESET_P4_6 PORT4->OMR = 0x00400000
\r
344 #define RESET_P4_7 PORT4->OMR = 0x00800000
\r
346 #define TOGGLE_P4_0 PORT4->OMR = 0x00010001
\r
347 #define TOGGLE_P4_1 PORT4->OMR = 0x00020002
\r
348 #define TOGGLE_P4_2 PORT4->OMR = 0x00040004
\r
349 #define TOGGLE_P4_3 PORT4->OMR = 0x00080008
\r
350 #define TOGGLE_P4_4 PORT4->OMR = 0x00100010
\r
351 #define TOGGLE_P4_5 PORT4->OMR = 0x00200020
\r
352 #define TOGGLE_P4_6 PORT4->OMR = 0x00400040
\r
353 #define TOGGLE_P4_7 PORT4->OMR = 0x00800080
\r
355 #define Control_P4_0(Mode, DriveStrength) PORT4->IOCR0 = (PORT4->IOCR0 & ~0x000000F8) | (Mode << 3); PORT4->PDR0 = (PORT4->PDR0 & ~0x00000007) | (DriveStrength)
\r
356 #define Control_P4_1(Mode, DriveStrength) PORT4->IOCR0 = (PORT4->IOCR0 & ~0x0000F800) | (Mode << 11); PORT4->PDR0 = (PORT4->PDR0 & ~0x00000070) | (DriveStrength << 4)
\r
357 #define Control_P4_2(Mode, DriveStrength) PORT4->IOCR0 = (PORT4->IOCR0 & ~0x00F80000) | (Mode << 19); PORT4->PDR0 = (PORT4->PDR0 & ~0x00000700) | (DriveStrength << 8)
\r
358 #define Control_P4_3(Mode, DriveStrength) PORT4->IOCR0 = (PORT4->IOCR0 & ~0xF8000000) | (Mode << 27); PORT4->PDR0 = (PORT4->PDR0 & ~0x00007000) | (DriveStrength << 12)
\r
359 #define Control_P4_4(Mode, DriveStrength) PORT4->IOCR4 = (PORT4->IOCR4 & ~0x000000F8) | (Mode << 3); PORT4->PDR0 = (PORT4->PDR0 & ~0x00070000) | (DriveStrength << 16)
\r
360 #define Control_P4_5(Mode, DriveStrength) PORT4->IOCR4 = (PORT4->IOCR4 & ~0x0000F800) | (Mode << 11); PORT4->PDR0 = (PORT4->PDR0 & ~0x00700000) | (DriveStrength << 20)
\r
361 #define Control_P4_6(Mode, DriveStrength) PORT4->IOCR4 = (PORT4->IOCR4 & ~0x00F80000) | (Mode << 19); PORT4->PDR0 = (PORT4->PDR0 & ~0x07000000) | (DriveStrength << 24)
\r
362 #define Control_P4_7(Mode, DriveStrength) PORT4->IOCR4 = (PORT4->IOCR4 & ~0xF8000000) | (Mode << 27); PORT4->PDR0 = (PORT4->PDR0 & ~0x70000000) | (DriveStrength << 28)
\r
364 //********************************************
\r
366 #define SET_P5_0 PORT5->OMR = 0x00000001
\r
367 #define SET_P5_1 PORT5->OMR = 0x00000002
\r
368 #define SET_P5_2 PORT5->OMR = 0x00000004
\r
369 #define SET_P5_3 PORT5->OMR = 0x00000008
\r
370 #define SET_P5_4 PORT5->OMR = 0x00000010
\r
371 #define SET_P5_5 PORT5->OMR = 0x00000020
\r
372 #define SET_P5_6 PORT5->OMR = 0x00000040
\r
373 #define SET_P5_7 PORT5->OMR = 0x00000080
\r
374 #define SET_P5_8 PORT5->OMR = 0x00000100
\r
375 #define SET_P5_9 PORT5->OMR = 0x00000200
\r
376 #define SET_P5_10 PORT5->OMR = 0x00000400
\r
377 #define SET_P5_11 PORT5->OMR = 0x00000800
\r
378 #define SET_P5_12 PORT5->OMR = 0x00001000
\r
379 #define SET_P5_13 PORT5->OMR = 0x00002000
\r
380 #define SET_P5_14 PORT5->OMR = 0x00004000
\r
381 #define SET_P5_15 PORT5->OMR = 0x00008000
\r
383 #define RESET_P5_0 PORT5->OMR = 0x00010000
\r
384 #define RESET_P5_1 PORT5->OMR = 0x00020000
\r
385 #define RESET_P5_2 PORT5->OMR = 0x00040000
\r
386 #define RESET_P5_3 PORT5->OMR = 0x00080000
\r
387 #define RESET_P5_4 PORT5->OMR = 0x00100000
\r
388 #define RESET_P5_5 PORT5->OMR = 0x00200000
\r
389 #define RESET_P5_6 PORT5->OMR = 0x00400000
\r
390 #define RESET_P5_7 PORT5->OMR = 0x00800000
\r
391 #define RESET_P5_8 PORT5->OMR = 0x01000000
\r
392 #define RESET_P5_9 PORT5->OMR = 0x02000000
\r
393 #define RESET_P5_10 PORT5->OMR = 0x04000000
\r
394 #define RESET_P5_11 PORT5->OMR= 0x08000000
\r
395 #define RESET_P5_12 PORT5->OMR = 0x10000000
\r
396 #define RESET_P5_13 PORT5->OMR = 0x20000000
\r
397 #define RESET_P5_14 PORT5->OMR = 0x40000000
\r
398 #define RESET_P5_15 PORT5->OMR = 0x80000000
\r
400 #define TOGGLE_P5_0 PORT5->OMR = 0x00010001
\r
401 #define TOGGLE_P5_1 PORT5->OMR = 0x00020002
\r
402 #define TOGGLE_P5_2 PORT5->OMR = 0x00040004
\r
403 #define TOGGLE_P5_3 PORT5->OMR = 0x00080008
\r
404 #define TOGGLE_P5_4 PORT5->OMR = 0x00100010
\r
405 #define TOGGLE_P5_5 PORT5->OMR = 0x00200020
\r
406 #define TOGGLE_P5_6 PORT5->OMR = 0x00400040
\r
407 #define TOGGLE_P5_7 PORT5->OMR = 0x00800080
\r
408 #define TOGGLE_P5_8 PORT5->OMR = 0x01000100
\r
409 #define TOGGLE_P5_9 PORT5->OMR = 0x02000200
\r
410 #define TOGGLE_P5_10 PORT5->OMR = 0x04000400
\r
411 #define TOGGLE_P5_11 PORT5->OMR = 0x08000800
\r
412 #define TOGGLE_P5_12 PORT5->OMR = 0x10001000
\r
413 #define TOGGLE_P5_13 PORT5->OMR = 0x20002000
\r
414 #define TOGGLE_P5_14 PORT5->OMR = 0x40004000
\r
415 #define TOGGLE_P5_15 PORT5->OMR = 0x80008000
\r
417 #define Control_P5_0(Mode, DriveStrength) PORT5->IOCR0 = (PORT5->IOCR0 & ~0x000000F8) | (Mode << 3); PORT5->PDR0 = (PORT5->PDR0 & ~0x00000007) | (DriveStrength)
\r
418 #define Control_P5_1(Mode, DriveStrength) PORT5->IOCR0 = (PORT5->IOCR0 & ~0x0000F800) | (Mode << 11); PORT5->PDR0 = (PORT5->PDR0 & ~0x00000070) | (DriveStrength << 4)
\r
419 #define Control_P5_2(Mode, DriveStrength) PORT5->IOCR0 = (PORT5->IOCR0 & ~0x00F80000) | (Mode << 19); PORT5->PDR0 = (PORT5->PDR0 & ~0x00000700) | (DriveStrength << 8)
\r
420 #define Control_P5_3(Mode, DriveStrength) PORT5->IOCR0 = (PORT5->IOCR0 & ~0xF8000000) | (Mode << 27); PORT5->PDR0 = (PORT5->PDR0 & ~0x00007000) | (DriveStrength << 12)
\r
421 #define Control_P5_4(Mode, DriveStrength) PORT5->IOCR4 = (PORT5->IOCR4 & ~0x000000F8) | (Mode << 3); PORT5->PDR0 = (PORT5->PDR0 & ~0x00070000) | (DriveStrength << 16)
\r
422 #define Control_P5_5(Mode, DriveStrength) PORT5->IOCR4 = (PORT5->IOCR4 & ~0x0000F800) | (Mode << 11); PORT5->PDR0 = (PORT5->PDR0 & ~0x00700000) | (DriveStrength << 20)
\r
423 #define Control_P5_6(Mode, DriveStrength) PORT5->IOCR4 = (PORT5->IOCR4 & ~0x00F80000) | (Mode << 19); PORT5->PDR0 = (PORT5->PDR0 & ~0x07000000) | (DriveStrength << 24)
\r
424 #define Control_P5_7(Mode, DriveStrength) PORT5->IOCR4 = (PORT5->IOCR4 & ~0xF8000000) | (Mode << 27); PORT5->PDR0 = (PORT5->PDR0 & ~0x70000000) | (DriveStrength << 28)
\r
425 #define Control_P5_8(Mode, DriveStrength) PORT5->IOCR8 = (PORT5->IOCR8 & ~0x000000F8) | (Mode << 3); PORT5->PDR1 = (PORT5->PDR1 & ~0x00000007) | (DriveStrength)
\r
426 #define Control_P5_9(Mode, DriveStrength) PORT5->IOCR8 = (PORT5->IOCR8 & ~0x0000F800) | (Mode << 11); PORT5->PDR1 = (PORT5->PDR1 & ~0x00000070) | (DriveStrength << 4)
\r
427 #define Control_P5_10(Mode, DriveStrength) PORT5->IOCR8 = (PORT5->IOCR8 & ~0x00F80000) | (Mode << 19); PORT5->PDR1 = (PORT5->PDR1 & ~0x00000700) | (DriveStrength << 8)
\r
428 #define Control_P5_11(Mode, DriveStrength) PORT5->IOCR8 = (PORT5->IOCR8 & ~0xF8000000) | (Mode << 27); PORT5->PDR1 = (PORT5->PDR1 & ~0x00007000) | (DriveStrength << 12)
\r
429 #define Control_P5_12(Mode, DriveStrength) PORT5->IOCR12 = (PORT5->IOCR12 & ~0x000000F8) | (Mode << 3); PORT5->PDR1 = (PORT5->PDR1 & ~0x00070000) | (DriveStrength << 16)
\r
430 #define Control_P5_13(Mode, DriveStrength) PORT5->IOCR12 = (PORT5->IOCR12 & ~0x0000F800) | (Mode << 11); PORT5->PDR1 = (PORT5->PDR1 & ~0x00700000) | (DriveStrength << 20)
\r
431 #define Control_P5_14(Mode, DriveStrength) PORT5->IOCR12 = (PORT5->IOCR12 & ~0x00F80000) | (Mode << 19); PORT5->PDR1 = (PORT5->PDR1 & ~0x07000000) | (DriveStrength << 24)
\r
432 #define Control_P5_15(Mode, DriveStrength) PORT5->IOCR12 = (PORT5->IOCR12 & ~0xF8000000) | (Mode << 27); PORT5->PDR1 = (PORT5->PDR1 & ~0x70000000) | (DriveStrength << 28)
\r
434 //********************************************
\r
436 #define SET_P6_0 PORT6->OMR = 0x00000001
\r
437 #define SET_P6_1 PORT6->OMR = 0x00000002
\r
438 #define SET_P6_2 PORT6->OMR = 0x00000004
\r
439 #define SET_P6_3 PORT6->OMR = 0x00000008
\r
440 #define SET_P6_4 PORT6->OMR = 0x00000010
\r
441 #define SET_P6_5 PORT6->OMR = 0x00000020
\r
442 #define SET_P6_6 PORT6->OMR = 0x00000040
\r
443 #define SET_P6_7 PORT6->OMR = 0x00000080
\r
444 #define SET_P6_8 PORT6->OMR = 0x00000100
\r
445 #define SET_P6_9 PORT6->OMR = 0x00000200
\r
446 #define SET_P6_10 PORT6->OMR = 0x00000400
\r
447 #define SET_P6_11 PORT6->OMR = 0x00000800
\r
448 #define SET_P6_12 PORT6->OMR = 0x00001000
\r
449 #define SET_P6_13 PORT6->OMR = 0x00002000
\r
450 #define SET_P6_14 PORT6->OMR = 0x00004000
\r
451 #define SET_P6_15 PORT6->OMR = 0x00008000
\r
453 #define RESET_P6_0 PORT6->OMR = 0x00010000
\r
454 #define RESET_P6_1 PORT6->OMR = 0x00020000
\r
455 #define RESET_P6_2 PORT6->OMR = 0x00040000
\r
456 #define RESET_P6_3 PORT6->OMR = 0x00080000
\r
457 #define RESET_P6_4 PORT6->OMR = 0x00100000
\r
458 #define RESET_P6_5 PORT6->OMR = 0x00200000
\r
459 #define RESET_P6_6 PORT6->OMR = 0x00400000
\r
461 #define TOGGLE_P6_0 PORT6->OMR = 0x00010001
\r
462 #define TOGGLE_P6_1 PORT6->OMR = 0x00020002
\r
463 #define TOGGLE_P6_2 PORT6->OMR = 0x00040004
\r
464 #define TOGGLE_P6_3 PORT6->OMR = 0x00080008
\r
465 #define TOGGLE_P6_4 PORT6->OMR = 0x00100010
\r
466 #define TOGGLE_P6_5 PORT6->OMR = 0x00200020
\r
467 #define TOGGLE_P6_6 PORT6->OMR = 0x00400040
\r
469 #define Control_P6_0(Mode, DriveStrength) PORT6->IOCR0 = (PORT6->IOCR0 & ~0x000000F8) | (Mode << 3); PORT6->PDR0 = (PORT6->PDR0 & ~0x00000007) | (DriveStrength)
\r
470 #define Control_P6_1(Mode, DriveStrength) PORT6->IOCR0 = (PORT6->IOCR0 & ~0x0000F800) | (Mode << 11); PORT6->PDR0 = (PORT6->PDR0 & ~0x00000070) | (DriveStrength << 4)
\r
471 #define Control_P6_2(Mode, DriveStrength) PORT6->IOCR0 = (PORT6->IOCR0 & ~0x00F80000) | (Mode << 19); PORT6->PDR0 = (PORT6->PDR0 & ~0x00000700) | (DriveStrength << 8)
\r
472 #define Control_P6_3(Mode, DriveStrength) PORT6->IOCR0 = (PORT6->IOCR0 & ~0xF8000000) | (Mode << 27); PORT6->PDR0 = (PORT6->PDR0 & ~0x00007000) | (DriveStrength << 12)
\r
473 #define Control_P6_4(Mode, DriveStrength) PORT6->IOCR4 = (PORT6->IOCR4 & ~0x000000F8) | (Mode << 3); PORT6->PDR0 = (PORT6->PDR0 & ~0x00070000) | (DriveStrength << 16)
\r
474 #define Control_P6_5(Mode, DriveStrength) PORT6->IOCR4 = (PORT6->IOCR4 & ~0x0000F800) | (Mode << 11); PORT6->PDR0 = (PORT6->PDR0 & ~0x00700000) | (DriveStrength << 20)
\r
475 #define Control_P6_6(Mode, DriveStrength) PORT6->IOCR4 = (PORT6->IOCR4 & ~0x00F80000) | (Mode << 19); PORT6->PDR0 = (PORT6->PDR0 & ~0x07000000) | (DriveStrength << 24)
\r
477 //********************************************
\r