4 * \brief Parallel Input/Output (PIO) interrupt handler for SAM.
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6 * Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
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10 * Redistribution and use in source and binary forms, with or without
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11 * modification, are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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16 * 2. Redistributions in binary form must reproduce the above copyright notice,
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17 * this list of conditions and the following disclaimer in the documentation
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18 * and/or other materials provided with the distribution.
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20 * 3. The name of Atmel may not be used to endorse or promote products derived
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21 * from this software without specific prior written permission.
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23 * 4. This software may only be redistributed and used in connection with an
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24 * Atmel microcontroller product.
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26 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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29 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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34 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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35 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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36 * POSSIBILITY OF SUCH DAMAGE.
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42 #include "exceptions.h"
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44 #include "pio_handler.h"
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47 * Maximum number of interrupt sources that can be defined. This
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48 * constant can be increased, but the current value is the smallest possible one
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49 * that will be compatible with all existing projects.
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51 #define MAX_INTERRUPT_SOURCES 7
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54 * Describes a PIO interrupt source, including the PIO instance triggering the
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55 * interrupt and the associated interrupt handler.
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57 struct s_interrupt_source {
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62 /* Interrupt handler. */
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63 void (*handler) (const uint32_t, const uint32_t);
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67 /* List of interrupt sources. */
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68 static struct s_interrupt_source gs_interrupt_sources[MAX_INTERRUPT_SOURCES];
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70 /* Number of currently defined interrupt sources. */
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71 static uint32_t gs_ul_nb_sources = 0;
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74 * \brief Process an interrupt request on the given PIO controller.
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76 * \param p_pio PIO controller base address.
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77 * \param ul_id PIO controller ID.
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79 void pio_handler_process(Pio *p_pio, uint32_t ul_id)
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84 /* Read PIO controller status */
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85 status = pio_get_interrupt_status(p_pio);
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86 status &= pio_get_interrupt_mask(p_pio);
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88 /* Check pending events */
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90 /* Find triggering source */
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92 while (status != 0) {
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93 /* Source is configured on the same controller */
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94 if (gs_interrupt_sources[i].id == ul_id) {
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95 /* Source has PIOs whose statuses have changed */
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96 if ((status & gs_interrupt_sources[i].mask) != 0) {
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97 gs_interrupt_sources[i].handler(gs_interrupt_sources[i].id,
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98 gs_interrupt_sources[i].mask);
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99 status &= ~(gs_interrupt_sources[i].mask);
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108 * \brief Set an interrupt handler for the provided pins.
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109 * The provided handler will be called with the triggering pin as its parameter
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110 * as soon as an interrupt is detected.
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112 * \param p_pio PIO controller base address.
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113 * \param ul_id PIO ID.
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114 * \param ul_mask Pins (bit mask) to configure.
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115 * \param ul_attr Pins attribute to configure.
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116 * \param p_handler Interrupt handler function pointer.
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118 * \return 0 if successful, 1 if the maximum number of sources has been defined.
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120 uint32_t pio_handler_set(Pio *p_pio, uint32_t ul_id, uint32_t ul_mask,
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121 uint32_t ul_attr, void (*p_handler) (uint32_t, uint32_t))
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123 struct s_interrupt_source *pSource;
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125 if (gs_ul_nb_sources >= MAX_INTERRUPT_SOURCES)
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128 /* Define new source */
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129 pSource = &(gs_interrupt_sources[gs_ul_nb_sources]);
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130 pSource->id = ul_id;
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131 pSource->mask = ul_mask;
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132 pSource->attr = ul_attr;
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133 pSource->handler = p_handler;
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134 gs_ul_nb_sources++;
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136 /* Configure interrupt mode */
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137 pio_configure_interrupt(p_pio, ul_mask, ul_attr);
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143 * \brief Parallel IO Controller A interrupt handler.
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144 * Redefined PIOA interrupt handler for NVIC interrupt table.
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146 void PIOA_Handler(void)
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148 pio_handler_process(PIOA, ID_PIOA);
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152 * \brief Parallel IO Controller B interrupt handler
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153 * Redefined PIOB interrupt handler for NVIC interrupt table.
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155 void PIOB_Handler(void)
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157 pio_handler_process(PIOB, ID_PIOB);
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161 * \brief Parallel IO Controller C interrupt handler.
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162 * Redefined PIOC interrupt handler for NVIC interrupt table.
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164 void PIOC_Handler(void)
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166 pio_handler_process(PIOC, ID_PIOC);
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171 * \brief Parallel IO Controller D interrupt handler.
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172 * Redefined PIOD interrupt handler for NVIC interrupt table.
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174 void PIOD_Handler(void)
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176 pio_handler_process(PIOD, ID_PIOD);
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180 * \brief Parallel IO Controller E interrupt handler.
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181 * Redefined PIOE interrupt handler for NVIC interrupt table.
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183 void PIOE_Handler(void)
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185 pio_handler_process(PIOE, ID_PIOE);
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189 * \brief Parallel IO Controller F interrupt handler.
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190 * Redefined PIOF interrupt handler for NVIC interrupt table.
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192 void PIOF_Handler(void)
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194 pio_handler_process(PIOF, ID_PIOF);
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199 * \brief Initialize PIO interrupt management logic.
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201 * \note The desired priority of PIO must be provided.
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202 * Calling this function multiple times result in the reset of currently
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203 * configured interrupt on the provided PIO.
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205 * \param p_pio PIO controller base address.
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206 * \param ul_irqn NVIC line number.
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207 * \param ul_priority PIO controller interrupts priority.
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209 void pio_handler_set_priority(Pio *p_pio, IRQn_Type ul_irqn, uint32_t ul_priority)
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211 /* Configure PIO interrupt sources */
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212 pio_get_interrupt_status(p_pio);
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213 pio_disable_interrupt(p_pio, 0xFFFFFFFF);
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214 NVIC_DisableIRQ(ul_irqn);
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215 NVIC_ClearPendingIRQ(ul_irqn);
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216 NVIC_SetPriority(ul_irqn, ul_priority);
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217 NVIC_EnableIRQ(ul_irqn);
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