1 //*****************************************************************************
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3 // sysctl.h - Prototypes for the system control driver.
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5 // Copyright (c) 2005-2007 Luminary Micro, Inc. All rights reserved.
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7 // Software License Agreement
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9 // Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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10 // exclusively on LMI's microcontroller products.
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12 // The software is owned by LMI and/or its suppliers, and is protected under
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13 // applicable copyright laws. All rights are reserved. Any use in violation
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14 // of the foregoing restrictions may subject the user to criminal sanctions
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15 // under applicable laws, as well as to civil liability for the breach of the
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16 // terms and conditions of this license.
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18 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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19 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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20 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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21 // LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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22 // CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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24 // This is part of revision 1582 of the Stellaris Peripheral Driver Library.
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26 //*****************************************************************************
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28 #ifndef __SYSCTL_H__
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29 #define __SYSCTL_H__
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36 //*****************************************************************************
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38 // The following are values that can be passed to the
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39 // SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),
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40 // SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the
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41 // ulPeripheral parameter. The peripherals in the fourth group (upper nibble
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42 // is 3) can only be used with the SysCtlPeripheralPresent() API.
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44 //*****************************************************************************
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45 #define SYSCTL_PERIPH_PWM 0x00100010 // PWM
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46 #define SYSCTL_PERIPH_ADC 0x00100001 // ADC
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47 #define SYSCTL_PERIPH_HIBERNATE 0x00000040 // Hibernation module
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48 #define SYSCTL_PERIPH_WDOG 0x00000008 // Watchdog
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49 #define SYSCTL_PERIPH_CAN0 0x00100100 // CAN 0
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50 #define SYSCTL_PERIPH_CAN1 0x00100200 // CAN 1
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51 #define SYSCTL_PERIPH_CAN2 0x00100400 // CAN 2
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52 #define SYSCTL_PERIPH_UART0 0x10000001 // UART 0
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53 #define SYSCTL_PERIPH_UART1 0x10000002 // UART 1
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54 #define SYSCTL_PERIPH_UART2 0x10000004 // UART 2
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55 #define SYSCTL_PERIPH_SSI 0x10000010 // SSI
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56 #define SYSCTL_PERIPH_SSI0 0x10000010 // SSI 0
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57 #define SYSCTL_PERIPH_SSI1 0x10000020 // SSI 1
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58 #define SYSCTL_PERIPH_QEI 0x10000100 // QEI
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59 #define SYSCTL_PERIPH_QEI0 0x10000100 // QEI 0
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60 #define SYSCTL_PERIPH_QEI1 0x10000200 // QEI 1
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61 #define SYSCTL_PERIPH_I2C 0x10001000 // I2C
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62 #define SYSCTL_PERIPH_I2C0 0x10001000 // I2C 0
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63 #define SYSCTL_PERIPH_I2C1 0x10004000 // I2C 1
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64 #define SYSCTL_PERIPH_TIMER0 0x10100001 // Timer 0
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65 #define SYSCTL_PERIPH_TIMER1 0x10100002 // Timer 1
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66 #define SYSCTL_PERIPH_TIMER2 0x10100004 // Timer 2
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67 #define SYSCTL_PERIPH_TIMER3 0x10100008 // Timer 3
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68 #define SYSCTL_PERIPH_COMP0 0x10100100 // Analog comparator 0
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69 #define SYSCTL_PERIPH_COMP1 0x10100200 // Analog comparator 1
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70 #define SYSCTL_PERIPH_COMP2 0x10100400 // Analog comparator 2
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71 #define SYSCTL_PERIPH_GPIOA 0x20000001 // GPIO A
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72 #define SYSCTL_PERIPH_GPIOB 0x20000002 // GPIO B
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73 #define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
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74 #define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
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75 #define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
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76 #define SYSCTL_PERIPH_GPIOF 0x20000020 // GPIO F
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77 #define SYSCTL_PERIPH_GPIOG 0x20000040 // GPIO G
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78 #define SYSCTL_PERIPH_GPIOH 0x20000080 // GPIO H
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79 #define SYSCTL_PERIPH_ETH 0x20105000 // ETH
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80 #define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
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81 #define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
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82 #define SYSCTL_PERIPH_PLL 0x30000010 // PLL
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84 //*****************************************************************************
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86 // The following are values that can be passed to the SysCtlPinPresent() API
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87 // as the ulPin parameter.
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89 //*****************************************************************************
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90 #define SYSCTL_PIN_PWM0 0x00000001 // PWM0 pin
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91 #define SYSCTL_PIN_PWM1 0x00000002 // PWM1 pin
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92 #define SYSCTL_PIN_PWM2 0x00000004 // PWM2 pin
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93 #define SYSCTL_PIN_PWM3 0x00000008 // PWM3 pin
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94 #define SYSCTL_PIN_PWM4 0x00000010 // PWM4 pin
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95 #define SYSCTL_PIN_PWM5 0x00000020 // PWM5 pin
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96 #define SYSCTL_PIN_C0MINUS 0x00000040 // C0- pin
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97 #define SYSCTL_PIN_C0PLUS 0x00000080 // C0+ pin
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98 #define SYSCTL_PIN_C0O 0x00000100 // C0o pin
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99 #define SYSCTL_PIN_C1MINUS 0x00000200 // C1- pin
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100 #define SYSCTL_PIN_C1PLUS 0x00000400 // C1+ pin
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101 #define SYSCTL_PIN_C1O 0x00000800 // C1o pin
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102 #define SYSCTL_PIN_C2MINUS 0x00001000 // C2- pin
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103 #define SYSCTL_PIN_C2PLUS 0x00002000 // C2+ pin
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104 #define SYSCTL_PIN_C2O 0x00004000 // C2o pin
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105 #define SYSCTL_PIN_MC_FAULT0 0x00008000 // MC0 Fault pin
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106 #define SYSCTL_PIN_ADC0 0x00010000 // ADC0 pin
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107 #define SYSCTL_PIN_ADC1 0x00020000 // ADC1 pin
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108 #define SYSCTL_PIN_ADC2 0x00040000 // ADC2 pin
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109 #define SYSCTL_PIN_ADC3 0x00080000 // ADC3 pin
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110 #define SYSCTL_PIN_ADC4 0x00100000 // ADC4 pin
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111 #define SYSCTL_PIN_ADC5 0x00200000 // ADC5 pin
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112 #define SYSCTL_PIN_ADC6 0x00400000 // ADC6 pin
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113 #define SYSCTL_PIN_ADC7 0x00800000 // ADC7 pin
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114 #define SYSCTL_PIN_CCP0 0x01000000 // CCP0 pin
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115 #define SYSCTL_PIN_CCP1 0x02000000 // CCP1 pin
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116 #define SYSCTL_PIN_CCP2 0x04000000 // CCP2 pin
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117 #define SYSCTL_PIN_CCP3 0x08000000 // CCP3 pin
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118 #define SYSCTL_PIN_CCP4 0x10000000 // CCP4 pin
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119 #define SYSCTL_PIN_CCP5 0x20000000 // CCP5 pin
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120 #define SYSCTL_PIN_32KHZ 0x80000000 // 32kHz pin
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122 //*****************************************************************************
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124 // The following are values that can be passed to the SysCtlLDOSet() API as
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125 // the ulVoltage value, or returned by the SysCtlLDOGet() API.
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127 //*****************************************************************************
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128 #define SYSCTL_LDO_2_25V 0x00000005 // LDO output of 2.25V
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129 #define SYSCTL_LDO_2_30V 0x00000004 // LDO output of 2.30V
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130 #define SYSCTL_LDO_2_35V 0x00000003 // LDO output of 2.35V
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131 #define SYSCTL_LDO_2_40V 0x00000002 // LDO output of 2.40V
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132 #define SYSCTL_LDO_2_45V 0x00000001 // LDO output of 2.45V
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133 #define SYSCTL_LDO_2_50V 0x00000000 // LDO output of 2.50V
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134 #define SYSCTL_LDO_2_55V 0x0000001f // LDO output of 2.55V
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135 #define SYSCTL_LDO_2_60V 0x0000001e // LDO output of 2.60V
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136 #define SYSCTL_LDO_2_65V 0x0000001d // LDO output of 2.65V
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137 #define SYSCTL_LDO_2_70V 0x0000001c // LDO output of 2.70V
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138 #define SYSCTL_LDO_2_75V 0x0000001b // LDO output of 2.75V
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140 //*****************************************************************************
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142 // The following are values that can be passed to the SysCtlLDOConfigSet() API.
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144 //*****************************************************************************
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145 #define SYSCTL_LDOCFG_ARST 0x00000001 // Allow LDO failure to reset
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146 #define SYSCTL_LDOCFG_NORST 0x00000000 // Do not reset on LDO failure
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148 //*****************************************************************************
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150 // The following are values that can be passed to the SysCtlIntEnable(),
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151 // SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask
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152 // by the SysCtlIntStatus() API.
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154 //*****************************************************************************
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155 #define SYSCTL_INT_PLL_LOCK 0x00000040 // PLL lock interrupt
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156 #define SYSCTL_INT_CUR_LIMIT 0x00000020 // Current limit interrupt
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157 #define SYSCTL_INT_IOSC_FAIL 0x00000010 // Internal oscillator failure int
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158 #define SYSCTL_INT_MOSC_FAIL 0x00000008 // Main oscillator failure int
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159 #define SYSCTL_INT_POR 0x00000004 // Power on reset interrupt
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160 #define SYSCTL_INT_BOR 0x00000002 // Brown out interrupt
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161 #define SYSCTL_INT_PLL_FAIL 0x00000001 // PLL failure interrupt
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163 //*****************************************************************************
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165 // The following are values that can be passed to the SysCtlResetCauseClear()
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166 // API or returned by the SysCtlResetCauseGet() API.
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168 //*****************************************************************************
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169 #define SYSCTL_CAUSE_LDO 0x00000020 // LDO power not OK reset
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170 #define SYSCTL_CAUSE_SW 0x00000010 // Software reset
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171 #define SYSCTL_CAUSE_WDOG 0x00000008 // Watchdog reset
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172 #define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset
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173 #define SYSCTL_CAUSE_POR 0x00000002 // Power on reset
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174 #define SYSCTL_CAUSE_EXT 0x00000001 // External reset
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176 //*****************************************************************************
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178 // The following are values that can be passed to the SysCtlBrownOutConfigSet()
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179 // API as the ulConfig parameter.
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181 //*****************************************************************************
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182 #define SYSCTL_BOR_RESET 0x00000002 // Reset instead of interrupting
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183 #define SYSCTL_BOR_RESAMPLE 0x00000001 // Resample BOR before asserting
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185 //*****************************************************************************
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187 // The following are values that can be passed to the SysCtlPWMClockSet() API
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188 // as the ulConfig parameter, and can be returned by the SysCtlPWMClockGet()
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191 //*****************************************************************************
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192 #define SYSCTL_PWMDIV_1 0x00000000 // PWM clock is processor clock /1
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193 #define SYSCTL_PWMDIV_2 0x00100000 // PWM clock is processor clock /2
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194 #define SYSCTL_PWMDIV_4 0x00120000 // PWM clock is processor clock /4
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195 #define SYSCTL_PWMDIV_8 0x00140000 // PWM clock is processor clock /8
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196 #define SYSCTL_PWMDIV_16 0x00160000 // PWM clock is processor clock /16
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197 #define SYSCTL_PWMDIV_32 0x00180000 // PWM clock is processor clock /32
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198 #define SYSCTL_PWMDIV_64 0x001A0000 // PWM clock is processor clock /64
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200 //*****************************************************************************
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202 // The following are values that can be passed to the SysCtlADCSpeedSet() API
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203 // as the ulSpeed parameter, and can be returned by the SyCtlADCSpeedGet()
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206 //*****************************************************************************
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207 #define SYSCTL_ADCSPEED_1MSPS 0x00000300 // 1,000,000 samples per second
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208 #define SYSCTL_ADCSPEED_500KSPS 0x00000200 // 500,000 samples per second
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209 #define SYSCTL_ADCSPEED_250KSPS 0x00000100 // 250,000 samples per second
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210 #define SYSCTL_ADCSPEED_125KSPS 0x00000000 // 125,000 samples per second
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212 //*****************************************************************************
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214 // The following are values that can be passed to the SysCtlClockSet() API as
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215 // the ulConfig parameter.
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217 //*****************************************************************************
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218 #define SYSCTL_SYSDIV_1 0x07800000 // Processor clock is osc/pll /1
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219 #define SYSCTL_SYSDIV_2 0x00C00000 // Processor clock is osc/pll /2
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220 #define SYSCTL_SYSDIV_3 0x01400000 // Processor clock is osc/pll /3
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221 #define SYSCTL_SYSDIV_4 0x01C00000 // Processor clock is osc/pll /4
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222 #define SYSCTL_SYSDIV_5 0x02400000 // Processor clock is osc/pll /5
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223 #define SYSCTL_SYSDIV_6 0x02C00000 // Processor clock is osc/pll /6
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224 #define SYSCTL_SYSDIV_7 0x03400000 // Processor clock is osc/pll /7
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225 #define SYSCTL_SYSDIV_8 0x03C00000 // Processor clock is osc/pll /8
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226 #define SYSCTL_SYSDIV_9 0x04400000 // Processor clock is osc/pll /9
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227 #define SYSCTL_SYSDIV_10 0x04C00000 // Processor clock is osc/pll /10
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228 #define SYSCTL_SYSDIV_11 0x05400000 // Processor clock is osc/pll /11
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229 #define SYSCTL_SYSDIV_12 0x05C00000 // Processor clock is osc/pll /12
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230 #define SYSCTL_SYSDIV_13 0x06400000 // Processor clock is osc/pll /13
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231 #define SYSCTL_SYSDIV_14 0x06C00000 // Processor clock is osc/pll /14
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232 #define SYSCTL_SYSDIV_15 0x07400000 // Processor clock is osc/pll /15
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233 #define SYSCTL_SYSDIV_16 0x07C00000 // Processor clock is osc/pll /16
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234 #define SYSCTL_USE_PLL 0x00000000 // System clock is the PLL clock
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235 #define SYSCTL_USE_OSC 0x00003800 // System clock is the osc clock
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236 #define SYSCTL_XTAL_1MHZ 0x00000000 // External crystal is 1MHz
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237 #define SYSCTL_XTAL_1_84MHZ 0x00000040 // External crystal is 1.8432MHz
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238 #define SYSCTL_XTAL_2MHZ 0x00000080 // External crystal is 2MHz
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239 #define SYSCTL_XTAL_2_45MHZ 0x000000C0 // External crystal is 2.4576MHz
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240 #define SYSCTL_XTAL_3_57MHZ 0x00000100 // External crystal is 3.579545MHz
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241 #define SYSCTL_XTAL_3_68MHZ 0x00000140 // External crystal is 3.6864MHz
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242 #define SYSCTL_XTAL_4MHZ 0x00000180 // External crystal is 4MHz
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243 #define SYSCTL_XTAL_4_09MHZ 0x000001C0 // External crystal is 4.096MHz
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244 #define SYSCTL_XTAL_4_91MHZ 0x00000200 // External crystal is 4.9152MHz
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245 #define SYSCTL_XTAL_5MHZ 0x00000240 // External crystal is 5MHz
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246 #define SYSCTL_XTAL_5_12MHZ 0x00000280 // External crystal is 5.12MHz
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247 #define SYSCTL_XTAL_6MHZ 0x000002C0 // External crystal is 6MHz
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248 #define SYSCTL_XTAL_6_14MHZ 0x00000300 // External crystal is 6.144MHz
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249 #define SYSCTL_XTAL_7_37MHZ 0x00000340 // External crystal is 7.3728MHz
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250 #define SYSCTL_XTAL_8MHZ 0x00000380 // External crystal is 8MHz
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251 #define SYSCTL_XTAL_8_19MHZ 0x000003C0 // External crystal is 8.192MHz
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252 #define SYSCTL_OSC_MAIN 0x00000000 // Oscillator source is main osc
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253 #define SYSCTL_OSC_INT 0x00000010 // Oscillator source is int. osc
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254 #define SYSCTL_OSC_INT4 0x00000020 // Oscillator source is int. osc /4
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255 #define SYSCTL_INT_OSC_DIS 0x00000002 // Disable internal oscillator
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256 #define SYSCTL_MAIN_OSC_DIS 0x00000001 // Disable main oscillator
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258 //*****************************************************************************
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260 // Prototypes for the APIs.
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262 //*****************************************************************************
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263 extern unsigned long SysCtlSRAMSizeGet(void);
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264 extern unsigned long SysCtlFlashSizeGet(void);
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265 extern tBoolean SysCtlPinPresent(unsigned long ulPin);
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266 extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
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267 extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
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268 extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
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269 extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
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270 extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);
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271 extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);
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272 extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);
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273 extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);
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274 extern void SysCtlPeripheralClockGating(tBoolean bEnable);
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275 extern void SysCtlIntRegister(void (*pfnHandler)(void));
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276 extern void SysCtlIntUnregister(void);
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277 extern void SysCtlIntEnable(unsigned long ulInts);
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278 extern void SysCtlIntDisable(unsigned long ulInts);
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279 extern void SysCtlIntClear(unsigned long ulInts);
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280 extern unsigned long SysCtlIntStatus(tBoolean bMasked);
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281 extern void SysCtlLDOSet(unsigned long ulVoltage);
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282 extern unsigned long SysCtlLDOGet(void);
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283 extern void SysCtlLDOConfigSet(unsigned long ulConfig);
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284 extern void SysCtlReset(void);
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285 extern void SysCtlSleep(void);
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286 extern void SysCtlDeepSleep(void);
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287 extern unsigned long SysCtlResetCauseGet(void);
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288 extern void SysCtlResetCauseClear(unsigned long ulCauses);
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289 extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
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290 unsigned long ulDelay);
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291 extern void SysCtlClockSet(unsigned long ulConfig);
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292 extern unsigned long SysCtlClockGet(void);
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293 extern void SysCtlPWMClockSet(unsigned long ulConfig);
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294 extern unsigned long SysCtlPWMClockGet(void);
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295 extern void SysCtlADCSpeedSet(unsigned long ulSpeed);
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296 extern unsigned long SysCtlADCSpeedGet(void);
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297 extern void SysCtlIOSCVerificationSet(tBoolean bEnable);
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298 extern void SysCtlMOSCVerificationSet(tBoolean bEnable);
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299 extern void SysCtlPLLVerificationSet(tBoolean bEnable);
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300 extern void SysCtlClkVerificationClear(void);
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306 #endif // __SYSCTL_H__
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