2 * AES-NI support functions
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4 * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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5 * SPDX-License-Identifier: Apache-2.0
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7 * Licensed under the Apache License, Version 2.0 (the "License"); you may
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8 * not use this file except in compliance with the License.
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9 * You may obtain a copy of the License at
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11 * http://www.apache.org/licenses/LICENSE-2.0
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13 * Unless required by applicable law or agreed to in writing, software
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14 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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15 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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16 * See the License for the specific language governing permissions and
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17 * limitations under the License.
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19 * This file is part of mbed TLS (https://tls.mbed.org)
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23 * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
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24 * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
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27 #if !defined(MBEDTLS_CONFIG_FILE)
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28 #include "mbedtls/config.h"
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30 #include MBEDTLS_CONFIG_FILE
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33 #if defined(MBEDTLS_AESNI_C)
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35 #if defined(__has_feature)
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36 #if __has_feature(memory_sanitizer)
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37 #warning "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
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41 #include "mbedtls/aesni.h"
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49 #if defined(MBEDTLS_HAVE_X86_64)
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52 * AES-NI support detection routine
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54 int mbedtls_aesni_has_support( unsigned int what )
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56 static int done = 0;
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57 static unsigned int c = 0;
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61 asm( "movl $1, %%eax \n\t"
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65 : "eax", "ebx", "edx" );
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69 return( ( c & what ) != 0 );
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73 * Binutils needs to be at least 2.19 to support AES-NI instructions.
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74 * Unfortunately, a lot of users have a lower version now (2014-04).
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75 * Emit bytecode directly in order to support "old" version of gas.
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77 * Opcodes from the Intel architecture reference manual, vol. 3.
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78 * We always use registers, so we don't need prefixes for memory operands.
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79 * Operand macros are in gas order (src, dst) as opposed to Intel order
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80 * (dst, src) in order to blend better into the surrounding assembly code.
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82 #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
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83 #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
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84 #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
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85 #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
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86 #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
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87 #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
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88 #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
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90 #define xmm0_xmm0 "0xC0"
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91 #define xmm0_xmm1 "0xC8"
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92 #define xmm0_xmm2 "0xD0"
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93 #define xmm0_xmm3 "0xD8"
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94 #define xmm0_xmm4 "0xE0"
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95 #define xmm1_xmm0 "0xC1"
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96 #define xmm1_xmm2 "0xD1"
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99 * AES-NI AES-ECB block en(de)cryption
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101 int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
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103 const unsigned char input[16],
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104 unsigned char output[16] )
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106 asm( "movdqu (%3), %%xmm0 \n\t" // load input
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107 "movdqu (%1), %%xmm1 \n\t" // load round key 0
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108 "pxor %%xmm1, %%xmm0 \n\t" // round 0
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109 "add $16, %1 \n\t" // point to next round key
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110 "subl $1, %0 \n\t" // normal rounds = nr - 1
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111 "test %2, %2 \n\t" // mode?
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112 "jz 2f \n\t" // 0 = decrypt
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114 "1: \n\t" // encryption loop
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115 "movdqu (%1), %%xmm1 \n\t" // load round key
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116 AESENC xmm1_xmm0 "\n\t" // do round
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117 "add $16, %1 \n\t" // point to next round key
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118 "subl $1, %0 \n\t" // loop
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120 "movdqu (%1), %%xmm1 \n\t" // load round key
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121 AESENCLAST xmm1_xmm0 "\n\t" // last round
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124 "2: \n\t" // decryption loop
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125 "movdqu (%1), %%xmm1 \n\t"
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126 AESDEC xmm1_xmm0 "\n\t" // do round
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130 "movdqu (%1), %%xmm1 \n\t" // load round key
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131 AESDECLAST xmm1_xmm0 "\n\t" // last round
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134 "movdqu %%xmm0, (%4) \n\t" // export output
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136 : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
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137 : "memory", "cc", "xmm0", "xmm1" );
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144 * GCM multiplication: c = a times b in GF(2^128)
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145 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
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147 void mbedtls_aesni_gcm_mult( unsigned char c[16],
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148 const unsigned char a[16],
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149 const unsigned char b[16] )
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151 unsigned char aa[16], bb[16], cc[16];
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154 /* The inputs are in big-endian order, so byte-reverse them */
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155 for( i = 0; i < 16; i++ )
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161 asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
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162 "movdqu (%1), %%xmm1 \n\t" // b1:b0
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165 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
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166 * using [CLMUL-WP] algorithm 1 (p. 13).
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168 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
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169 "movdqa %%xmm1, %%xmm3 \n\t" // same
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170 "movdqa %%xmm1, %%xmm4 \n\t" // same
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171 PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
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172 PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
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173 PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
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174 PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
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175 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
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176 "movdqa %%xmm4, %%xmm3 \n\t" // same
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177 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
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178 "pslldq $8, %%xmm3 \n\t" // e0+f0:0
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179 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
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180 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
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183 * Now shift the result one bit to the left,
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184 * taking advantage of [CLMUL-WP] eq 27 (p. 20)
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186 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
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187 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
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188 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
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189 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
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190 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
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191 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
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192 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
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193 "pslldq $8, %%xmm3 \n\t" // r0>>63:0
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194 "pslldq $8, %%xmm4 \n\t" // r2>>63:0
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195 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
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196 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
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197 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
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198 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
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201 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
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202 * using [CLMUL-WP] algorithm 5 (p. 20).
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203 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
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206 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
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207 "movdqa %%xmm1, %%xmm4 \n\t" // same
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208 "movdqa %%xmm1, %%xmm5 \n\t" // same
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209 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
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210 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
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211 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
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214 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
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215 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
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216 "pslldq $8, %%xmm3 \n\t" // a+b+c:0
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217 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
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219 /* Steps 3 and 4 */
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220 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
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221 "movdqa %%xmm1,%%xmm4 \n\t" // same
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222 "movdqa %%xmm1,%%xmm5 \n\t" // same
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223 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
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224 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
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225 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
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226 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
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227 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
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228 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
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229 // bits carried from d. Now get those\t bits back in.
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230 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
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231 "movdqa %%xmm1,%%xmm4 \n\t" // same
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232 "movdqa %%xmm1,%%xmm5 \n\t" // same
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233 "psllq $63, %%xmm3 \n\t" // d<<63:stuff
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234 "psllq $62, %%xmm4 \n\t" // d<<62:stuff
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235 "psllq $57, %%xmm5 \n\t" // d<<57:stuff
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236 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
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237 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
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238 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
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239 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
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240 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
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241 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
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243 "movdqu %%xmm0, (%2) \n\t" // done
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245 : "r" (aa), "r" (bb), "r" (cc)
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246 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
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248 /* Now byte-reverse the outputs */
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249 for( i = 0; i < 16; i++ )
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256 * Compute decryption round keys from encryption round keys
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258 void mbedtls_aesni_inverse_key( unsigned char *invkey,
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259 const unsigned char *fwdkey, int nr )
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261 unsigned char *ik = invkey;
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262 const unsigned char *fk = fwdkey + 16 * nr;
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264 memcpy( ik, fk, 16 );
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266 for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
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267 asm( "movdqu (%0), %%xmm0 \n\t"
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268 AESIMC xmm0_xmm0 "\n\t"
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269 "movdqu %%xmm0, (%1) \n\t"
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271 : "r" (fk), "r" (ik)
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272 : "memory", "xmm0" );
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274 memcpy( ik, fk, 16 );
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278 * Key expansion, 128-bit case
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280 static void aesni_setkey_enc_128( unsigned char *rk,
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281 const unsigned char *key )
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283 asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
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284 "movdqu %%xmm0, (%0) \n\t" // as round key 0
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285 "jmp 2f \n\t" // skip auxiliary routine
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288 * Finish generating the next round key.
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290 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
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291 * with X = rot( sub( r3 ) ) ^ RCON.
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293 * On exit, xmm0 is r7:r6:r5:r4
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294 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
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295 * and those are written to the round key buffer.
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298 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
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299 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
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300 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
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301 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
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302 "pslldq $4, %%xmm0 \n\t" // etc
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303 "pxor %%xmm0, %%xmm1 \n\t"
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304 "pslldq $4, %%xmm0 \n\t"
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305 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
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306 "add $16, %0 \n\t" // point to next round key
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307 "movdqu %%xmm0, (%0) \n\t" // write it
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312 AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
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313 AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
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314 AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
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315 AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
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316 AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
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317 AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
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318 AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
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319 AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
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320 AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
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321 AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
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323 : "r" (rk), "r" (key)
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324 : "memory", "cc", "0" );
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328 * Key expansion, 192-bit case
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330 static void aesni_setkey_enc_192( unsigned char *rk,
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331 const unsigned char *key )
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333 asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
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334 "movdqu %%xmm0, (%0) \n\t"
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336 "movq 16(%1), %%xmm1 \n\t"
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337 "movq %%xmm1, (%0) \n\t"
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339 "jmp 2f \n\t" // skip auxiliary routine
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342 * Finish generating the next 6 quarter-keys.
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344 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
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345 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
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347 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
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348 * and those are written to the round key buffer.
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351 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
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352 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
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353 "pslldq $4, %%xmm0 \n\t" // etc
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354 "pxor %%xmm0, %%xmm2 \n\t"
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355 "pslldq $4, %%xmm0 \n\t"
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356 "pxor %%xmm0, %%xmm2 \n\t"
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357 "pslldq $4, %%xmm0 \n\t"
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358 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
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359 "movdqu %%xmm0, (%0) \n\t"
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361 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
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362 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
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363 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
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364 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
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365 "movq %%xmm1, (%0) \n\t"
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370 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
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371 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
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372 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
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373 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
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374 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
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375 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
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376 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
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377 AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
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380 : "r" (rk), "r" (key)
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381 : "memory", "cc", "0" );
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385 * Key expansion, 256-bit case
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387 static void aesni_setkey_enc_256( unsigned char *rk,
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388 const unsigned char *key )
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390 asm( "movdqu (%1), %%xmm0 \n\t"
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391 "movdqu %%xmm0, (%0) \n\t"
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393 "movdqu 16(%1), %%xmm1 \n\t"
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394 "movdqu %%xmm1, (%0) \n\t"
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395 "jmp 2f \n\t" // skip auxiliary routine
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398 * Finish generating the next two round keys.
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400 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
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401 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
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403 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
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404 * and those have been written to the output buffer.
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407 "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
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408 "pxor %%xmm0, %%xmm2 \n\t"
\r
409 "pslldq $4, %%xmm0 \n\t"
\r
410 "pxor %%xmm0, %%xmm2 \n\t"
\r
411 "pslldq $4, %%xmm0 \n\t"
\r
412 "pxor %%xmm0, %%xmm2 \n\t"
\r
413 "pslldq $4, %%xmm0 \n\t"
\r
414 "pxor %%xmm2, %%xmm0 \n\t"
\r
416 "movdqu %%xmm0, (%0) \n\t"
\r
418 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
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419 * and proceed to generate next round key from there */
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420 AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
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421 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
\r
422 "pxor %%xmm1, %%xmm2 \n\t"
\r
423 "pslldq $4, %%xmm1 \n\t"
\r
424 "pxor %%xmm1, %%xmm2 \n\t"
\r
425 "pslldq $4, %%xmm1 \n\t"
\r
426 "pxor %%xmm1, %%xmm2 \n\t"
\r
427 "pslldq $4, %%xmm1 \n\t"
\r
428 "pxor %%xmm2, %%xmm1 \n\t"
\r
430 "movdqu %%xmm1, (%0) \n\t"
\r
434 * Main "loop" - Generating one more key than necessary,
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435 * see definition of mbedtls_aes_context.buf
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438 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
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439 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
\r
440 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
\r
441 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
\r
442 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
\r
443 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
\r
444 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
\r
446 : "r" (rk), "r" (key)
\r
447 : "memory", "cc", "0" );
\r
451 * Key expansion, wrapper
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453 int mbedtls_aesni_setkey_enc( unsigned char *rk,
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454 const unsigned char *key,
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459 case 128: aesni_setkey_enc_128( rk, key ); break;
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460 case 192: aesni_setkey_enc_192( rk, key ); break;
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461 case 256: aesni_setkey_enc_256( rk, key ); break;
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462 default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
\r
468 #endif /* MBEDTLS_HAVE_X86_64 */
\r
470 #endif /* MBEDTLS_AESNI_C */
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