git.sur5r.net Git - freertos/blob - FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/ThirdParty/CMSISv2p10_LPC18xx_DriverLib/src/lpc18xx_ssp.c

   1 /**********************************************************************\r
   2 * $Id$          lpc18xx_ssp.c           2011-06-02\r
   3 *//**\r
   4 * @file         lpc18xx_ssp.c\r
   5 * @brief        Contains all functions support for SSP firmware library on LPC18xx\r
   6 * @version      1.0\r
   7 * @date         02. June. 2011\r
   8 * @author       NXP MCU SW Application Team\r
   9 *\r
  10 * Copyright(C) 2011, NXP Semiconductor\r
  11 * All rights reserved.\r
  12 *\r
  13 ***********************************************************************\r
  14 * Software that is described herein is for illustrative purposes only\r
  15 * which provides customers with programming information regarding the\r
  16 * products. This software is supplied "AS IS" without any warranties.\r
  17 * NXP Semiconductors assumes no responsibility or liability for the\r
  18 * use of the software, conveys no license or title under any patent,\r
  19 * copyright, or mask work right to the product. NXP Semiconductors\r
  20 * reserves the right to make changes in the software without\r
  21 * notification. NXP Semiconductors also make no representation or\r
  22 * warranty that such application will be suitable for the specified\r
  23 * use without further testing or modification.\r
  24 **********************************************************************/\r
  25 \r
  26 /* Peripheral group ----------------------------------------------------------- */\r
  27 /** @addtogroup SSP\r
  28  * @{\r
  29  */\r
  30 \r
  31 /* Includes ------------------------------------------------------------------- */\r
  32 #include "lpc18xx_ssp.h"\r
  33 #include "lpc18xx_cgu.h"\r
  34 \r
  35 /* If this source file built with example, the LPC18xx FW library configuration\r
  36  * file in each example directory ("lpc18xx_libcfg.h") must be included,\r
  37  * otherwise the default FW library configuration file must be included instead\r
  38  */\r
  39 #ifdef __BUILD_WITH_EXAMPLE__\r
  40 #include "lpc18xx_libcfg.h"\r
  41 #else\r
  42 #include "lpc18xx_libcfg_default.h"\r
  43 #endif /* __BUILD_WITH_EXAMPLE__ */\r
  44 \r
  45 \r
  46 #ifdef _SSP\r
  47 \r
  48 /* Public Functions ----------------------------------------------------------- */\r
  49 /** @addtogroup SSP_Private_Functions\r
  50  * @{\r
  51  */\r
  52 \r
  53 /**\r
  54  * @}\r
  55  */\r
  56 \r
  57 /* Public Functions ----------------------------------------------------------- */\r
  58 /** @addtogroup SSP_Public_Functions\r
  59  * @{\r
  60  */\r
  61 \r
  62 /********************************************************************//**\r
  63  * @brief               Initializes the SSPx peripheral according to the specified\r
  64  *              parameters in the SSP_ConfigStruct.\r
  65  * @param[in]   SSPx SSP peripheral selected, should be:\r
  66  *                                      - LPC_SSP0      :SSP0 peripheral\r
  67  *                                      - LPC_SSP1      :SSP1 peripheral\r
  68  * @param[in]   SSP_ConfigStruct Pointer to a SSP_CFG_Type structure that\r
  69  *                              contains the configuration information for the specified\r
  70  *                              SSP peripheral.\r
  71  * @return              None\r
  72  *********************************************************************/\r
  73 void SSP_Init(LPC_SSPn_Type *SSPx, SSP_CFG_Type *SSP_ConfigStruct)\r
  74 {\r
  75         uint32_t tmp;\r
  76         uint32_t prescale, cr0_div, cmp_clk, ssp_clk;\r
  77 \r
  78         CHECK_PARAM(PARAM_SSPx(SSPx));\r
  79 \r
  80         if(SSPx == LPC_SSP0) {\r
  81                 /* Set up clock and power for SSP0 module */\r
  82                 //LPC_CGU->BASE_SSP0_CLK = (SRC_PL160M_0<<24) | (1<<11);\r
  83                 CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_SSP0);\r
  84         } else if(SSPx == LPC_SSP1) {\r
  85                 /* Set up clock and power for SSP1 module */\r
  86                 //LPC_CGU->BASE_SSP1_CLK = (SRC_PL160M_0<<24) | (1<<11);\r
  87                 CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_SSP1);\r
  88         } else {\r
  89                 return;\r
  90         }\r
  91 \r
  92         /* Configure SSP, interrupt is disable, LoopBack mode is disable,\r
  93          * SSP is disable, Slave output is disable as default\r
  94          */\r
  95         tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \\r
  96                 | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit))\r
  97                 & SSP_CR0_BITMASK;\r
  98         // write back to SSP control register\r
  99         SSPx->CR0 = tmp;\r
 100 \r
 101         tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK;\r
 102         // Write back to CR1\r
 103         SSPx->CR1 = tmp;\r
 104 \r
 105         // Set clock rate for SSP peripheral\r
 106         if(SSPx == LPC_SSP0)\r
 107                 ssp_clk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_SSP0);\r
 108         else\r
 109                 ssp_clk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_SSP1);\r
 110         cr0_div = 0;\r
 111         cmp_clk = 0xFFFFFFFF;\r
 112         prescale = 2;\r
 113         while (cmp_clk > SSP_ConfigStruct->ClockRate)\r
 114         {\r
 115                 cmp_clk = ssp_clk / ((cr0_div + 1) * prescale);\r
 116                 if (cmp_clk > SSP_ConfigStruct->ClockRate)\r
 117                 {\r
 118                         cr0_div++;\r
 119                         if (cr0_div > 0xFF)\r
 120                         {\r
 121                                 cr0_div = 0;\r
 122                                 prescale += 2;\r
 123                         }\r
 124                 }\r
 125         }\r
 126 \r
 127     /* Write computed prescaler and divider back to register */\r
 128     SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK;\r
 129     SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK;\r
 130     SSPx->CPSR = prescale & SSP_CPSR_BITMASK;\r
 131 }\r
 132 \r
 133 /*********************************************************************//**\r
 134  * @brief               De-initializes the SSPx peripheral registers to their\r
 135  *              default reset values.\r
 136  * @param[in]   SSPx SSP peripheral selected, should be:\r
 137  *                                      - LPC_SSP0      :SSP0 peripheral\r
 138  *                                      - LPC_SSP1      :SSP1 peripheral\r
 139  * @return              None\r
 140  **********************************************************************/\r
 141 void SSP_DeInit(LPC_SSPn_Type* SSPx)\r
 142 {\r
 143         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 144 \r
 145         /* Disable SSP operation*/\r
 146         SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;\r
 147 }\r
 148 \r
 149 /*****************************************************************************//**\r
 150  * @brief               Get data size bit selected\r
 151  * @param[in]   SSPx pointer to LPC_SSPn_Type structure, should be:\r
 152  *                                      - LPC_SSP0      :SSP0 peripheral\r
 153  *                                      - LPC_SSP1      :SSP1 peripheral\r
 154  * @return              Data size, could be:\r
 155  *                                      - SSP_DATABIT_4         :4 bit transfer\r
 156  *                                      - SSP_DATABIT_5         :5 bit transfer\r
 157  *                                      ...\r
 158  *                                      - SSP_DATABIT_16        :16 bit transfer\r
 159 *******************************************************************************/\r
 160 uint8_t SSP_GetDataSize(LPC_SSPn_Type* SSPx)\r
 161 {\r
 162         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 163         return (SSPx->CR0 & (0xF));\r
 164 }\r
 165 \r
 166 /*****************************************************************************//**\r
 167  * @brief               Fills each SSP_InitStruct member with its default value:\r
 168  *                                      - CPHA = SSP_CPHA_FIRST\r
 169  *                                      - CPOL = SSP_CPOL_HI\r
 170  *                                      - ClockRate = 1000000\r
 171  *                                      - Databit = SSP_DATABIT_8\r
 172  *                                      - Mode = SSP_MASTER_MODE\r
 173  *                                      - FrameFormat = SSP_FRAME_SSP\r
 174  * @param[in]   SSP_InitStruct Pointer to a SSP_CFG_Type structure which will be\r
 175  *                              initialized.\r
 176  * @return              None\r
 177  *******************************************************************************/\r
 178 void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct)\r
 179 {\r
 180         SSP_InitStruct->CPHA = SSP_CPHA_FIRST;\r
 181         SSP_InitStruct->CPOL = SSP_CPOL_HI;\r
 182         SSP_InitStruct->ClockRate = 100000;\r
 183         SSP_InitStruct->Databit = SSP_DATABIT_8;\r
 184         SSP_InitStruct->Mode = SSP_MASTER_MODE;\r
 185         SSP_InitStruct->FrameFormat = SSP_FRAME_SPI;\r
 186 }\r
 187 \r
 188 \r
 189 /*********************************************************************//**\r
 190  * @brief               Enable or disable SSP peripheral's operation\r
 191  * @param[in]   SSPx    SSP peripheral, should be:\r
 192  *                                      - LPC_SSP0      :SSP0 peripheral\r
 193  *                                      - LPC_SSP1      :SSP1 peripheral\r
 194  * @param[in]   NewState New State of SSPx peripheral's operation, should be:\r
 195  *                                      - ENABLE\r
 196  *                                      - DISABLE\r
 197  * @return              none\r
 198  **********************************************************************/\r
 199 void SSP_Cmd(LPC_SSPn_Type* SSPx, FunctionalState NewState)\r
 200 {\r
 201         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 202         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
 203 \r
 204         if (NewState == ENABLE)\r
 205         {\r
 206                 SSPx->CR1 |= SSP_CR1_SSP_EN;\r
 207         }\r
 208         else\r
 209         {\r
 210                 SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;\r
 211         }\r
 212 }\r
 213 \r
 214 /*********************************************************************//**\r
 215  * @brief               Enable or disable Loop Back mode function in SSP peripheral\r
 216  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 217  *                                      - LPC_SSP0      :SSP0 peripheral\r
 218  *                                      - LPC_SSP1      :SSP1 peripheral\r
 219  * @param[in]   NewState        New State of Loop Back mode, should be:\r
 220  *                                      - ENABLE\r
 221  *                                      - DISABLE\r
 222  * @return              None\r
 223  **********************************************************************/\r
 224 void SSP_LoopBackCmd(LPC_SSPn_Type* SSPx, FunctionalState NewState)\r
 225 {\r
 226         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 227         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
 228 \r
 229         if (NewState == ENABLE)\r
 230         {\r
 231                 SSPx->CR1 |= SSP_CR1_LBM_EN;\r
 232         }\r
 233         else\r
 234         {\r
 235                 SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK;\r
 236         }\r
 237 }\r
 238 \r
 239 /*********************************************************************//**\r
 240  * @brief               Enable or disable Slave Output function in SSP peripheral\r
 241  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 242  *                                      - LPC_SSP0      :SSP0 peripheral\r
 243  *                                      - LPC_SSP1      :SSP1 peripheral\r
 244  * @param[in]   NewState        New State of Slave Output function, should be:\r
 245  *                                      - ENABLE        :Slave Output in normal operation\r
 246  *                                      - DISABLE       :Slave Output is disabled. This blocks\r
 247  *                                      SSP controller from driving the transmit data line (MISO)\r
 248  * Note:                This function is available when SSP peripheral in Slave mode\r
 249  * @return              None\r
 250  **********************************************************************/\r
 251 void SSP_SlaveOutputCmd(LPC_SSPn_Type* SSPx, FunctionalState NewState)\r
 252 {\r
 253         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 254         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
 255 \r
 256         if (NewState == ENABLE)\r
 257         {\r
 258                 SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK;\r
 259         }\r
 260         else\r
 261         {\r
 262                 SSPx->CR1 |= SSP_CR1_SO_DISABLE;\r
 263         }\r
 264 }\r
 265 \r
 266 /*********************************************************************//**\r
 267  * @brief               Transmit a single data through SSPx peripheral\r
 268  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 269  *                                      - LPC_SSP0      :SSP0 peripheral\r
 270  *                                      - LPC_SSP1      :SSP1 peripheral\r
 271  * @param[in]   Data    Data to transmit (must be 16 or 8-bit long, this\r
 272  *                              depend on SSP data bit number configured)\r
 273  * @return              none\r
 274  **********************************************************************/\r
 275 void SSP_SendData(LPC_SSPn_Type* SSPx, uint16_t Data)\r
 276 {\r
 277         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 278 \r
 279         SSPx->DR = SSP_DR_BITMASK(Data);\r
 280 }\r
 281 \r
 282 \r
 283 \r
 284 /*********************************************************************//**\r
 285  * @brief               Receive a single data from SSPx peripheral\r
 286  * @param[in]   SSPx    SSP peripheral selected, should be\r
 287  *                                      - LPC_SSP0      :SSP0 peripheral\r
 288  *                                      - LPC_SSP1      :SSP1 peripheral\r
 289  * @return              Data received (16-bit long)\r
 290  **********************************************************************/\r
 291 uint16_t SSP_ReceiveData(LPC_SSPn_Type* SSPx)\r
 292 {\r
 293         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 294 \r
 295         return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR)));\r
 296 }\r
 297 \r
 298 /*********************************************************************//**\r
 299  * @brief               SSP Read write data function\r
 300  * @param[in]   SSPx    Pointer to SSP peripheral, should be\r
 301  *                                      - LPC_SSP0      :SSP0 peripheral\r
 302  *                                      - LPC_SSP1      :SSP1 peripheral\r
 303  * @param[in]   dataCfg Pointer to a SSP_DATA_SETUP_Type structure that\r
 304  *                              contains specified information about transmit data\r
 305  *                              configuration.\r
 306  * @param[in]   xfType  Transfer type, should be:\r
 307  *                                      - SSP_TRANSFER_POLLING          :Polling mode\r
 308  *                                      - SSP_TRANSFER_INTERRUPT        :Interrupt mode\r
 309  * @return              Actual Data length has been transferred in polling mode.\r
 310  *                              In interrupt mode, always return (0)\r
 311  *                              Return (-1) if error.\r
 312  * Note: This function can be used in both master and slave mode.\r
 313  ***********************************************************************/\r
 314 int32_t SSP_ReadWrite (LPC_SSPn_Type *SSPx, SSP_DATA_SETUP_Type *dataCfg, \\r
 315                                                 SSP_TRANSFER_Type xfType)\r
 316 {\r
 317         uint8_t *rdata8;\r
 318     uint8_t *wdata8;\r
 319         uint16_t *rdata16;\r
 320     uint16_t *wdata16;\r
 321     uint32_t stat;\r
 322     uint32_t tmp;\r
 323     int32_t dataword;\r
 324 \r
 325     dataCfg->rx_cnt = 0;\r
 326     dataCfg->tx_cnt = 0;\r
 327     dataCfg->status = 0;\r
 328 \r
 329 \r
 330         /* Clear all remaining data in RX FIFO */\r
 331         while (SSPx->SR & SSP_SR_RNE){\r
 332                 tmp = (uint32_t) SSP_ReceiveData(SSPx);\r
 333         }\r
 334 \r
 335         // Clear status\r
 336         SSPx->ICR = SSP_ICR_BITMASK;\r
 337         if(SSP_GetDataSize(SSPx)>8)\r
 338                 dataword = 1;\r
 339         else dataword = 0;\r
 340 \r
 341         // Polling mode ----------------------------------------------------------------------\r
 342         if (xfType == SSP_TRANSFER_POLLING){\r
 343                 if (dataword == 0){\r
 344                         rdata8 = (uint8_t *)dataCfg->rx_data;\r
 345                         wdata8 = (uint8_t *)dataCfg->tx_data;\r
 346                 } else {\r
 347                         rdata16 = (uint16_t *)dataCfg->rx_data;\r
 348                         wdata16 = (uint16_t *)dataCfg->tx_data;\r
 349                 }\r
 350                 while ((dataCfg->tx_cnt < dataCfg->length) || (dataCfg->rx_cnt < dataCfg->length)){\r
 351                         if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt != dataCfg->length)){\r
 352                                 // Write data to buffer\r
 353                                 if(dataCfg->tx_data == NULL){\r
 354                                         if (dataword == 0){\r
 355                                                 SSP_SendData(SSPx, 0xFF);\r
 356                                                 dataCfg->tx_cnt++;\r
 357                                         } else {\r
 358                                                 SSP_SendData(SSPx, 0xFFFF);\r
 359                                                 dataCfg->tx_cnt += 2;\r
 360                                         }\r
 361                                 } else {\r
 362                                         if (dataword == 0){\r
 363                                                 SSP_SendData(SSPx, *wdata8);\r
 364                                                 wdata8++;\r
 365                                                 dataCfg->tx_cnt++;\r
 366                                         } else {\r
 367                                                 SSP_SendData(SSPx, *wdata16);\r
 368                                                 wdata16++;\r
 369                                                 dataCfg->tx_cnt += 2;\r
 370                                         }\r
 371                                 }\r
 372                         }\r
 373 \r
 374                         // Check overrun error\r
 375                         if ((stat = SSPx->RIS) & SSP_RIS_ROR){\r
 376                                 // save status and return\r
 377                                 dataCfg->status = stat | SSP_STAT_ERROR;\r
 378                                 return (-1);\r
 379                         }\r
 380 \r
 381                         // Check for any data available in RX FIFO\r
 382                         while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){\r
 383                                 // Read data from SSP data\r
 384                                 tmp = SSP_ReceiveData(SSPx);\r
 385 \r
 386                                 // Store data to destination\r
 387                                 if (dataCfg->rx_data != NULL)\r
 388                                 {\r
 389                                         if (dataword == 0){\r
 390                                                 *(rdata8) = (uint8_t) tmp;\r
 391                                                 rdata8++;\r
 392                                         } else {\r
 393                                                 *(rdata16) = (uint16_t) tmp;\r
 394                                                 rdata16++;\r
 395                                         }\r
 396                                 }\r
 397                                 // Increase counter\r
 398                                 if (dataword == 0){\r
 399                                         dataCfg->rx_cnt++;\r
 400                                 } else {\r
 401                                         dataCfg->rx_cnt += 2;\r
 402                                 }\r
 403                         }\r
 404                 }\r
 405 \r
 406                 // save status\r
 407                 dataCfg->status = SSP_STAT_DONE;\r
 408 \r
 409                 if (dataCfg->tx_data != NULL){\r
 410                         return dataCfg->tx_cnt;\r
 411                 } else if (dataCfg->rx_data != NULL){\r
 412                         return dataCfg->rx_cnt;\r
 413                 } else {\r
 414                         return (0);\r
 415                 }\r
 416         }\r
 417 \r
 418         // Interrupt mode ----------------------------------------------------------------------\r
 419         else if (xfType == SSP_TRANSFER_INTERRUPT){\r
 420 \r
 421                 while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){\r
 422                         // Write data to buffer\r
 423                         if(dataCfg->tx_data == NULL){\r
 424                                 if (dataword == 0){\r
 425                                         SSP_SendData(SSPx, 0xFF);\r
 426                                         dataCfg->tx_cnt++;\r
 427                                 } else {\r
 428                                         SSP_SendData(SSPx, 0xFFFF);\r
 429                                         dataCfg->tx_cnt += 2;\r
 430                                 }\r
 431                         } else {\r
 432                                 if (dataword == 0){\r
 433                                         SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));\r
 434                                         dataCfg->tx_cnt++;\r
 435                                 } else {\r
 436                                         SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));\r
 437                                         dataCfg->tx_cnt += 2;\r
 438                                 }\r
 439                         }\r
 440 \r
 441                         // Check error\r
 442                         if ((stat = SSPx->RIS) & SSP_RIS_ROR){\r
 443                                 // save status and return\r
 444                                 dataCfg->status = stat | SSP_STAT_ERROR;\r
 445                                 return (-1);\r
 446                         }\r
 447 \r
 448                         // Check for any data available in RX FIFO\r
 449                         while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){\r
 450                                 // Read data from SSP data\r
 451                                 tmp = SSP_ReceiveData(SSPx);\r
 452 \r
 453                                 // Store data to destination\r
 454                                 if (dataCfg->rx_data != NULL)\r
 455                                 {\r
 456                                         if (dataword == 0){\r
 457                                                 *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp;\r
 458                                         } else {\r
 459                                                 *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp;\r
 460                                         }\r
 461                                 }\r
 462                                 // Increase counter\r
 463                                 if (dataword == 0){\r
 464                                         dataCfg->rx_cnt++;\r
 465                                 } else {\r
 466                                         dataCfg->rx_cnt += 2;\r
 467                                 }\r
 468                         }\r
 469                 }\r
 470 \r
 471                 // If there more data to sent or receive\r
 472                 if ((dataCfg->rx_cnt != dataCfg->length) || (dataCfg->tx_cnt < dataCfg->length)){\r
 473                         // Enable all interrupt\r
 474                         SSPx->IMSC = SSP_IMSC_BITMASK;\r
 475                 } else {\r
 476                         // Save status\r
 477                         dataCfg->status = SSP_STAT_DONE;\r
 478                 }\r
 479                 return (0);\r
 480         }\r
 481 \r
 482         return (-1);\r
 483 }\r
 484 \r
 485 /*********************************************************************//**\r
 486  * @brief               Checks whether the specified SSP status flag is set or not\r
 487  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 488  *                                      - LPC_SSP0      :SSP0 peripheral\r
 489  *                                      - LPC_SSP1      :SSP1 peripheral\r
 490  * @param[in]   FlagType        Type of flag to check status, should be:\r
 491  *                                      - SSP_STAT_TXFIFO_EMPTY         :TX FIFO is empty\r
 492  *                                      - SSP_STAT_TXFIFO_NOTFULL       :TX FIFO is not full\r
 493  *                                      - SSP_STAT_RXFIFO_NOTEMPTY      :RX FIFO is not empty\r
 494  *                                      - SSP_STAT_RXFIFO_FULL          :RX FIFO is full\r
 495  *                                      - SSP_STAT_BUSY                         :SSP peripheral is busy\r
 496  * @return              New State of specified SSP status flag\r
 497  **********************************************************************/\r
 498 FlagStatus SSP_GetStatus(LPC_SSPn_Type* SSPx, uint32_t FlagType)\r
 499 {\r
 500         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 501         CHECK_PARAM(PARAM_SSP_STAT(FlagType));\r
 502 \r
 503         return ((SSPx->SR & FlagType) ? SET : RESET);\r
 504 }\r
 505 \r
 506 /*********************************************************************//**\r
 507  * @brief               Enable or disable specified interrupt type in SSP peripheral\r
 508  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 509  *                                      - LPC_SSP0      :SSP0 peripheral\r
 510  *                                      - LPC_SSP1      :SSP1 peripheral\r
 511  * @param[in]   IntType Interrupt type in SSP peripheral, should be:\r
 512  *                                      - SSP_INTCFG_ROR        :Receive Overrun interrupt\r
 513  *                                      - SSP_INTCFG_RT         :Receive Time out interrupt\r
 514  *                                      - SSP_INTCFG_RX         :RX FIFO is at least half full interrupt\r
 515  *                                      - SSP_INTCFG_TX         :TX FIFO is at least half empty interrupt\r
 516  * @param[in]   NewState New State of specified interrupt type, should be:\r
 517  *                                      - ENABLE        :Enable this interrupt type\r
 518  *                                      - DISABLE       :Disable this interrupt type\r
 519  * @return              None\r
 520  **********************************************************************/\r
 521 void SSP_IntConfig(LPC_SSPn_Type *SSPx, uint32_t IntType, FunctionalState NewState)\r
 522 {\r
 523         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 524         CHECK_PARAM(PARAM_SSP_INTCFG(IntType));\r
 525 \r
 526         if (NewState == ENABLE)\r
 527         {\r
 528                 SSPx->IMSC |= IntType;\r
 529         }\r
 530         else\r
 531         {\r
 532                 SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK;\r
 533         }\r
 534 }\r
 535 \r
 536 /*********************************************************************//**\r
 537  * @brief       Check whether the specified Raw interrupt status flag is\r
 538  *                      set or not\r
 539  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 540  *                                      - LPC_SSP0      :SSP0 peripheral\r
 541  *                                      - LPC_SSP1      :SSP1 peripheral\r
 542  * @param[in]   RawIntType      Raw Interrupt Type, should be:\r
 543  *                                      - SSP_INTSTAT_RAW_ROR   :Receive Overrun interrupt\r
 544  *                                      - SSP_INTSTAT_RAW_RT    :Receive Time out interrupt\r
 545  *                                      - SSP_INTSTAT_RAW_RX    :RX FIFO is at least half full interrupt\r
 546  *                                      - SSP_INTSTAT_RAW_TX    :TX FIFO is at least half empty interrupt\r
 547  * @return      New State of specified Raw interrupt status flag in SSP peripheral\r
 548  * Note: Enabling/Disabling specified interrupt in SSP peripheral does not\r
 549  *              effect to Raw Interrupt Status flag.\r
 550  **********************************************************************/\r
 551 IntStatus SSP_GetRawIntStatus(LPC_SSPn_Type *SSPx, uint32_t RawIntType)\r
 552 {\r
 553         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 554         CHECK_PARAM(PARAM_SSP_INTSTAT_RAW(RawIntType));\r
 555 \r
 556         return ((SSPx->RIS & RawIntType) ? SET : RESET);\r
 557 }\r
 558 \r
 559 \r
 560 /*********************************************************************//**\r
 561  * @brief               Check whether the specified interrupt status flag is\r
 562  *                              set or not\r
 563  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 564  *                                      - LPC_SSP0      :SSP0 peripheral\r
 565  *                                      - LPC_SSP1      :SSP1 peripheral\r
 566  * @param[in]   IntType Raw Interrupt Type, should be:\r
 567  *                                      - SSP_INTSTAT_ROR       :Receive Overrun interrupt\r
 568  *                                      - SSP_INTSTAT_RT        :Receive Time out interrupt\r
 569  *                                      - SSP_INTSTAT_RX        :RX FIFO is at least half full interrupt\r
 570  *                                      - SSP_INTSTAT_TX        :TX FIFO is at least half empty interrupt\r
 571  * @return      New State of specified interrupt status flag in SSP peripheral\r
 572  * Note: Enabling/Disabling specified interrupt in SSP peripheral effects\r
 573  *                      to Interrupt Status flag.\r
 574  **********************************************************************/\r
 575 IntStatus SSP_GetIntStatus (LPC_SSPn_Type *SSPx, uint32_t IntType)\r
 576 {\r
 577         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 578         CHECK_PARAM(PARAM_SSP_INTSTAT(IntType));\r
 579 \r
 580         return ((SSPx->MIS & IntType) ? SET :RESET);\r
 581 }\r
 582 \r
 583 /*********************************************************************//**\r
 584  * @brief               Clear specified interrupt pending in SSP peripheral\r
 585  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 586  *                                      - LPC_SSP0      :SSP0 peripheral\r
 587  *                                      - LPC_SSP1      :SSP1 peripheral\r
 588  * @param[in]   IntType Interrupt pending to clear, should be:\r
 589  *                                      - SSP_INTCLR_ROR        :clears the "frame was received when\r
 590  *                                      RxFIFO was full" interrupt.\r
 591  *                                      - SSP_INTCLR_RT         :clears the "Rx FIFO was not empty and\r
 592  *                                      has not been read for a timeout period" interrupt.\r
 593  * @return              None\r
 594  **********************************************************************/\r
 595 void SSP_ClearIntPending(LPC_SSPn_Type *SSPx, uint32_t IntType)\r
 596 {\r
 597         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 598         CHECK_PARAM(PARAM_SSP_INTCLR(IntType));\r
 599 \r
 600         SSPx->ICR = IntType;\r
 601 }\r
 602 \r
 603 /*********************************************************************//**\r
 604  * @brief               Enable/Disable DMA function for SSP peripheral\r
 605  * @param[in]   SSPx    SSP peripheral selected, should be:\r
 606  *                                      - LPC_SSP0      :SSP0 peripheral\r
 607  *                                      - LPC_SSP1      :SSP1 peripheral\r
 608  * @param[in]   DMAMode Type of DMA, should be:\r
 609  *                                      - SSP_DMA_TX    :DMA for the transmit FIFO\r
 610  *                                      - SSP_DMA_RX    :DMA for the Receive FIFO\r
 611  * @param[in]   NewState        New State of DMA function on SSP peripheral,\r
 612  *                                              should be:\r
 613  *                                      - ENALBE        :Enable this function\r
 614  *                                      - DISABLE       :Disable this function\r
 615  * @return              None\r
 616  **********************************************************************/\r
 617 void SSP_DMACmd(LPC_SSPn_Type *SSPx, uint32_t DMAMode, FunctionalState NewState)\r
 618 {\r
 619         CHECK_PARAM(PARAM_SSPx(SSPx));\r
 620         CHECK_PARAM(PARAM_SSP_DMA(DMAMode));\r
 621         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
 622 \r
 623         if (NewState == ENABLE)\r
 624         {\r
 625                 SSPx->DMACR |= DMAMode;\r
 626         }\r
 627         else\r
 628         {\r
 629                 SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK;\r
 630         }\r
 631 }\r
 632 \r
 633 /**\r
 634  * @}\r
 635  */\r
 636 \r
 637 #endif /* _SSP */\r
 638 \r
 639 /**\r
 640  * @}\r
 641  */\r
 642 \r
 643 /* --------------------------------- End Of File ------------------------------ */\r
 644 \r