2 FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.
\r
4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
\r
5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 ***************************************************************************
\r
9 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
10 * Complete, revised, and edited pdf reference manuals are also *
\r
13 * Purchasing FreeRTOS documentation will not only help you, by *
\r
14 * ensuring you get running as quickly as possible and with an *
\r
15 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
16 * the FreeRTOS project to continue with its mission of providing *
\r
17 * professional grade, cross platform, de facto standard solutions *
\r
18 * for microcontrollers - completely free of charge! *
\r
20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
22 * Thank you for using FreeRTOS, and thank you for your support! *
\r
24 ***************************************************************************
\r
27 This file is part of the FreeRTOS distribution.
\r
29 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
30 the terms of the GNU General Public License (version 2) as published by the
\r
31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
\r
34 distribute a combined work that includes FreeRTOS without being obliged to
\r
35 provide the source code for proprietary components outside of the FreeRTOS
\r
38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
\r
41 details. You should have received a copy of the GNU General Public License
\r
42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
\r
43 viewed here: http://www.freertos.org/a00114.html and also obtained by
\r
44 writing to Real Time Engineers Ltd., contact details for whom are available
\r
45 on the FreeRTOS WEB site.
\r
49 ***************************************************************************
\r
51 * Having a problem? Start by reading the FAQ "My application does *
\r
52 * not run, what could be wrong?" *
\r
54 * http://www.FreeRTOS.org/FAQHelp.html *
\r
56 ***************************************************************************
\r
59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
\r
60 license and Real Time Engineers Ltd. contact details.
\r
62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
\r
64 fully thread aware and reentrant UDP/IP stack.
\r
66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
\r
67 Integrity Systems, who sell the code with commercial support,
\r
68 indemnification and middleware, under the OpenRTOS brand.
\r
70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
71 engineered and independently SIL3 certified version for use in safety and
\r
72 mission critical applications that require provable dependability.
\r
75 /* Scheduler includes. */
\r
76 #include "FreeRTOS.h"
\r
80 /* Demo app includes. */
\r
81 #include "USBSample.h"
\r
83 #define usbINT_CLEAR_MASK (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
\r
85 #define usbCSR_CLEAR_BIT( pulValueNow, ulBit ) \
\r
87 /* Set TXCOMP, RX_DATA_BK0, RXSETUP, */ \
\r
88 /* STALLSENT and RX_DATA_BK1 to 1 so the */ \
\r
89 /* write has no effect. */ \
\r
90 ( * ( ( unsigned long * ) pulValueNow ) ) |= ( unsigned long ) 0x4f; \
\r
92 /* Clear the FORCE_STALL and TXPKTRDY bits */ \
\r
93 /* so the write has no effect. */ \
\r
94 ( * ( ( unsigned long * ) pulValueNow ) ) &= ( unsigned long ) 0xffffffcf; \
\r
96 /* Clear whichever bit we want clear. */ \
\r
97 ( * ( ( unsigned long * ) pulValueNow ) ) &= ( ~ulBit ); \
\r
101 /*-----------------------------------------------------------*/
\r
107 void vUSB_ISR_Wrapper( void ) __attribute__((naked));
\r
110 * Actual ISR handler. This must be separate from the entry point as the stack
\r
113 void vUSB_ISR_Handler( void ) __attribute__((noinline));
\r
115 /*-----------------------------------------------------------*/
\r
117 /* Array in which the USB interrupt status is passed between the ISR and task. */
\r
118 static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
\r
120 /* Queue used to pass messages between the ISR and the task. */
\r
121 extern xQueueHandle xUSBInterruptQueue;
\r
123 /*-----------------------------------------------------------*/
\r
125 void vUSB_ISR_Handler( void )
\r
127 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
128 static volatile unsigned long ulNextMessage = 0;
\r
129 xISRStatus *pxMessage;
\r
130 unsigned long ulTemp, ulRxBytes;
\r
132 /* To reduce the amount of time spent in this interrupt it would be
\r
133 possible to defer the majority of this processing to an 'interrupt task',
\r
134 that is a task that runs at a higher priority than any of the application
\r
137 /* Take the next message from the queue. Note that usbQUEUE_LENGTH *must*
\r
138 be all 1's, as in 0x01, 0x03, 0x07, etc. */
\r
139 pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
\r
142 /* Take a snapshot of the current USB state for processing at the task
\r
144 pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
\r
145 pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
\r
147 /* Clear the interrupts from the ICR register. The bus end interrupt is
\r
148 cleared separately as it does not appear in the mask register. */
\r
149 AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
\r
151 /* If there are bytes in the FIFO then we have to retrieve them here.
\r
152 Ideally this would be done at the task level. However we need to clear the
\r
153 RXSETUP interrupt before leaving the ISR, and this may cause the data in
\r
154 the FIFO to be overwritten. Also the DIR bit has to be changed before the
\r
155 RXSETUP bit is cleared (as per the SAM7 manual). */
\r
156 ulTemp = pxMessage->ulCSR0;
\r
158 /* Are there any bytes in the FIFO? */
\r
159 ulRxBytes = ulTemp >> 16;
\r
160 ulRxBytes &= usbRX_COUNT_MASK;
\r
162 /* With this minimal implementation we are only interested in receiving
\r
163 setup bytes on the control end point. */
\r
164 if( ( ulRxBytes > 0 ) && ( ulTemp & AT91C_UDP_RXSETUP ) )
\r
166 /* Take off 1 for a zero based index. */
\r
167 while( ulRxBytes > 0 )
\r
170 pxMessage->ucFifoData[ ulRxBytes ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
\r
173 /* The direction must be changed first. */
\r
174 usbCSR_SET_BIT( &ulTemp, ( AT91C_UDP_DIR ) );
\r
175 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
\r
178 /* Must write zero's to TXCOMP, STALLSENT, RXSETUP, and the RX DATA
\r
179 registers to clear the interrupts in the CSR register. */
\r
180 usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
\r
181 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
\r
183 /* Also clear the interrupts in the CSR1 register. */
\r
184 ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ];
\r
185 usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
\r
186 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] = ulTemp;
\r
188 /* The message now contains the entire state and optional data from
\r
189 the USB interrupt. This can now be posted on the Rx queue ready for
\r
190 processing at the task level. */
\r
191 xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
\r
193 /* We may want to switch to the USB task, if this message has made
\r
194 it the highest priority task that is ready to execute. */
\r
195 if( xHigherPriorityTaskWoken )
\r
197 portYIELD_FROM_ISR();
\r
200 /* Clear the AIC ready for the next interrupt. */
\r
201 AT91C_BASE_AIC->AIC_EOICR = 0;
\r
203 /*-----------------------------------------------------------*/
\r
205 void vUSB_ISR_Wrapper( void )
\r
207 /* Save the context of the interrupted task. */
\r
208 portSAVE_CONTEXT();
\r
210 /* Call the handler itself. This must be a separate function as it uses
\r
212 __asm volatile ("bl vUSB_ISR_Handler");
\r
214 /* Restore the context of the task that is going to
\r
215 execute next. This might not be the same as the originally
\r
216 interrupted task.*/
\r
217 portRESTORE_CONTEXT();
\r