2 FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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72 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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75 /* Standard includes. */
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78 /* Scheduler includes. */
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79 #include "FreeRTOS.h"
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83 /* Demo application includes. */
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86 /*-----------------------------------------------------------*/
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88 /* Constants to setup and access the UART. */
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89 #define serDLAB ( ( unsigned char ) 0x80 )
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90 #define serENABLE_INTERRUPTS ( ( unsigned char ) 0x03 )
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91 #define serNO_PARITY ( ( unsigned char ) 0x00 )
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92 #define ser1_STOP_BIT ( ( unsigned char ) 0x00 )
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93 #define ser8_BIT_CHARS ( ( unsigned char ) 0x03 )
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94 #define serFIFO_ON ( ( unsigned char ) 0x01 )
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95 #define serCLEAR_FIFO ( ( unsigned char ) 0x06 )
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96 #define serWANTED_CLOCK_SCALING ( ( unsigned long ) 16 )
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98 /* Constants to setup and access the VIC. */
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99 #define serU0VIC_CHANNEL ( ( unsigned long ) 0x0006 )
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100 #define serU0VIC_CHANNEL_BIT ( ( unsigned long ) 0x0040 )
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101 #define serU0VIC_ENABLE ( ( unsigned long ) 0x0020 )
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102 #define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
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104 /* Constants to determine the ISR source. */
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105 #define serSOURCE_THRE ( ( unsigned char ) 0x02 )
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106 #define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
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107 #define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
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108 #define serSOURCE_RX ( ( unsigned char ) 0x04 )
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109 #define serINTERRUPT_SOURCE_MASK ( ( unsigned char ) 0x0f )
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112 #define serINVALID_QUEUE ( ( QueueHandle_t ) 0 )
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113 #define serHANDLE ( ( xComPortHandle ) 1 )
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114 #define serNO_BLOCK ( ( TickType_t ) 0 )
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116 /*-----------------------------------------------------------*/
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118 /* Queues used to hold received characters, and characters waiting to be
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120 static QueueHandle_t xRxedChars;
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121 static QueueHandle_t xCharsForTx;
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122 static volatile long lTHREEmpty = pdFALSE;
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124 /*-----------------------------------------------------------*/
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126 /* The ISR. Note that this is called by a wrapper written in the file
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127 SerialISR.s79. See the WEB documentation for this port for further
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129 __arm void vSerialISR( void );
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131 /*-----------------------------------------------------------*/
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133 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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135 unsigned long ulDivisor, ulWantedClock;
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136 xComPortHandle xReturn = serHANDLE;
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137 extern void ( vSerialISREntry) ( void );
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139 /* Create the queues used to hold Rx and Tx characters. */
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140 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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141 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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143 /* Initialise the THRE empty flag. */
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144 lTHREEmpty = pdTRUE;
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147 ( xRxedChars != serINVALID_QUEUE ) &&
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148 ( xCharsForTx != serINVALID_QUEUE ) &&
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149 ( ulWantedBaud != ( unsigned long ) 0 )
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152 portENTER_CRITICAL();
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154 /* Setup the baud rate: Calculate the divisor value. */
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155 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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156 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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158 /* Set the DLAB bit so we can access the divisor. */
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161 /* Setup the divisor. */
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162 U0DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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164 U0DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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166 /* Turn on the FIFO's and clear the buffers. */
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167 U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
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169 /* Setup transmission format. */
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170 U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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172 /* Setup the VIC for the UART. */
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173 VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
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174 VICIntEnable |= serU0VIC_CHANNEL_BIT;
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175 VICVectAddr1 = ( unsigned long ) vSerialISREntry;
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176 VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
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178 /* Enable UART0 interrupts. */
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179 U0IER |= serENABLE_INTERRUPTS;
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181 portEXIT_CRITICAL();
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183 xReturn = ( xComPortHandle ) 1;
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187 xReturn = ( xComPortHandle ) 0;
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192 /*-----------------------------------------------------------*/
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194 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
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196 /* The port handle is not required as this driver only supports UART0. */
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199 /* Get the next character from the buffer. Return false if no characters
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200 are available, or arrive before xBlockTime expires. */
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201 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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210 /*-----------------------------------------------------------*/
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212 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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214 signed char *pxNext;
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216 /* NOTE: This implementation does not handle the queue being full as no
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217 block time is used! */
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219 /* The port handle is not required as this driver only supports UART0. */
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221 ( void ) usStringLength;
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223 /* Send each character in the string, one at a time. */
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224 pxNext = ( signed char * ) pcString;
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227 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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231 /*-----------------------------------------------------------*/
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233 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
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235 signed portBASE_TYPE xReturn;
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237 /* The port handle is not required as this driver only supports UART0. */
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240 portENTER_CRITICAL();
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242 /* Is there space to write directly to the UART? */
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243 if( lTHREEmpty == ( long ) pdTRUE )
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245 /* We wrote the character directly to the UART, so was
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247 lTHREEmpty = pdFALSE;
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253 /* We cannot write directly to the UART, so queue the character.
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254 Block for a maximum of xBlockTime if there is no space in the
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255 queue. It is ok to block within a critical section as each
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256 task has it's own critical section management. */
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257 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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259 /* Depending on queue sizing and task prioritisation: While we
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260 were blocked waiting to post interrupts were not disabled. It is
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261 possible that the serial ISR has emptied the Tx queue, in which
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262 case we need to start the Tx off again. */
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263 if( lTHREEmpty == ( long ) pdTRUE )
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265 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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266 lTHREEmpty = pdFALSE;
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271 portEXIT_CRITICAL();
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275 /*-----------------------------------------------------------*/
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277 __arm void vSerialISR( void )
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280 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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282 /* What caused the interrupt? */
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283 switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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285 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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289 case serSOURCE_THRE : /* The THRE is empty. If there is another
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290 character in the Tx queue, send it now. */
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291 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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297 /* There are no further characters
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298 queued to send so we can indicate
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299 that the THRE is available. */
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300 lTHREEmpty = pdTRUE;
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304 case serSOURCE_RX_TIMEOUT :
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305 case serSOURCE_RX : /* A character was received. Place it in
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306 the queue of received characters. */
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308 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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311 default : /* There is nothing to do, leave the ISR. */
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315 /* Exit the ISR. If a task was woken by either a character being received
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316 or transmitted then a context switch will occur. */
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317 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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319 /* Clear the ISR in the VIC. */
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320 VICVectAddr = serCLEAR_VIC_INTERRUPT;
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322 /*-----------------------------------------------------------*/
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