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1 /*\r
2     FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS provides completely free yet professionally developed,    *\r
10      *    robust, strictly quality controlled, supported, and cross          *\r
11      *    platform software that has become a de facto standard.             *\r
12      *                                                                       *\r
13      *    Help yourself get started quickly and support the FreeRTOS         *\r
14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
16      *                                                                       *\r
17      *    Thank you!                                                         *\r
18      *                                                                       *\r
19     ***************************************************************************\r
20 \r
21     This file is part of the FreeRTOS distribution.\r
22 \r
23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
24     the terms of the GNU General Public License (version 2) as published by the\r
25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
26 \r
27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
29     >>!   obliged to provide the source code for proprietary components     !<<\r
30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
31 \r
32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
35     link: http://www.freertos.org/a00114.html\r
36 \r
37     1 tab == 4 spaces!\r
38 \r
39     ***************************************************************************\r
40      *                                                                       *\r
41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
42      *    not run, what could be wrong?"                                     *\r
43      *                                                                       *\r
44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
49     license and Real Time Engineers Ltd. contact details.\r
50 \r
51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
54 \r
55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
57     licenses offer ticketed support, indemnification and middleware.\r
58 \r
59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
60     engineered and independently SIL3 certified version for use in safety and\r
61     mission critical applications that require provable dependability.\r
62 \r
63     1 tab == 4 spaces!\r
64 */\r
65 \r
66 \r
67 /*\r
68         BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
69 */\r
70 \r
71 /* Standard includes. */\r
72 #include <stdlib.h>\r
73 \r
74 /* Scheduler includes. */\r
75 #include "FreeRTOS.h"\r
76 #include "queue.h"\r
77 #include "task.h"\r
78 \r
79 /* Demo application includes. */\r
80 #include "serial.h"\r
81 \r
82 /*-----------------------------------------------------------*/\r
83 \r
84 /* Constants to setup and access the UART. */\r
85 #define serDLAB                                                 ( ( unsigned char ) 0x80 )\r
86 #define serENABLE_INTERRUPTS                    ( ( unsigned char ) 0x03 )\r
87 #define serNO_PARITY                                    ( ( unsigned char ) 0x00 )\r
88 #define ser1_STOP_BIT                                   ( ( unsigned char ) 0x00 )\r
89 #define ser8_BIT_CHARS                                  ( ( unsigned char ) 0x03 )\r
90 #define serFIFO_ON                                              ( ( unsigned char ) 0x01 )\r
91 #define serCLEAR_FIFO                                   ( ( unsigned char ) 0x06 )\r
92 #define serWANTED_CLOCK_SCALING                 ( ( unsigned long ) 16 )\r
93 \r
94 /* Constants to setup and access the VIC. */\r
95 #define serU0VIC_CHANNEL                                ( ( unsigned long ) 0x0006 )\r
96 #define serU0VIC_CHANNEL_BIT                    ( ( unsigned long ) 0x0040 )\r
97 #define serU0VIC_ENABLE                                 ( ( unsigned long ) 0x0020 )\r
98 #define serCLEAR_VIC_INTERRUPT                  ( ( unsigned long ) 0 )\r
99 \r
100 /* Constants to determine the ISR source. */\r
101 #define serSOURCE_THRE                                  ( ( unsigned char ) 0x02 )\r
102 #define serSOURCE_RX_TIMEOUT                    ( ( unsigned char ) 0x0c )\r
103 #define serSOURCE_ERROR                                 ( ( unsigned char ) 0x06 )\r
104 #define serSOURCE_RX                                    ( ( unsigned char ) 0x04 )\r
105 #define serINTERRUPT_SOURCE_MASK                ( ( unsigned char ) 0x0f )\r
106 \r
107 /* Misc. */\r
108 #define serINVALID_QUEUE                                ( ( QueueHandle_t ) 0 )\r
109 #define serHANDLE                                               ( ( xComPortHandle ) 1 )\r
110 #define serNO_BLOCK                                             ( ( TickType_t ) 0 )\r
111 \r
112 /*-----------------------------------------------------------*/\r
113 \r
114 /* Queues used to hold received characters, and characters waiting to be\r
115 transmitted. */\r
116 static QueueHandle_t xRxedChars;\r
117 static QueueHandle_t xCharsForTx;\r
118 static volatile long lTHREEmpty = pdFALSE;\r
119 \r
120 /*-----------------------------------------------------------*/\r
121 \r
122 /* The ISR.  Note that this is called by a wrapper written in the file\r
123 SerialISR.s79.  See the WEB documentation for this port for further\r
124 information. */\r
125 __arm void vSerialISR( void );\r
126 \r
127 /*-----------------------------------------------------------*/\r
128 \r
129 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
130 {\r
131 unsigned long ulDivisor, ulWantedClock;\r
132 xComPortHandle xReturn = serHANDLE;\r
133 extern void ( vSerialISREntry) ( void );\r
134 \r
135         /* Create the queues used to hold Rx and Tx characters. */\r
136         xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
137         xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
138 \r
139         /* Initialise the THRE empty flag. */\r
140         lTHREEmpty = pdTRUE;\r
141 \r
142         if(\r
143                 ( xRxedChars != serINVALID_QUEUE ) &&\r
144                 ( xCharsForTx != serINVALID_QUEUE ) &&\r
145                 ( ulWantedBaud != ( unsigned long ) 0 )\r
146           )\r
147         {\r
148                 portENTER_CRITICAL();\r
149                 {\r
150                         /* Setup the baud rate:  Calculate the divisor value. */\r
151                         ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;\r
152                         ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;\r
153 \r
154                         /* Set the DLAB bit so we can access the divisor. */\r
155                         U0LCR |= serDLAB;\r
156 \r
157                         /* Setup the divisor. */\r
158                         U0DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );\r
159                         ulDivisor >>= 8;\r
160                         U0DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );\r
161 \r
162                         /* Turn on the FIFO's and clear the buffers. */\r
163                         U0FCR = ( serFIFO_ON | serCLEAR_FIFO );\r
164 \r
165                         /* Setup transmission format. */\r
166                         U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;\r
167 \r
168                         /* Setup the VIC for the UART. */\r
169                         VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );\r
170                         VICIntEnable |= serU0VIC_CHANNEL_BIT;\r
171                         VICVectAddr1 = ( unsigned long ) vSerialISREntry;\r
172                         VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;\r
173 \r
174                         /* Enable UART0 interrupts. */\r
175                         U0IER |= serENABLE_INTERRUPTS;\r
176                 }\r
177                 portEXIT_CRITICAL();\r
178 \r
179                 xReturn = ( xComPortHandle ) 1;\r
180         }\r
181         else\r
182         {\r
183                 xReturn = ( xComPortHandle ) 0;\r
184         }\r
185 \r
186         return xReturn;\r
187 }\r
188 /*-----------------------------------------------------------*/\r
189 \r
190 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )\r
191 {\r
192         /* The port handle is not required as this driver only supports UART0. */\r
193         ( void ) pxPort;\r
194 \r
195         /* Get the next character from the buffer.  Return false if no characters\r
196         are available, or arrive before xBlockTime expires. */\r
197         if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
198         {\r
199                 return pdTRUE;\r
200         }\r
201         else\r
202         {\r
203                 return pdFALSE;\r
204         }\r
205 }\r
206 /*-----------------------------------------------------------*/\r
207 \r
208 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
209 {\r
210 signed char *pxNext;\r
211 \r
212         /* NOTE: This implementation does not handle the queue being full as no\r
213         block time is used! */\r
214 \r
215         /* The port handle is not required as this driver only supports UART0. */\r
216         ( void ) pxPort;\r
217         ( void ) usStringLength;\r
218 \r
219         /* Send each character in the string, one at a time. */\r
220         pxNext = ( signed char * ) pcString;\r
221         while( *pxNext )\r
222         {\r
223                 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
224                 pxNext++;\r
225         }\r
226 }\r
227 /*-----------------------------------------------------------*/\r
228 \r
229 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )\r
230 {\r
231 signed portBASE_TYPE xReturn;\r
232 \r
233         /* The port handle is not required as this driver only supports UART0. */\r
234         ( void ) pxPort;\r
235 \r
236         portENTER_CRITICAL();\r
237         {\r
238                 /* Is there space to write directly to the UART? */\r
239                 if( lTHREEmpty == ( long ) pdTRUE )\r
240                 {\r
241                         /* We wrote the character directly to the UART, so was\r
242                         successful. */\r
243                         lTHREEmpty = pdFALSE;\r
244                         U0THR = cOutChar;\r
245                         xReturn = pdPASS;\r
246                 }\r
247                 else\r
248                 {\r
249                         /* We cannot write directly to the UART, so queue the character.\r
250                         Block for a maximum of xBlockTime if there is no space in the\r
251                         queue.  It is ok to block within a critical section as each\r
252                         task has it's own critical section management. */\r
253                         xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );\r
254 \r
255                         /* Depending on queue sizing and task prioritisation:  While we\r
256                         were blocked waiting to post interrupts were not disabled.  It is\r
257                         possible that the serial ISR has emptied the Tx queue, in which\r
258                         case we need to start the Tx off again. */\r
259                         if( lTHREEmpty == ( long ) pdTRUE )\r
260                         {\r
261                                 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );\r
262                                 lTHREEmpty = pdFALSE;\r
263                                 U0THR = cOutChar;\r
264                         }\r
265                 }\r
266         }\r
267         portEXIT_CRITICAL();\r
268 \r
269         return xReturn;\r
270 }\r
271 /*-----------------------------------------------------------*/\r
272 \r
273 __arm void vSerialISR( void )\r
274 {\r
275 signed char cChar;\r
276 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
277 \r
278         /* What caused the interrupt? */\r
279         switch( U0IIR & serINTERRUPT_SOURCE_MASK )\r
280         {\r
281                 case serSOURCE_ERROR :  /* Not handling this, but clear the interrupt. */\r
282                                                                 cChar = U0LSR;\r
283                                                                 break;\r
284 \r
285                 case serSOURCE_THRE     :       /* The THRE is empty.  If there is another\r
286                                                                 character in the Tx queue, send it now. */\r
287                                                                 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
288                                                                 {\r
289                                                                         U0THR = cChar;\r
290                                                                 }\r
291                                                                 else\r
292                                                                 {\r
293                                                                         /* There are no further characters\r
294                                                                         queued to send so we can indicate\r
295                                                                         that the THRE is available. */\r
296                                                                         lTHREEmpty = pdTRUE;\r
297                                                                 }\r
298                                                                 break;\r
299 \r
300                 case serSOURCE_RX_TIMEOUT :\r
301                 case serSOURCE_RX       :       /* A character was received.  Place it in\r
302                                                                 the queue of received characters. */\r
303                                                                 cChar = U0RBR;\r
304                                                                 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
305                                                                 break;\r
306 \r
307                 default                         :       /* There is nothing to do, leave the ISR. */\r
308                                                                 break;\r
309         }\r
310 \r
311         /* Exit the ISR.  If a task was woken by either a character being received\r
312         or transmitted then a context switch will occur. */\r
313         portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
314 \r
315         /* Clear the ISR in the VIC. */\r
316         VICVectAddr = serCLEAR_VIC_INTERRUPT;\r
317 }\r
318 /*-----------------------------------------------------------*/\r