git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/ARM7_LPC2129_IAR/serial/serial.c

   1 /*\r
   2     FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  12 \r
  13     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
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  15     >>!   obliged to provide the source code for proprietary components     !<<\r
  16     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  17 \r
  18     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  19     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  20     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  21     link: http://www.freertos.org/a00114.html\r
  22 \r
  23     1 tab == 4 spaces!\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
  27      *    Having a problem?  Start by reading the FAQ "My application does   *\r
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  47 \r
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  63 \r
  64     ***************************************************************************\r
  65      *                                                                       *\r
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  73     ***************************************************************************\r
  74 \r
  75     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
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  77 \r
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  79     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
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  90     engineered and independently SIL3 certified version for use in safety and\r
  91     mission critical applications that require provable dependability.\r
  92 \r
  93     1 tab == 4 spaces!\r
  94 */\r
  95 \r
  96 \r
  97 /*\r
  98         BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
  99 */\r
 100 \r
 101 /* Standard includes. */\r
 102 #include <stdlib.h>\r
 103 \r
 104 /* Scheduler includes. */\r
 105 #include "FreeRTOS.h"\r
 106 #include "queue.h"\r
 107 #include "task.h"\r
 108 \r
 109 /* Demo application includes. */\r
 110 #include "serial.h"\r
 111 \r
 112 /*-----------------------------------------------------------*/\r
 113 \r
 114 /* Constants to setup and access the UART. */\r
 115 #define serDLAB                                                 ( ( unsigned char ) 0x80 )\r
 116 #define serENABLE_INTERRUPTS                    ( ( unsigned char ) 0x03 )\r
 117 #define serNO_PARITY                                    ( ( unsigned char ) 0x00 )\r
 118 #define ser1_STOP_BIT                                   ( ( unsigned char ) 0x00 )\r
 119 #define ser8_BIT_CHARS                                  ( ( unsigned char ) 0x03 )\r
 120 #define serFIFO_ON                                              ( ( unsigned char ) 0x01 )\r
 121 #define serCLEAR_FIFO                                   ( ( unsigned char ) 0x06 )\r
 122 #define serWANTED_CLOCK_SCALING                 ( ( unsigned long ) 16 )\r
 123 \r
 124 /* Constants to setup and access the VIC. */\r
 125 #define serU0VIC_CHANNEL                                ( ( unsigned long ) 0x0006 )\r
 126 #define serU0VIC_CHANNEL_BIT                    ( ( unsigned long ) 0x0040 )\r
 127 #define serU0VIC_ENABLE                                 ( ( unsigned long ) 0x0020 )\r
 128 #define serCLEAR_VIC_INTERRUPT                  ( ( unsigned long ) 0 )\r
 129 \r
 130 /* Constants to determine the ISR source. */\r
 131 #define serSOURCE_THRE                                  ( ( unsigned char ) 0x02 )\r
 132 #define serSOURCE_RX_TIMEOUT                    ( ( unsigned char ) 0x0c )\r
 133 #define serSOURCE_ERROR                                 ( ( unsigned char ) 0x06 )\r
 134 #define serSOURCE_RX                                    ( ( unsigned char ) 0x04 )\r
 135 #define serINTERRUPT_SOURCE_MASK                ( ( unsigned char ) 0x0f )\r
 136 \r
 137 /* Misc. */\r
 138 #define serINVALID_QUEUE                                ( ( QueueHandle_t ) 0 )\r
 139 #define serHANDLE                                               ( ( xComPortHandle ) 1 )\r
 140 #define serNO_BLOCK                                             ( ( TickType_t ) 0 )\r
 141 \r
 142 /*-----------------------------------------------------------*/\r
 143 \r
 144 /* Queues used to hold received characters, and characters waiting to be\r
 145 transmitted. */\r
 146 static QueueHandle_t xRxedChars;\r
 147 static QueueHandle_t xCharsForTx;\r
 148 static volatile long lTHREEmpty = pdFALSE;\r
 149 \r
 150 /*-----------------------------------------------------------*/\r
 151 \r
 152 /* The ISR.  Note that this is called by a wrapper written in the file\r
 153 SerialISR.s79.  See the WEB documentation for this port for further\r
 154 information. */\r
 155 __arm void vSerialISR( void );\r
 156 \r
 157 /*-----------------------------------------------------------*/\r
 158 \r
 159 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
 160 {\r
 161 unsigned long ulDivisor, ulWantedClock;\r
 162 xComPortHandle xReturn = serHANDLE;\r
 163 extern void ( vSerialISREntry) ( void );\r
 164 \r
 165         /* Create the queues used to hold Rx and Tx characters. */\r
 166         xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
 167         xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
 168 \r
 169         /* Initialise the THRE empty flag. */\r
 170         lTHREEmpty = pdTRUE;\r
 171 \r
 172         if(\r
 173                 ( xRxedChars != serINVALID_QUEUE ) &&\r
 174                 ( xCharsForTx != serINVALID_QUEUE ) &&\r
 175                 ( ulWantedBaud != ( unsigned long ) 0 )\r
 176           )\r
 177         {\r
 178                 portENTER_CRITICAL();\r
 179                 {\r
 180                         /* Setup the baud rate:  Calculate the divisor value. */\r
 181                         ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;\r
 182                         ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;\r
 183 \r
 184                         /* Set the DLAB bit so we can access the divisor. */\r
 185                         U0LCR |= serDLAB;\r
 186 \r
 187                         /* Setup the divisor. */\r
 188                         U0DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );\r
 189                         ulDivisor >>= 8;\r
 190                         U0DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );\r
 191 \r
 192                         /* Turn on the FIFO's and clear the buffers. */\r
 193                         U0FCR = ( serFIFO_ON | serCLEAR_FIFO );\r
 194 \r
 195                         /* Setup transmission format. */\r
 196                         U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;\r
 197 \r
 198                         /* Setup the VIC for the UART. */\r
 199                         VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );\r
 200                         VICIntEnable |= serU0VIC_CHANNEL_BIT;\r
 201                         VICVectAddr1 = ( unsigned long ) vSerialISREntry;\r
 202                         VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;\r
 203 \r
 204                         /* Enable UART0 interrupts. */\r
 205                         U0IER |= serENABLE_INTERRUPTS;\r
 206                 }\r
 207                 portEXIT_CRITICAL();\r
 208 \r
 209                 xReturn = ( xComPortHandle ) 1;\r
 210         }\r
 211         else\r
 212         {\r
 213                 xReturn = ( xComPortHandle ) 0;\r
 214         }\r
 215 \r
 216         return xReturn;\r
 217 }\r
 218 /*-----------------------------------------------------------*/\r
 219 \r
 220 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )\r
 221 {\r
 222         /* The port handle is not required as this driver only supports UART0. */\r
 223         ( void ) pxPort;\r
 224 \r
 225         /* Get the next character from the buffer.  Return false if no characters\r
 226         are available, or arrive before xBlockTime expires. */\r
 227         if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
 228         {\r
 229                 return pdTRUE;\r
 230         }\r
 231         else\r
 232         {\r
 233                 return pdFALSE;\r
 234         }\r
 235 }\r
 236 /*-----------------------------------------------------------*/\r
 237 \r
 238 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
 239 {\r
 240 signed char *pxNext;\r
 241 \r
 242         /* NOTE: This implementation does not handle the queue being full as no\r
 243         block time is used! */\r
 244 \r
 245         /* The port handle is not required as this driver only supports UART0. */\r
 246         ( void ) pxPort;\r
 247         ( void ) usStringLength;\r
 248 \r
 249         /* Send each character in the string, one at a time. */\r
 250         pxNext = ( signed char * ) pcString;\r
 251         while( *pxNext )\r
 252         {\r
 253                 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
 254                 pxNext++;\r
 255         }\r
 256 }\r
 257 /*-----------------------------------------------------------*/\r
 258 \r
 259 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )\r
 260 {\r
 261 signed portBASE_TYPE xReturn;\r
 262 \r
 263         /* The port handle is not required as this driver only supports UART0. */\r
 264         ( void ) pxPort;\r
 265 \r
 266         portENTER_CRITICAL();\r
 267         {\r
 268                 /* Is there space to write directly to the UART? */\r
 269                 if( lTHREEmpty == ( long ) pdTRUE )\r
 270                 {\r
 271                         /* We wrote the character directly to the UART, so was\r
 272                         successful. */\r
 273                         lTHREEmpty = pdFALSE;\r
 274                         U0THR = cOutChar;\r
 275                         xReturn = pdPASS;\r
 276                 }\r
 277                 else\r
 278                 {\r
 279                         /* We cannot write directly to the UART, so queue the character.\r
 280                         Block for a maximum of xBlockTime if there is no space in the\r
 281                         queue.  It is ok to block within a critical section as each\r
 282                         task has it's own critical section management. */\r
 283                         xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );\r
 284 \r
 285                         /* Depending on queue sizing and task prioritisation:  While we\r
 286                         were blocked waiting to post interrupts were not disabled.  It is\r
 287                         possible that the serial ISR has emptied the Tx queue, in which\r
 288                         case we need to start the Tx off again. */\r
 289                         if( lTHREEmpty == ( long ) pdTRUE )\r
 290                         {\r
 291                                 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );\r
 292                                 lTHREEmpty = pdFALSE;\r
 293                                 U0THR = cOutChar;\r
 294                         }\r
 295                 }\r
 296         }\r
 297         portEXIT_CRITICAL();\r
 298 \r
 299         return xReturn;\r
 300 }\r
 301 /*-----------------------------------------------------------*/\r
 302 \r
 303 __arm void vSerialISR( void )\r
 304 {\r
 305 signed char cChar;\r
 306 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
 307 \r
 308         /* What caused the interrupt? */\r
 309         switch( U0IIR & serINTERRUPT_SOURCE_MASK )\r
 310         {\r
 311                 case serSOURCE_ERROR :  /* Not handling this, but clear the interrupt. */\r
 312                                                                 cChar = U0LSR;\r
 313                                                                 break;\r
 314 \r
 315                 case serSOURCE_THRE     :       /* The THRE is empty.  If there is another\r
 316                                                                 character in the Tx queue, send it now. */\r
 317                                                                 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
 318                                                                 {\r
 319                                                                         U0THR = cChar;\r
 320                                                                 }\r
 321                                                                 else\r
 322                                                                 {\r
 323                                                                         /* There are no further characters\r
 324                                                                         queued to send so we can indicate\r
 325                                                                         that the THRE is available. */\r
 326                                                                         lTHREEmpty = pdTRUE;\r
 327                                                                 }\r
 328                                                                 break;\r
 329 \r
 330                 case serSOURCE_RX_TIMEOUT :\r
 331                 case serSOURCE_RX       :       /* A character was received.  Place it in\r
 332                                                                 the queue of received characters. */\r
 333                                                                 cChar = U0RBR;\r
 334                                                                 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
 335                                                                 break;\r
 336 \r
 337                 default                         :       /* There is nothing to do, leave the ISR. */\r
 338                                                                 break;\r
 339         }\r
 340 \r
 341         /* Exit the ISR.  If a task was woken by either a character being received\r
 342         or transmitted then a context switch will occur. */\r
 343         portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
 344 \r
 345         /* Clear the ISR in the VIC. */\r
 346         VICVectAddr = serCLEAR_VIC_INTERRUPT;\r
 347 }\r
 348 /*-----------------------------------------------------------*/\r