2 FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 ***************************************************************************
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46 * Having a problem? Start by reading the FAQ "My application does *
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47 * not run, what could be wrong? *
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49 * http://www.FreeRTOS.org/FAQHelp.html *
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51 ***************************************************************************
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54 http://www.FreeRTOS.org - Documentation, training, latest information,
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55 license and contact details.
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57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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58 including FreeRTOS+Trace - an indispensable productivity tool.
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60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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61 the code with commercial support, indemnification, and middleware, under
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62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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63 provide a safety engineered and independently SIL3 certified version under
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64 the SafeRTOS brand: http://www.SafeRTOS.com.
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69 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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72 /* Standard includes. */
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75 /* Scheduler includes. */
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76 #include "FreeRTOS.h"
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80 /* Demo application includes. */
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83 /*-----------------------------------------------------------*/
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85 /* Constants to setup and access the UART. */
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86 #define serDLAB ( ( unsigned char ) 0x80 )
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87 #define serENABLE_INTERRUPTS ( ( unsigned char ) 0x03 )
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88 #define serNO_PARITY ( ( unsigned char ) 0x00 )
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89 #define ser1_STOP_BIT ( ( unsigned char ) 0x00 )
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90 #define ser8_BIT_CHARS ( ( unsigned char ) 0x03 )
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91 #define serFIFO_ON ( ( unsigned char ) 0x01 )
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92 #define serCLEAR_FIFO ( ( unsigned char ) 0x06 )
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93 #define serWANTED_CLOCK_SCALING ( ( unsigned long ) 16 )
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95 /* Constants to setup and access the VIC. */
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96 #define serU0VIC_CHANNEL ( ( unsigned long ) 0x0006 )
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97 #define serU0VIC_CHANNEL_BIT ( ( unsigned long ) 0x0040 )
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98 #define serU0VIC_ENABLE ( ( unsigned long ) 0x0020 )
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99 #define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
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101 /* Constants to determine the ISR source. */
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102 #define serSOURCE_THRE ( ( unsigned char ) 0x02 )
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103 #define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
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104 #define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
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105 #define serSOURCE_RX ( ( unsigned char ) 0x04 )
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106 #define serINTERRUPT_SOURCE_MASK ( ( unsigned char ) 0x0f )
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109 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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110 #define serHANDLE ( ( xComPortHandle ) 1 )
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111 #define serNO_BLOCK ( ( portTickType ) 0 )
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113 /*-----------------------------------------------------------*/
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115 /* Queues used to hold received characters, and characters waiting to be
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117 static xQueueHandle xRxedChars;
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118 static xQueueHandle xCharsForTx;
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119 static volatile long lTHREEmpty = pdFALSE;
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121 /*-----------------------------------------------------------*/
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123 /* The ISR. Note that this is called by a wrapper written in the file
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124 SerialISR.s79. See the WEB documentation for this port for further
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126 __arm void vSerialISR( void );
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128 /*-----------------------------------------------------------*/
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130 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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132 unsigned long ulDivisor, ulWantedClock;
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133 xComPortHandle xReturn = serHANDLE;
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134 extern void ( vSerialISREntry) ( void );
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136 /* Create the queues used to hold Rx and Tx characters. */
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137 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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138 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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140 /* Initialise the THRE empty flag. */
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141 lTHREEmpty = pdTRUE;
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144 ( xRxedChars != serINVALID_QUEUE ) &&
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145 ( xCharsForTx != serINVALID_QUEUE ) &&
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146 ( ulWantedBaud != ( unsigned long ) 0 )
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149 portENTER_CRITICAL();
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151 /* Setup the baud rate: Calculate the divisor value. */
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152 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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153 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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155 /* Set the DLAB bit so we can access the divisor. */
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158 /* Setup the divisor. */
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159 U0DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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161 U0DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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163 /* Turn on the FIFO's and clear the buffers. */
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164 U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
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166 /* Setup transmission format. */
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167 U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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169 /* Setup the VIC for the UART. */
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170 VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
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171 VICIntEnable |= serU0VIC_CHANNEL_BIT;
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172 VICVectAddr1 = ( unsigned long ) vSerialISREntry;
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173 VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
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175 /* Enable UART0 interrupts. */
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176 U0IER |= serENABLE_INTERRUPTS;
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178 portEXIT_CRITICAL();
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180 xReturn = ( xComPortHandle ) 1;
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184 xReturn = ( xComPortHandle ) 0;
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189 /*-----------------------------------------------------------*/
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191 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
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193 /* The port handle is not required as this driver only supports UART0. */
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196 /* Get the next character from the buffer. Return false if no characters
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197 are available, or arrive before xBlockTime expires. */
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198 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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207 /*-----------------------------------------------------------*/
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209 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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211 signed char *pxNext;
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213 /* NOTE: This implementation does not handle the queue being full as no
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214 block time is used! */
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216 /* The port handle is not required as this driver only supports UART0. */
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218 ( void ) usStringLength;
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220 /* Send each character in the string, one at a time. */
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221 pxNext = ( signed char * ) pcString;
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224 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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228 /*-----------------------------------------------------------*/
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230 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
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232 signed portBASE_TYPE xReturn;
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234 /* The port handle is not required as this driver only supports UART0. */
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237 portENTER_CRITICAL();
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239 /* Is there space to write directly to the UART? */
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240 if( lTHREEmpty == ( long ) pdTRUE )
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242 /* We wrote the character directly to the UART, so was
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244 lTHREEmpty = pdFALSE;
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250 /* We cannot write directly to the UART, so queue the character.
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251 Block for a maximum of xBlockTime if there is no space in the
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252 queue. It is ok to block within a critical section as each
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253 task has it's own critical section management. */
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254 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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256 /* Depending on queue sizing and task prioritisation: While we
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257 were blocked waiting to post interrupts were not disabled. It is
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258 possible that the serial ISR has emptied the Tx queue, in which
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259 case we need to start the Tx off again. */
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260 if( lTHREEmpty == ( long ) pdTRUE )
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262 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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263 lTHREEmpty = pdFALSE;
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268 portEXIT_CRITICAL();
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272 /*-----------------------------------------------------------*/
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274 __arm void vSerialISR( void )
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277 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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279 /* What caused the interrupt? */
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280 switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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282 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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286 case serSOURCE_THRE : /* The THRE is empty. If there is another
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287 character in the Tx queue, send it now. */
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288 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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294 /* There are no further characters
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295 queued to send so we can indicate
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296 that the THRE is available. */
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297 lTHREEmpty = pdTRUE;
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301 case serSOURCE_RX_TIMEOUT :
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302 case serSOURCE_RX : /* A character was received. Place it in
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303 the queue of received characters. */
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305 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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308 default : /* There is nothing to do, leave the ISR. */
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312 /* Exit the ISR. If a task was woken by either a character being received
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313 or transmitted then a context switch will occur. */
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314 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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316 /* Clear the ISR in the VIC. */
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317 VICVectAddr = serCLEAR_VIC_INTERRUPT;
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319 /*-----------------------------------------------------------*/
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