2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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77 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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80 /* Standard includes. */
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83 /* Scheduler includes. */
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84 #include "FreeRTOS.h"
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88 /* Demo application includes. */
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91 /*-----------------------------------------------------------*/
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93 /* Constants to setup and access the UART. */
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94 #define serDLAB ( ( unsigned char ) 0x80 )
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95 #define serENABLE_INTERRUPTS ( ( unsigned char ) 0x03 )
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96 #define serNO_PARITY ( ( unsigned char ) 0x00 )
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97 #define ser1_STOP_BIT ( ( unsigned char ) 0x00 )
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98 #define ser8_BIT_CHARS ( ( unsigned char ) 0x03 )
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99 #define serFIFO_ON ( ( unsigned char ) 0x01 )
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100 #define serCLEAR_FIFO ( ( unsigned char ) 0x06 )
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101 #define serWANTED_CLOCK_SCALING ( ( unsigned long ) 16 )
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103 /* Constants to setup and access the VIC. */
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104 #define serU0VIC_CHANNEL ( ( unsigned long ) 0x0006 )
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105 #define serU0VIC_CHANNEL_BIT ( ( unsigned long ) 0x0040 )
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106 #define serU0VIC_ENABLE ( ( unsigned long ) 0x0020 )
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107 #define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
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109 /* Constants to determine the ISR source. */
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110 #define serSOURCE_THRE ( ( unsigned char ) 0x02 )
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111 #define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
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112 #define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
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113 #define serSOURCE_RX ( ( unsigned char ) 0x04 )
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114 #define serINTERRUPT_SOURCE_MASK ( ( unsigned char ) 0x0f )
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117 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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118 #define serHANDLE ( ( xComPortHandle ) 1 )
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119 #define serNO_BLOCK ( ( portTickType ) 0 )
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121 /*-----------------------------------------------------------*/
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123 /* Queues used to hold received characters, and characters waiting to be
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125 static xQueueHandle xRxedChars;
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126 static xQueueHandle xCharsForTx;
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127 static volatile long lTHREEmpty = pdFALSE;
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129 /*-----------------------------------------------------------*/
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131 /* The ISR. Note that this is called by a wrapper written in the file
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132 SerialISR.s79. See the WEB documentation for this port for further
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134 __arm void vSerialISR( void );
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136 /*-----------------------------------------------------------*/
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138 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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140 unsigned long ulDivisor, ulWantedClock;
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141 xComPortHandle xReturn = serHANDLE;
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142 extern void ( vSerialISREntry) ( void );
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144 /* Create the queues used to hold Rx and Tx characters. */
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145 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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146 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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148 /* Initialise the THRE empty flag. */
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149 lTHREEmpty = pdTRUE;
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152 ( xRxedChars != serINVALID_QUEUE ) &&
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153 ( xCharsForTx != serINVALID_QUEUE ) &&
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154 ( ulWantedBaud != ( unsigned long ) 0 )
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157 portENTER_CRITICAL();
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159 /* Setup the baud rate: Calculate the divisor value. */
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160 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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161 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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163 /* Set the DLAB bit so we can access the divisor. */
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166 /* Setup the divisor. */
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167 U0DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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169 U0DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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171 /* Turn on the FIFO's and clear the buffers. */
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172 U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
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174 /* Setup transmission format. */
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175 U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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177 /* Setup the VIC for the UART. */
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178 VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
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179 VICIntEnable |= serU0VIC_CHANNEL_BIT;
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180 VICVectAddr1 = ( unsigned long ) vSerialISREntry;
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181 VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
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183 /* Enable UART0 interrupts. */
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184 U0IER |= serENABLE_INTERRUPTS;
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186 portEXIT_CRITICAL();
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188 xReturn = ( xComPortHandle ) 1;
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192 xReturn = ( xComPortHandle ) 0;
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197 /*-----------------------------------------------------------*/
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199 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
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201 /* The port handle is not required as this driver only supports UART0. */
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204 /* Get the next character from the buffer. Return false if no characters
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205 are available, or arrive before xBlockTime expires. */
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206 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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215 /*-----------------------------------------------------------*/
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217 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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219 signed char *pxNext;
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221 /* NOTE: This implementation does not handle the queue being full as no
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222 block time is used! */
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224 /* The port handle is not required as this driver only supports UART0. */
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226 ( void ) usStringLength;
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228 /* Send each character in the string, one at a time. */
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229 pxNext = ( signed char * ) pcString;
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232 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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236 /*-----------------------------------------------------------*/
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238 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
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240 signed portBASE_TYPE xReturn;
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242 /* The port handle is not required as this driver only supports UART0. */
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245 portENTER_CRITICAL();
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247 /* Is there space to write directly to the UART? */
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248 if( lTHREEmpty == ( long ) pdTRUE )
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250 /* We wrote the character directly to the UART, so was
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252 lTHREEmpty = pdFALSE;
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258 /* We cannot write directly to the UART, so queue the character.
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259 Block for a maximum of xBlockTime if there is no space in the
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260 queue. It is ok to block within a critical section as each
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261 task has it's own critical section management. */
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262 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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264 /* Depending on queue sizing and task prioritisation: While we
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265 were blocked waiting to post interrupts were not disabled. It is
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266 possible that the serial ISR has emptied the Tx queue, in which
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267 case we need to start the Tx off again. */
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268 if( lTHREEmpty == ( long ) pdTRUE )
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270 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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271 lTHREEmpty = pdFALSE;
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276 portEXIT_CRITICAL();
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280 /*-----------------------------------------------------------*/
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282 __arm void vSerialISR( void )
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285 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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287 /* What caused the interrupt? */
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288 switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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290 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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294 case serSOURCE_THRE : /* The THRE is empty. If there is another
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295 character in the Tx queue, send it now. */
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296 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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302 /* There are no further characters
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303 queued to send so we can indicate
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304 that the THRE is available. */
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305 lTHREEmpty = pdTRUE;
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309 case serSOURCE_RX_TIMEOUT :
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310 case serSOURCE_RX : /* A character was received. Place it in
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311 the queue of received characters. */
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313 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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316 default : /* There is nothing to do, leave the ISR. */
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320 /* Exit the ISR. If a task was woken by either a character being received
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321 or transmitted then a context switch will occur. */
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322 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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324 /* Clear the ISR in the VIC. */
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325 VICVectAddr = serCLEAR_VIC_INTERRUPT;
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327 /*-----------------------------------------------------------*/
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