git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/ARM7_LPC2129_IAR/serial/serial.c

   1 /*\r
   2     FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   5 \r
   6     ***************************************************************************\r
   7      *                                                                       *\r
   8      *    FreeRTOS provides completely free yet professionally developed,    *\r
   9      *    robust, strictly quality controlled, supported, and cross          *\r
  10      *    platform software that has become a de facto standard.             *\r
  11      *                                                                       *\r
  12      *    Help yourself get started quickly and support the FreeRTOS         *\r
  13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  15      *                                                                       *\r
  16      *    Thank you!                                                         *\r
  17      *                                                                       *\r
  18     ***************************************************************************\r
  19 \r
  20     This file is part of the FreeRTOS distribution.\r
  21 \r
  22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  23     the terms of the GNU General Public License (version 2) as published by the\r
  24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  25 \r
  26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
  27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
  28     >>! the source code for proprietary components outside of the FreeRTOS\r
  29     >>! kernel.\r
  30 \r
  31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  34     link: http://www.freertos.org/a00114.html\r
  35 \r
  36     1 tab == 4 spaces!\r
  37 \r
  38     ***************************************************************************\r
  39      *                                                                       *\r
  40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  41      *    not run, what could be wrong?"                                     *\r
  42      *                                                                       *\r
  43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  44      *                                                                       *\r
  45     ***************************************************************************\r
  46 \r
  47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  48     license and Real Time Engineers Ltd. contact details.\r
  49 \r
  50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  51     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  52     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  53 \r
  54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  56     licenses offer ticketed support, indemnification and middleware.\r
  57 \r
  58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  59     engineered and independently SIL3 certified version for use in safety and\r
  60     mission critical applications that require provable dependability.\r
  61 \r
  62     1 tab == 4 spaces!\r
  63 */\r
  64 \r
  65 \r
  66 /*\r
  67         BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
  68 */\r
  69 \r
  70 /* Standard includes. */\r
  71 #include <stdlib.h>\r
  72 \r
  73 /* Scheduler includes. */\r
  74 #include "FreeRTOS.h"\r
  75 #include "queue.h"\r
  76 #include "task.h"\r
  77 \r
  78 /* Demo application includes. */\r
  79 #include "serial.h"\r
  80 \r
  81 /*-----------------------------------------------------------*/\r
  82 \r
  83 /* Constants to setup and access the UART. */\r
  84 #define serDLAB                                                 ( ( unsigned char ) 0x80 )\r
  85 #define serENABLE_INTERRUPTS                    ( ( unsigned char ) 0x03 )\r
  86 #define serNO_PARITY                                    ( ( unsigned char ) 0x00 )\r
  87 #define ser1_STOP_BIT                                   ( ( unsigned char ) 0x00 )\r
  88 #define ser8_BIT_CHARS                                  ( ( unsigned char ) 0x03 )\r
  89 #define serFIFO_ON                                              ( ( unsigned char ) 0x01 )\r
  90 #define serCLEAR_FIFO                                   ( ( unsigned char ) 0x06 )\r
  91 #define serWANTED_CLOCK_SCALING                 ( ( unsigned long ) 16 )\r
  92 \r
  93 /* Constants to setup and access the VIC. */\r
  94 #define serU0VIC_CHANNEL                                ( ( unsigned long ) 0x0006 )\r
  95 #define serU0VIC_CHANNEL_BIT                    ( ( unsigned long ) 0x0040 )\r
  96 #define serU0VIC_ENABLE                                 ( ( unsigned long ) 0x0020 )\r
  97 #define serCLEAR_VIC_INTERRUPT                  ( ( unsigned long ) 0 )\r
  98 \r
  99 /* Constants to determine the ISR source. */\r
 100 #define serSOURCE_THRE                                  ( ( unsigned char ) 0x02 )\r
 101 #define serSOURCE_RX_TIMEOUT                    ( ( unsigned char ) 0x0c )\r
 102 #define serSOURCE_ERROR                                 ( ( unsigned char ) 0x06 )\r
 103 #define serSOURCE_RX                                    ( ( unsigned char ) 0x04 )\r
 104 #define serINTERRUPT_SOURCE_MASK                ( ( unsigned char ) 0x0f )\r
 105 \r
 106 /* Misc. */\r
 107 #define serINVALID_QUEUE                                ( ( xQueueHandle ) 0 )\r
 108 #define serHANDLE                                               ( ( xComPortHandle ) 1 )\r
 109 #define serNO_BLOCK                                             ( ( portTickType ) 0 )\r
 110 \r
 111 /*-----------------------------------------------------------*/\r
 112 \r
 113 /* Queues used to hold received characters, and characters waiting to be\r
 114 transmitted. */\r
 115 static xQueueHandle xRxedChars;\r
 116 static xQueueHandle xCharsForTx;\r
 117 static volatile long lTHREEmpty = pdFALSE;\r
 118 \r
 119 /*-----------------------------------------------------------*/\r
 120 \r
 121 /* The ISR.  Note that this is called by a wrapper written in the file\r
 122 SerialISR.s79.  See the WEB documentation for this port for further\r
 123 information. */\r
 124 __arm void vSerialISR( void );\r
 125 \r
 126 /*-----------------------------------------------------------*/\r
 127 \r
 128 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
 129 {\r
 130 unsigned long ulDivisor, ulWantedClock;\r
 131 xComPortHandle xReturn = serHANDLE;\r
 132 extern void ( vSerialISREntry) ( void );\r
 133 \r
 134         /* Create the queues used to hold Rx and Tx characters. */\r
 135         xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
 136         xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
 137 \r
 138         /* Initialise the THRE empty flag. */\r
 139         lTHREEmpty = pdTRUE;\r
 140 \r
 141         if(\r
 142                 ( xRxedChars != serINVALID_QUEUE ) &&\r
 143                 ( xCharsForTx != serINVALID_QUEUE ) &&\r
 144                 ( ulWantedBaud != ( unsigned long ) 0 )\r
 145           )\r
 146         {\r
 147                 portENTER_CRITICAL();\r
 148                 {\r
 149                         /* Setup the baud rate:  Calculate the divisor value. */\r
 150                         ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;\r
 151                         ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;\r
 152 \r
 153                         /* Set the DLAB bit so we can access the divisor. */\r
 154                         U0LCR |= serDLAB;\r
 155 \r
 156                         /* Setup the divisor. */\r
 157                         U0DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );\r
 158                         ulDivisor >>= 8;\r
 159                         U0DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );\r
 160 \r
 161                         /* Turn on the FIFO's and clear the buffers. */\r
 162                         U0FCR = ( serFIFO_ON | serCLEAR_FIFO );\r
 163 \r
 164                         /* Setup transmission format. */\r
 165                         U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;\r
 166 \r
 167                         /* Setup the VIC for the UART. */\r
 168                         VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );\r
 169                         VICIntEnable |= serU0VIC_CHANNEL_BIT;\r
 170                         VICVectAddr1 = ( unsigned long ) vSerialISREntry;\r
 171                         VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;\r
 172 \r
 173                         /* Enable UART0 interrupts. */\r
 174                         U0IER |= serENABLE_INTERRUPTS;\r
 175                 }\r
 176                 portEXIT_CRITICAL();\r
 177 \r
 178                 xReturn = ( xComPortHandle ) 1;\r
 179         }\r
 180         else\r
 181         {\r
 182                 xReturn = ( xComPortHandle ) 0;\r
 183         }\r
 184 \r
 185         return xReturn;\r
 186 }\r
 187 /*-----------------------------------------------------------*/\r
 188 \r
 189 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )\r
 190 {\r
 191         /* The port handle is not required as this driver only supports UART0. */\r
 192         ( void ) pxPort;\r
 193 \r
 194         /* Get the next character from the buffer.  Return false if no characters\r
 195         are available, or arrive before xBlockTime expires. */\r
 196         if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
 197         {\r
 198                 return pdTRUE;\r
 199         }\r
 200         else\r
 201         {\r
 202                 return pdFALSE;\r
 203         }\r
 204 }\r
 205 /*-----------------------------------------------------------*/\r
 206 \r
 207 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
 208 {\r
 209 signed char *pxNext;\r
 210 \r
 211         /* NOTE: This implementation does not handle the queue being full as no\r
 212         block time is used! */\r
 213 \r
 214         /* The port handle is not required as this driver only supports UART0. */\r
 215         ( void ) pxPort;\r
 216         ( void ) usStringLength;\r
 217 \r
 218         /* Send each character in the string, one at a time. */\r
 219         pxNext = ( signed char * ) pcString;\r
 220         while( *pxNext )\r
 221         {\r
 222                 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
 223                 pxNext++;\r
 224         }\r
 225 }\r
 226 /*-----------------------------------------------------------*/\r
 227 \r
 228 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )\r
 229 {\r
 230 signed portBASE_TYPE xReturn;\r
 231 \r
 232         /* The port handle is not required as this driver only supports UART0. */\r
 233         ( void ) pxPort;\r
 234 \r
 235         portENTER_CRITICAL();\r
 236         {\r
 237                 /* Is there space to write directly to the UART? */\r
 238                 if( lTHREEmpty == ( long ) pdTRUE )\r
 239                 {\r
 240                         /* We wrote the character directly to the UART, so was\r
 241                         successful. */\r
 242                         lTHREEmpty = pdFALSE;\r
 243                         U0THR = cOutChar;\r
 244                         xReturn = pdPASS;\r
 245                 }\r
 246                 else\r
 247                 {\r
 248                         /* We cannot write directly to the UART, so queue the character.\r
 249                         Block for a maximum of xBlockTime if there is no space in the\r
 250                         queue.  It is ok to block within a critical section as each\r
 251                         task has it's own critical section management. */\r
 252                         xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );\r
 253 \r
 254                         /* Depending on queue sizing and task prioritisation:  While we\r
 255                         were blocked waiting to post interrupts were not disabled.  It is\r
 256                         possible that the serial ISR has emptied the Tx queue, in which\r
 257                         case we need to start the Tx off again. */\r
 258                         if( lTHREEmpty == ( long ) pdTRUE )\r
 259                         {\r
 260                                 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );\r
 261                                 lTHREEmpty = pdFALSE;\r
 262                                 U0THR = cOutChar;\r
 263                         }\r
 264                 }\r
 265         }\r
 266         portEXIT_CRITICAL();\r
 267 \r
 268         return xReturn;\r
 269 }\r
 270 /*-----------------------------------------------------------*/\r
 271 \r
 272 __arm void vSerialISR( void )\r
 273 {\r
 274 signed char cChar;\r
 275 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
 276 \r
 277         /* What caused the interrupt? */\r
 278         switch( U0IIR & serINTERRUPT_SOURCE_MASK )\r
 279         {\r
 280                 case serSOURCE_ERROR :  /* Not handling this, but clear the interrupt. */\r
 281                                                                 cChar = U0LSR;\r
 282                                                                 break;\r
 283 \r
 284                 case serSOURCE_THRE     :       /* The THRE is empty.  If there is another\r
 285                                                                 character in the Tx queue, send it now. */\r
 286                                                                 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
 287                                                                 {\r
 288                                                                         U0THR = cChar;\r
 289                                                                 }\r
 290                                                                 else\r
 291                                                                 {\r
 292                                                                         /* There are no further characters\r
 293                                                                         queued to send so we can indicate\r
 294                                                                         that the THRE is available. */\r
 295                                                                         lTHREEmpty = pdTRUE;\r
 296                                                                 }\r
 297                                                                 break;\r
 298 \r
 299                 case serSOURCE_RX_TIMEOUT :\r
 300                 case serSOURCE_RX       :       /* A character was received.  Place it in\r
 301                                                                 the queue of received characters. */\r
 302                                                                 cChar = U0RBR;\r
 303                                                                 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
 304                                                                 break;\r
 305 \r
 306                 default                         :       /* There is nothing to do, leave the ISR. */\r
 307                                                                 break;\r
 308         }\r
 309 \r
 310         /* Exit the ISR.  If a task was woken by either a character being received\r
 311         or transmitted then a context switch will occur. */\r
 312         portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
 313 \r
 314         /* Clear the ISR in the VIC. */\r
 315         VICVectAddr = serCLEAR_VIC_INTERRUPT;\r
 316 }\r
 317 /*-----------------------------------------------------------*/\r