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32 /*****************************************************************************/
36 * @addtogroup a53_64_mmu_apis Cortex A53 64bit Processor MMU Handling
38 * MMU function equip users to modify default memory attributes of MMU table as
44 * MODIFICATION HISTORY:
46 * Ver Who Date Changes
47 * ----- ---- -------- ---------------------------------------------------
48 * 5.00 pkp 05/29/14 First release
55 ******************************************************************************/
62 #endif /* __cplusplus */
64 /***************************** Include Files *********************************/
66 #include "xil_types.h"
68 /***************** Macros (Inline Functions) Definitions *********************/
70 /**************************** Type Definitions *******************************/
72 /************************** Constant Definitions *****************************/
75 #define NORM_NONCACHE 0x401UL /* Normal Non-cacheable*/
76 #define STRONG_ORDERED 0x409UL /* Strongly ordered (Device-nGnRnE)*/
77 #define DEVICE_MEMORY 0x40DUL /* Device memory (Device-nGnRE)*/
78 #define RESERVED 0x0UL /* reserved memory*/
80 /* Normal write-through cacheable inner shareable*/
81 #define NORM_WT_CACHE 0x711UL
83 /* Normal write back cacheable inner-shareable */
84 #define NORM_WB_CACHE 0x705UL
87 * shareability attribute only applicable to
88 * normal cacheable memory
90 #define INNER_SHAREABLE (0x3 << 8)
91 #define OUTER_SHAREABLE (0x2 << 8)
92 #define NON_SHAREABLE (~(0x3 << 8))
95 #define EXECUTE_NEVER ((0x1 << 53) | (0x1 << 54))
98 #define NON_SECURE (0x1 << 5)
100 /************************** Variable Definitions *****************************/
102 /************************** Function Prototypes ******************************/
104 void Xil_SetTlbAttributes(UINTPTR Addr, u64 attrib);
108 #endif /* __cplusplus */
110 #endif /* XIL_MMU_H */
112 * @} End of "addtogroup a53_64_mmu_apis".