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   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
  17 * (b) that interact with a Xilinx device through a bus or interconnect.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22 * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25 * SOFTWARE.
  26 *
  27 * Except as contained in this notice, the name of the Xilinx shall not be used
  28 * in advertising or otherwise to promote the sale, use or other dealings in
  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************/
  32 /****************************************************************************/
  33 /**
  34 *
  35 * @file xusbpsu.h
  36 * @addtogroup usbpsu_v1_0
  37 * @{
  38 * @details
  39 *
  40 * <pre>
  41 *
  42 * MODIFICATION HISTORY:
  43 *
  44 * Ver   Who    Date     Changes
  45 * ----- -----  -------- -----------------------------------------------------
  46 * 1.0   sg    06/06/16 First release
  47 * 1.1   sg    10/24/16 Update for backward compatability
  48 *                      Added XUsbPsu_IsSuperSpeed function in xusbpsu.c
  49 *
  50 * </pre>
  51 *
  52 *****************************************************************************/
  53 #ifndef XUSBPSU_H  /* Prevent circular inclusions */
  54 #define XUSBPSU_H  /* by using protection macros  */
  55
  56 #ifdef __cplusplus
  57 extern "C" {
  58 #endif
  59
  60 /***************************** Include Files ********************************/
  61 #include "xparameters.h"
  62 #include "xil_types.h"
  63 #include "xil_assert.h"
  64 #include "xstatus.h"
  65 #include "xusbpsu_hw.h"
  66 #include "xil_io.h"
  67 /*
  68  * The header sleep.h and API usleep() can only be used with an arm design.
  69  * MB_Sleep() is used for microblaze design.
  70  */
  71 #if defined (__arm__) || defined (__aarch64__)
  72 #include "sleep.h"
  73 #endif
  74
  75 #ifdef __MICROBLAZE__
  76 #include "microblaze_sleep.h"
  77 #endif
  78 #include "xil_cache.h"
  79
  80 /************************** Constant Definitions ****************************/
  81
  82 #define ALIGNMENT_CACHELINE             __attribute__ ((aligned(64)))
  83
  84 #define XUSBPSU_PHY_TIMEOUT             5000U /* in micro seconds */
  85
  86 #define XUSBPSU_EP_DIR_IN                               1U
  87 #define XUSBPSU_EP_DIR_OUT                              0U
  88
  89 #define XUSBPSU_ENDPOINT_NUMBER_MASK        0x0f    /* in bEndpointAddress */
  90 #define XUSBPSU_ENDPOINT_DIR_MASK           0x80
  91
  92 #define XUSBPSU_ENDPOINT_XFERTYPE_MASK      0x03    /* in bmAttributes */
  93 #define XUSBPSU_ENDPOINT_XFER_CONTROL       0U
  94 #define XUSBPSU_ENDPOINT_XFER_ISOC          1U
  95 #define XUSBPSU_ENDPOINT_XFER_BULK          2U
  96 #define XUSBPSU_ENDPOINT_XFER_INT           3U
  97 #define XUSBPSU_ENDPOINT_MAX_ADJUSTABLE     0x80
  98
  99 #define XUSBPSU_TEST_J                                                  1U
 100 #define XUSBPSU_TEST_K                                                  2U
 101 #define XUSBPSU_TEST_SE0_NAK                                    3U
 102 #define XUSBPSU_TEST_PACKET                                             4U
 103 #define XUSBPSU_TEST_FORCE_ENABLE                               5U
 104
 105 #define XUSBPSU_NUM_TRBS                                8
 106
 107 #define XUSBPSU_EVENT_PENDING           (0x00000001U << 0)
 108
 109 #define XUSBPSU_EP_ENABLED                      (0x00000001U << 0)
 110 #define XUSBPSU_EP_STALL                        (0x00000001U << 1)
 111 #define XUSBPSU_EP_WEDGE                        (0x00000001U << 2)
 112 #define XUSBPSU_EP_BUSY                         ((u32)0x00000001U << 4)
 113 #define XUSBPSU_EP_PENDING_REQUEST      (0x00000001U << 5)
 114 #define XUSBPSU_EP_MISSED_ISOC          (0x00000001U << 6)
 115
 116 #define XUSBPSU_GHWPARAMS0                              0U
 117 #define XUSBPSU_GHWPARAMS1                              1U
 118 #define XUSBPSU_GHWPARAMS2                              2U
 119 #define XUSBPSU_GHWPARAMS3                              3U
 120 #define XUSBPSU_GHWPARAMS4                              4U
 121 #define XUSBPSU_GHWPARAMS5                              5U
 122 #define XUSBPSU_GHWPARAMS6                              6U
 123 #define XUSBPSU_GHWPARAMS7                              7U
 124
 125 /* HWPARAMS0 */
 126 #define XUSBPSU_MODE(n)                                 ((n) & 0x7)
 127 #define XUSBPSU_MDWIDTH(n)                              (((n) & 0xff00) >> 8)
 128
 129 /* HWPARAMS1 */
 130 #define XUSBPSU_NUM_INT(n)                              (((n) & (0x3f << 15)) >> 15)
 131
 132 /* HWPARAMS3 */
 133 #define XUSBPSU_NUM_IN_EPS_MASK         ((u32)0x0000001fU << (u32)18)
 134 #define XUSBPSU_NUM_EPS_MASK            ((u32)0x0000003fU << (u32)12)
 135 #define XUSBPSU_NUM_EPS(p)                      (((u32)(p) &            \
 136                                                                         (XUSBPSU_NUM_EPS_MASK)) >> (u32)12)
 137 #define XUSBPSU_NUM_IN_EPS(p)           (((u32)(p) &            \
 138                                                                         (XUSBPSU_NUM_IN_EPS_MASK)) >> (u32)18)
 139
 140 /* HWPARAMS7 */
 141 #define XUSBPSU_RAM1_DEPTH(n)                   ((n) & 0xffff)
 142
 143 #define XUSBPSU_DEPEVT_XFERCOMPLETE             0x01U
 144 #define XUSBPSU_DEPEVT_XFERINPROGRESS   0x02U
 145 #define XUSBPSU_DEPEVT_XFERNOTREADY             0x03U
 146 #define XUSBPSU_DEPEVT_STREAMEVT                0x06U
 147 #define XUSBPSU_DEPEVT_EPCMDCMPLT               0x07U
 148
 149 /* Within XferNotReady */
 150 #define DEPEVT_STATUS_TRANSFER_ACTIVE   (1 << 3)
 151
 152 /* Within XferComplete */
 153 #define DEPEVT_STATUS_BUSERR                    (1 << 0)
 154 #define DEPEVT_STATUS_SHORT                             (1 << 1)
 155 #define DEPEVT_STATUS_IOC                               (1 << 2)
 156 #define DEPEVT_STATUS_LST                               (1 << 3)
 157
 158 /* Stream event only */
 159 #define DEPEVT_STREAMEVT_FOUND          1U
 160 #define DEPEVT_STREAMEVT_NOTFOUND       2U
 161
 162 /* Control-only Status */
 163 #define DEPEVT_STATUS_CONTROL_DATA                              1U
 164 #define DEPEVT_STATUS_CONTROL_STATUS                    2U
 165 #define DEPEVT_STATUS_CONTROL_DATA_INVALTRB             9
 166 #define DEPEVT_STATUS_CONTROL_STATUS_INVALTRB   0xA
 167
 168 #define XUSBPSU_ENDPOINTS_NUM                   12U
 169
 170 #define XUSBPSU_EVENT_SIZE                              4U       /* bytes */
 171 #define XUSBPSU_EVENT_MAX_NUM                   64U      /* 2 events/endpoint */
 172 #define XUSBPSU_EVENT_BUFFERS_SIZE              (XUSBPSU_EVENT_SIZE * \
 173                                                                                 XUSBPSU_EVENT_MAX_NUM)
 174
 175 #define XUSBPSU_EVENT_TYPE_MASK                 0x000000feU
 176
 177 #define XUSBPSU_EVENT_TYPE_DEV                  0U
 178 #define XUSBPSU_EVENT_TYPE_CARKIT               3U
 179 #define XUSBPSU_EVENT_TYPE_I2C                  4U
 180
 181 #define XUSBPSU_DEVICE_EVENT_DISCONNECT         0U
 182 #define XUSBPSU_DEVICE_EVENT_RESET              1U
 183 #define XUSBPSU_DEVICE_EVENT_CONNECT_DONE       2U
 184 #define XUSBPSU_DEVICE_EVENT_LINK_STATUS_CHANGE 3U
 185 #define XUSBPSU_DEVICE_EVENT_WAKEUP             4U
 186 #define XUSBPSU_DEVICE_EVENT_HIBER_REQ          5U
 187 #define XUSBPSU_DEVICE_EVENT_EOPF               6U
 188 #define XUSBPSU_DEVICE_EVENT_SOF                7U
 189 #define XUSBPSU_DEVICE_EVENT_ERRATIC_ERROR      9U
 190 #define XUSBPSU_DEVICE_EVENT_CMD_CMPL           10U
 191 #define XUSBPSU_DEVICE_EVENT_OVERFLOW           11U
 192
 193 #define XUSBPSU_GEVNTCOUNT_MASK                 0x0000fffcU
 194
 195 /*
 196  * Control Endpoint state
 197  */
 198 #define XUSBPSU_EP0_SETUP_PHASE                         1U      /**< Setup Phase */
 199 #define XUSBPSU_EP0_DATA_PHASE                          2U      /**< Data Phase */
 200 #define XUSBPSU_EP0_STATUS_PHASE                        3U      /**< Status Pahse */
 201
 202 /*
 203  * Link State
 204  */
 205 #define         XUSBPSU_LINK_STATE_MASK                 0x0FU
 206
 207 typedef enum {
 208         XUSBPSU_LINK_STATE_U0 = 0x00U, /**< in HS - ON */
 209         XUSBPSU_LINK_STATE_U1 = 0x01U,
 210         XUSBPSU_LINK_STATE_U2 = 0x02U, /**< in HS - SLEEP */
 211         XUSBPSU_LINK_STATE_U3 = 0x03U, /**< in HS - SUSPEND */
 212         XUSBPSU_LINK_STATE_SS_DIS =     0x04U,
 213         XUSBPSU_LINK_STATE_RX_DET =     0x05U,
 214         XUSBPSU_LINK_STATE_SS_INACT = 0x06U,
 215         XUSBPSU_LINK_STATE_POLL =       0x07U,
 216         XUSBPSU_LINK_STATE_RECOV =      0x08U,
 217         XUSBPSU_LINK_STATE_HRESET =     0x09U,
 218         XUSBPSU_LINK_STATE_CMPLY =      0x0AU,
 219         XUSBPSU_LINK_STATE_LPBK =       0x0BU,
 220         XUSBPSU_LINK_STATE_RESET =      0x0EU,
 221         XUSBPSU_LINK_STATE_RESUME =     0x0FU,
 222 }XusbPsuLinkState;
 223
 224 typedef enum {
 225         XUSBPSU_LINK_STATE_CHANGE_U0 = 0x00U, /**< in HS - ON */
 226         XUSBPSU_LINK_STATE_CHANGE_SS_DIS =      0x04U,
 227         XUSBPSU_LINK_STATE_CHANGE_RX_DET =      0x05U,
 228         XUSBPSU_LINK_STATE_CHANGE_SS_INACT = 0x06U,
 229         XUSBPSU_LINK_STATE_CHANGE_RECOV =       0x08U,
 230         XUSBPSU_LINK_STATE_CHANGE_CMPLY =       0x0AU,
 231 }XusbPsuLinkStateChange;
 232
 233 /*
 234  * Device States
 235  */
 236 #define         XUSBPSU_STATE_ATTACHED                  0U
 237 #define         XUSBPSU_STATE_POWERED                   1U
 238 #define         XUSBPSU_STATE_DEFAULT                   2U
 239 #define         XUSBPSU_STATE_ADDRESS                   3U
 240 #define         XUSBPSU_STATE_CONFIGURED                4U
 241 #define         XUSBPSU_STATE_SUSPENDED                 5U
 242
 243 /*
 244  * Device Speeds
 245  */
 246 #define         XUSBPSU_SPEED_UNKNOWN                   0U
 247 #define         XUSBPSU_SPEED_LOW                               1U
 248 #define         XUSBPSU_SPEED_FULL                              2U
 249 #define         XUSBPSU_SPEED_HIGH                              3U
 250 #define         XUSBPSU_SPEED_SUPER                             4U
 251
 252
 253
 254 /**************************** Type Definitions ******************************/
 255
 256 /**
 257  * This typedef contains configuration information for the XUSBPSU
 258  * device.
 259  */
 260 typedef struct {
 261         u16 DeviceId;           /**< Unique ID of controller */
 262         u32 BaseAddress;        /**< Core register base address */
 263 } XUsbPsu_Config;
 264
 265 /**
 266  * Software Event buffer representation
 267  */
 268 struct XUsbPsu_EvtBuffer {
 269         void    *BuffAddr;
 270         u32             Offset;
 271         u32             Count;
 272         u32             Flags;
 273 };
 274
 275 /**
 276  * Transfer Request Block - Hardware format
 277  */
 278 struct XUsbPsu_Trb {
 279         u32             BufferPtrLow;
 280         u32             BufferPtrHigh;
 281         u32             Size;
 282         u32             Ctrl;
 283 } __attribute__((packed));
 284
 285
 286 /*
 287  * Endpoint Parameters
 288  */
 289 struct XUsbPsu_EpParams {
 290         u32     Param2;         /**< Parameter 2 */
 291         u32     Param1;         /**< Parameter 1 */
 292         u32     Param0;         /**< Parameter 0 */
 293 };
 294
 295 /**
 296  * USB Standard Control Request
 297  */
 298 typedef struct {
 299         u8  bRequestType;
 300         u8  bRequest;
 301         u16 wValue;
 302         u16 wIndex;
 303         u16 wLength;
 304 } __attribute__ ((packed)) SetupPacket;
 305
 306 /**
 307  * Endpoint representation
 308  */
 309 struct XUsbPsu_Ep {
 310         void (*Handler)(void *, u32, u32);
 311                                                 /** < User handler called
 312                                                  *   when data is sent for IN Ep
 313                                                  *   and received for OUT Ep
 314                                                  */
 315         struct XUsbPsu_Trb      EpTrb ALIGNMENT_CACHELINE;/**< TRB used by endpoint */
 316         u32     EpStatus;               /**< Flags to represent Endpoint status */
 317         u32     RequestedBytes; /**< RequestedBytes for transfer */
 318         u32     BytesTxed;              /**< Actual Bytes transferred */
 319         u16     MaxSize;                /**< Size of endpoint */
 320         u8      *BufferPtr;             /**< Buffer location */
 321         u8      ResourceIndex;  /**< Resource Index assigned to
 322                                                  *  Endpoint by core
 323                                                  */
 324         u8      PhyEpNum;               /**< Physical Endpoint Number in core */
 325         u8      UsbEpNum;               /**< USB Endpoint Number */
 326         u8      Type;                   /**< Type of Endpoint -
 327                                                  *       Control/BULK/INTERRUPT/ISOC
 328                                                  */
 329         u8      Direction;              /**< Direction - EP_DIR_OUT/EP_DIR_IN */
 330         u8      UnalignedTx;
 331 };
 332
 333 /**
 334  * USB Device Controller representation
 335  */
 336 struct XUsbPsu {
 337         SetupPacket SetupData ALIGNMENT_CACHELINE;
 338                                         /**< Setup Packet buffer */
 339         struct XUsbPsu_Trb Ep0_Trb ALIGNMENT_CACHELINE;
 340                                         /**< TRB for control transfers */
 341         XUsbPsu_Config *ConfigPtr;      /**< Configuration info pointer */
 342         struct XUsbPsu_Ep eps[XUSBPSU_ENDPOINTS_NUM]; /**< Endpoints */
 343         struct XUsbPsu_EvtBuffer Evt;
 344         struct XUsbPsu_EpParams EpParams;
 345         u32 BaseAddress;        /**< Core register base address */
 346         u32 DevDescSize;
 347         u32 ConfigDescSize;
 348         void (*Chapter9)(struct XUsbPsu *, SetupPacket *);
 349         void (*ClassHandler)(struct XUsbPsu *, SetupPacket *);
 350         void *DevDesc;
 351         void *ConfigDesc;
 352         u8 EventBuffer[XUSBPSU_EVENT_BUFFERS_SIZE]
 353                                                 __attribute__((aligned(XUSBPSU_EVENT_BUFFERS_SIZE)));
 354         u8 NumOutEps;
 355         u8 NumInEps;
 356         u8 ControlDir;
 357         u8 IsInTestMode;
 358         u8 TestMode;
 359         u8 Speed;
 360         u8 State;
 361         u8 Ep0State;
 362         u8 LinkState;
 363         u8 UnalignedTx;
 364         u8 IsConfigDone;
 365         u8 IsThreeStage;
 366 };
 367
 368 struct XUsbPsu_Event_Type {
 369         u32     Is_DevEvt:1;
 370         u32     Type:7;
 371         u32     Reserved8_31:24;
 372 } __attribute__((packed));
 373
 374 /**
 375  * struct XUsbPsu_event_depvt - Device Endpoint Events
 376  * @Is_EpEvt: indicates this is an endpoint event
 377  * @endpoint_number: number of the endpoint
 378  * @endpoint_event: The event we have:
 379  *      0x00    - Reserved
 380  *      0x01    - XferComplete
 381  *      0x02    - XferInProgress
 382  *      0x03    - XferNotReady
 383  *      0x04    - RxTxFifoEvt (IN->Underrun, OUT->Overrun)
 384  *      0x05    - Reserved
 385  *      0x06    - StreamEvt
 386  *      0x07    - EPCmdCmplt
 387  * @Reserved11_10: Reserved, don't use.
 388  * @Status: Indicates the status of the event. Refer to databook for
 389  *      more information.
 390  * @Parameters: Parameters of the current event. Refer to databook for
 391  *      more information.
 392  */
 393 struct XUsbPsu_Event_Epevt {
 394         u32     Is_EpEvt:1;
 395         u32     Epnumber:5;
 396         u32     Endpoint_Event:4;
 397         u32     Reserved11_10:2;
 398         u32     Status:4;
 399         u32     Parameters:16;
 400 } __attribute__((packed));
 401
 402 /**
 403  * struct XUsbPsu_event_devt - Device Events
 404  * @Is_DevEvt: indicates this is a non-endpoint event
 405  * @Device_Event: indicates it's a device event. Should read as 0x00
 406  * @Type: indicates the type of device event.
 407  *      0       - DisconnEvt
 408  *      1       - USBRst
 409  *      2       - ConnectDone
 410  *      3       - ULStChng
 411  *      4       - WkUpEvt
 412  *      5       - Reserved
 413  *      6       - EOPF
 414  *      7       - SOF
 415  *      8       - Reserved
 416  *      9       - ErrticErr
 417  *      10      - CmdCmplt
 418  *      11      - EvntOverflow
 419  *      12      - VndrDevTstRcved
 420  * @Reserved15_12: Reserved, not used
 421  * @Event_Info: Information about this event
 422  * @Reserved31_25: Reserved, not used
 423  */
 424 struct XUsbPsu_Event_Devt {
 425         u32     Is_DevEvt:1;
 426         u32     Device_Event:7;
 427         u32     Type:4;
 428         u32     Reserved15_12:4;
 429         u32     Event_Info:9;
 430         u32     Reserved31_25:7;
 431 } __attribute__((packed));
 432
 433 /**
 434  * struct XUsbPsu_event_gevt - Other Core Events
 435  * @one_bit: indicates this is a non-endpoint event (not used)
 436  * @device_event: indicates it's (0x03) Carkit or (0x04) I2C event.
 437  * @phy_port_number: self-explanatory
 438  * @reserved31_12: Reserved, not used.
 439  */
 440 struct XUsbPsu_Event_Gevt {
 441         u32     Is_GlobalEvt:1;
 442         u32     Device_Event:7;
 443         u32     Phy_Port_Number:4;
 444         u32     Reserved31_12:20;
 445 } __attribute__((packed));
 446
 447 /**
 448  * union XUsbPsu_event - representation of Event Buffer contents
 449  * @raw: raw 32-bit event
 450  * @type: the type of the event
 451  * @depevt: Device Endpoint Event
 452  * @devt: Device Event
 453  * @gevt: Global Event
 454  */
 455 union XUsbPsu_Event {
 456         u32                             Raw;
 457         struct XUsbPsu_Event_Type       Type;
 458         struct XUsbPsu_Event_Epevt      Epevt;
 459         struct XUsbPsu_Event_Devt       Devt;
 460         struct XUsbPsu_Event_Gevt       Gevt;
 461 };
 462
 463 /***************** Macros (Inline Functions) Definitions *********************/
 464
 465 #define IS_ALIGNED(x, a)        (((x) & ((typeof(x))(a) - 1)) == 0U)
 466
 467 #define roundup(x, y) (                                 \
 468 {                                                       \
 469         const typeof(y) y__ = (y);                        \
 470         (((x) + (u32)(y__ - 1)) / (u32)y__) * (u32)y__;                \
 471 }                                                       \
 472 )
 473
 474 #define DECLARE_DEV_DESC(Instance, desc)                        \
 475         (Instance).DevDesc = &(desc);                                   \
 476         (Instance).DevDescSize = sizeof((desc))
 477
 478 #define DECLARE_CONFIG_DESC(Instance, desc)             \
 479         (Instance).ConfigDesc = &(desc);                                \
 480         (Instance).ConfigDescSize = sizeof((desc))
 481
 482 /************************** Function Prototypes ******************************/
 483
 484 /*
 485  * Functions in xusbpsu.c
 486  */
 487 s32 XUsbPsu_Wait_Clear_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
 488                                                                 u32 BitMask, u32 Timeout);
 489 s32 XUsbPsu_Wait_Set_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
 490                                                                 u32 BitMask, u32 Timeout);
 491 void XUsbPsu_SetMode(struct XUsbPsu *InstancePtr, u32 Mode);
 492 void XUsbPsu_PhyReset(struct XUsbPsu *InstancePtr);
 493 void XUsbPsu_EventBuffersSetup(struct XUsbPsu *InstancePtr);
 494 void XUsbPsu_EventBuffersReset(struct XUsbPsu *InstancePtr);
 495 void XUsbPsu_CoreNumEps(struct XUsbPsu *InstancePtr);
 496 void XUsbPsu_cache_hwparams(struct XUsbPsu *InstancePtr);
 497 u32 XUsbPsu_ReadHwParams(struct XUsbPsu *InstancePtr, u8 RegIndex);
 498 s32 XUsbPsu_CoreInit(struct XUsbPsu *InstancePtr);
 499 void XUsbPsu_EnableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
 500 void XUsbPsu_DisableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
 501 s32 XUsbPsu_CfgInitialize(struct XUsbPsu *InstancePtr,
 502                         XUsbPsu_Config *ConfigPtr, u32 BaseAddress);
 503 s32 XUsbPsu_Start(struct XUsbPsu *InstancePtr);
 504 s32 XUsbPsu_Stop(struct XUsbPsu *InstancePtr);
 505 s32 XUsbPsu_SetTestMode(struct XUsbPsu *InstancePtr, u32 Mode);
 506 XusbPsuLinkState XUsbPsu_GetLinkState(struct XUsbPsu *InstancePtr);
 507 s32 XUsbPsu_SetLinkState(struct XUsbPsu *InstancePtr,
 508                 XusbPsuLinkStateChange State);
 509 s32 XUsbPsu_SendGenericCmd(struct XUsbPsu *InstancePtr,
 510                                         s32 Cmd, u32 Param);
 511 void XUsbPsu_SetSpeed(struct XUsbPsu *InstancePtr, u32 Speed);
 512 s32 XUsbPsu_SetDeviceAddress(struct XUsbPsu *InstancePtr, u16 Addr);
 513 s32 XUsbPsu_IsSuperSpeed(struct XUsbPsu *InstancePtr);
 514 s32 XUsbPsu_SetU1SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep);
 515 s32 XUsbPsu_SetU2SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep);
 516 s32 XUsbPsu_AcceptU1U2Sleep(struct XUsbPsu *InstancePtr);
 517 s32 XUsbPsu_U1SleepEnable(struct XUsbPsu *InstancePtr);
 518 s32 XUsbPsu_U2SleepEnable(struct XUsbPsu *InstancePtr);
 519 s32 XUsbPsu_U1SleepDisable(struct XUsbPsu *InstancePtr);
 520 s32 XUsbPsu_U2SleepDisable(struct XUsbPsu *InstancePtr);
 521
 522 /*
 523  * Functions in xusbpsu_endpoint.c
 524  */
 525 struct XUsbPsu_EpParams *XUsbPsu_GetEpParams(struct XUsbPsu *InstancePtr);
 526 u32 XUsbPsu_EpGetTransferIndex(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
 527                                 u8 Dir);
 528 const char *XUsbPsu_EpCmdString(u8 Cmd);
 529 s32 XUsbPsu_SendEpCmd(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
 530                         u32 Cmd, struct XUsbPsu_EpParams *Params);
 531 s32 XUsbPsu_StartEpConfig(struct XUsbPsu *InstancePtr, u32 UsbEpNum,
 532                                 u8 Dir);
 533 s32 XUsbPsu_SetEpConfig(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
 534                                 u16 Size, u8 Type);
 535 s32 XUsbPsu_SetXferResource(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir);
 536 s32 XUsbPsu_EpEnable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
 537                         u16 Maxsize, u8 Type);
 538 s32 XUsbPsu_EpDisable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir);
 539 s32 XUsbPsu_EnableControlEp(struct XUsbPsu *InstancePtr, u16 Size);
 540 void XUsbPsu_InitializeEps(struct XUsbPsu *InstancePtr);
 541 void XUsbPsu_StopTransfer(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir);
 542 void XUsbPsu_ClearStalls(struct XUsbPsu *InstancePtr);
 543 s32 XUsbPsu_EpBufferSend(struct XUsbPsu *InstancePtr, u8 UsbEp,
 544                         u8 *BufferPtr, u32 BufferLen);
 545 s32 XUsbPsu_EpBufferRecv(struct XUsbPsu *InstancePtr, u8 UsbEp,
 546                                 u8 *BufferPtr, u32 Length);
 547 void XUsbPsu_EpSetStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
 548 void XUsbPsu_EpClearStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
 549 void XUsbPsu_SetEpHandler(struct XUsbPsu *InstancePtr, u8 Epnum,
 550                         u8 Dir, void (*Handler)(void *, u32, u32));
 551 s32 XUsbPsu_IsEpStalled(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
 552 void XUsbPsu_EpXferComplete(struct XUsbPsu *InstancePtr,
 553                                                         const struct XUsbPsu_Event_Epevt *Event);
 554
 555 /*
 556  * Functions in xusbpsu_controltransfers.c
 557  */
 558 s32 XUsbPsu_RecvSetup(struct XUsbPsu *InstancePtr);
 559 void XUsbPsu_Ep0StallRestart(struct XUsbPsu *InstancePtr);
 560 s32 XUsbPsu_SetConfiguration(struct XUsbPsu *InstancePtr,
 561                                 SetupPacket *Ctrl);
 562 void XUsbPsu_Ep0DataDone(struct XUsbPsu *InstancePtr,
 563                 const struct XUsbPsu_Event_Epevt *Event);
 564 void XUsbPsu_Ep0StatusDone(struct XUsbPsu *InstancePtr,
 565                 const struct XUsbPsu_Event_Epevt *Event);
 566 void XUsbPsu_Ep0XferComplete(struct XUsbPsu *InstancePtr,
 567                         const struct XUsbPsu_Event_Epevt *Event);
 568 s32 XUsbPsu_Ep0StartStatus(struct XUsbPsu *InstancePtr,
 569                                 const struct XUsbPsu_Event_Epevt *Event);
 570 void XUsbPsu_Ep0_EndControlData(struct XUsbPsu *InstancePtr,
 571                                         struct XUsbPsu_Ep *Ept);
 572 void XUsbPsu_Ep0XferNotReady(struct XUsbPsu *InstancePtr,
 573                 const struct XUsbPsu_Event_Epevt *Event);
 574 void XUsbPsu_Ep0Intr(struct XUsbPsu *InstancePtr,
 575                 const struct XUsbPsu_Event_Epevt *Event);
 576 s32 XUsbPsu_Ep0Send(struct XUsbPsu *InstancePtr, u8 *BufferPtr,
 577                         u32 BufferLen);
 578 s32 XUsbPsu_Ep0Recv(struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 Length);
 579 void XUsbSleep(u32 USeconds);
 580
 581 /*
 582  * Functions in xusbpsu_intr.c
 583  */
 584 void XUsbPsu_EpInterrupt(struct XUsbPsu *InstancePtr,
 585                 const struct XUsbPsu_Event_Epevt *Event);
 586 void XUsbPsu_DisconnectIntr(struct XUsbPsu *InstancePtr);
 587 void XUsbPsu_ResetIntr(struct XUsbPsu *InstancePtr);
 588 void XUsbPsu_ConnDoneIntr(struct XUsbPsu *InstancePtr);
 589 void XUsbPsu_LinkStsChangeIntr(struct XUsbPsu *InstancePtr,
 590                                 u32 EvtInfo);
 591 void XUsbPsu_DevInterrupt(struct XUsbPsu *InstancePtr,
 592                 const struct XUsbPsu_Event_Devt *Event);
 593 void XUsbPsu_EventHandler(struct XUsbPsu *InstancePtr,
 594                 const union XUsbPsu_Event *Event);
 595 void XUsbPsu_EventBufferHandler(struct XUsbPsu *InstancePtr);
 596 void XUsbPsu_IntrHandler(void *XUsbPsuInstancePtr);
 597
 598 /*
 599  * Functions in xusbpsu_sinit.c
 600  */
 601 XUsbPsu_Config *XUsbPsu_LookupConfig(u16 DeviceId);
 602
 603 #ifdef __cplusplus
 604 }
 605 #endif
 606
 607 #endif  /* End of protection macro. */
 608 /** @} */