2 ; * FreeRTOS Kernel V10.0.0
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3 ; * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 ; * this software and associated documentation files (the "Software"), to deal in
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7 ; * the Software without restriction, including without limitation the rights to
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8 ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 ; * the Software, and to permit persons to whom the Software is furnished to do so,
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10 ; * subject to the following conditions:
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12 ; * The above copyright notice and this permission notice shall be included in all
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13 ; * copies or substantial portions of the Software. If you wish to use our Amazon
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14 ; * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 ; * http://www.FreeRTOS.org
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24 ; * http://aws.amazon.com/freertos
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26 ; * 1 tab == 4 spaces!
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29 #include "FreeRTOSConfig.h"
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31 EXPORT vRegTest1Implementation
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32 EXPORT vRegTest2Implementation
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34 ; This file is built with IAR and ARM compilers. When the ARM compiler
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35 ; is used the compiler options must define __IASMARM__ as 0 using the
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36 ; --predefine "__IASMARM__ SETA 0" command line option. When compiling
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37 ; with IAR __IASMARM__ is automatically set to 1 so no additional assembler
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38 ; options are required.
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39 SECTION .text:CODE:ROOT(2)
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42 ; This function is explained in the comments at the top of main-full.c.
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43 vRegTest1Implementation
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46 IMPORT ulRegTest1LoopCounter
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48 ; Fill each general purpose register with a known value.
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64 ; Fill each FPU register with a known value.
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99 ; Loop, checking each iteration that each register still contains the
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102 ; Yield to increase test coverage
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105 ; Check all the VFP registers still contain the values set above.
\r
106 ; First save registers that are clobbered by the test.
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111 bne reg1_error_loopf
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113 bne reg1_error_loopf
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116 bne reg1_error_loopf
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118 bne reg1_error_loopf
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121 bne reg1_error_loopf
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123 bne reg1_error_loopf
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126 bne reg1_error_loopf
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128 bne reg1_error_loopf
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131 bne reg1_error_loopf
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133 bne reg1_error_loopf
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136 bne reg1_error_loopf
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138 bne reg1_error_loopf
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141 bne reg1_error_loopf
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143 bne reg1_error_loopf
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146 bne reg1_error_loopf
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148 bne reg1_error_loopf
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151 bne reg1_error_loopf
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153 bne reg1_error_loopf
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156 bne reg1_error_loopf
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158 bne reg1_error_loopf
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161 bne reg1_error_loopf
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163 bne reg1_error_loopf
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166 bne reg1_error_loopf
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168 bne reg1_error_loopf
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171 bne reg1_error_loopf
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173 bne reg1_error_loopf
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176 bne reg1_error_loopf
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178 bne reg1_error_loopf
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181 bne reg1_error_loopf
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183 bne reg1_error_loopf
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186 bne reg1_error_loopf
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188 bne reg1_error_loopf
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192 bne reg1_error_loopf
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194 bne reg1_error_loopf
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197 bne reg1_error_loopf
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199 bne reg1_error_loopf
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202 bne reg1_error_loopf
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204 bne reg1_error_loopf
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207 bne reg1_error_loopf
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209 bne reg1_error_loopf
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212 bne reg1_error_loopf
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214 bne reg1_error_loopf
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217 bne reg1_error_loopf
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219 bne reg1_error_loopf
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222 bne reg1_error_loopf
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224 bne reg1_error_loopf
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227 bne reg1_error_loopf
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229 bne reg1_error_loopf
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232 bne reg1_error_loopf
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234 bne reg1_error_loopf
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237 bne reg1_error_loopf
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239 bne reg1_error_loopf
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242 bne reg1_error_loopf
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244 bne reg1_error_loopf
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247 bne reg1_error_loopf
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249 bne reg1_error_loopf
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252 bne reg1_error_loopf
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254 bne reg1_error_loopf
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257 bne reg1_error_loopf
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259 bne reg1_error_loopf
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262 bne reg1_error_loopf
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264 bne reg1_error_loopf
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267 bne reg1_error_loopf
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269 bne reg1_error_loopf
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271 ; Restore the registers that were clobbered by the test.
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274 ; VFP register test passed. Jump to the core register test.
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278 ; If this line is hit then a VFP register value was found to be
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284 ; Test each general purpose register to check that it still contains the
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285 ; expected known value, jumping to reg1_error_loop if any register contains
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286 ; an unexpected value.
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288 bne reg1_error_loop
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290 bne reg1_error_loop
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292 bne reg1_error_loop
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294 bne reg1_error_loop
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296 bne reg1_error_loop
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298 bne reg1_error_loop
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300 bne reg1_error_loop
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302 bne reg1_error_loop
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304 bne reg1_error_loop
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306 bne reg1_error_loop
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308 bne reg1_error_loop
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310 bne reg1_error_loop
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312 bne reg1_error_loop
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314 bne reg1_error_loop
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316 ; Everything passed, increment the loop counter.
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318 ldr r0, =ulRegTest1LoopCounter
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328 ; If this line is hit then there was an error in a core register value.
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329 ; The loop ensures the loop counter stops incrementing.
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333 ;/*-----------------------------------------------------------*/
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335 vRegTest2Implementation
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338 IMPORT ulRegTest2LoopCounter
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340 ; Put a known value in each register.
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341 mov r0, #0xFF000000
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342 mov r1, #0x11000000
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343 mov r2, #0x22000000
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344 mov r3, #0x33000000
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345 mov r4, #0x44000000
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346 mov r5, #0x55000000
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347 mov r6, #0x66000000
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348 mov r7, #0x77000000
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349 mov r8, #0x88000000
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350 mov r9, #0x99000000
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351 mov r10, #0xAA000000
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352 mov r11, #0xBB000000
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353 mov r12, #0xCC000000
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354 mov r14, #0xEE000000
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356 ; Likewise the floating point registers
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391 ; Loop, checking each iteration that each register still contains the
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394 ; Check all the VFP registers still contain the values set above.
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395 ; First save registers that are clobbered by the test.
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399 cmp r0, #0xFF000000
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400 bne reg2_error_loopf
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401 cmp r1, #0x11000000
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402 bne reg2_error_loopf
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404 cmp r0, #0x22000000
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405 bne reg2_error_loopf
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406 cmp r1, #0x33000000
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407 bne reg2_error_loopf
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409 cmp r0, #0x44000000
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410 bne reg2_error_loopf
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411 cmp r1, #0x55000000
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412 bne reg2_error_loopf
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414 cmp r0, #0x66000000
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415 bne reg2_error_loopf
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416 cmp r1, #0x77000000
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417 bne reg2_error_loopf
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419 cmp r0, #0x88000000
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420 bne reg2_error_loopf
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421 cmp r1, #0x99000000
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422 bne reg2_error_loopf
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424 cmp r0, #0xAA000000
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425 bne reg2_error_loopf
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426 cmp r1, #0xBB000000
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427 bne reg2_error_loopf
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429 cmp r0, #0xFF000000
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430 bne reg2_error_loopf
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431 cmp r1, #0x11000000
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432 bne reg2_error_loopf
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434 cmp r0, #0x22000000
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435 bne reg2_error_loopf
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436 cmp r1, #0x33000000
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437 bne reg2_error_loopf
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439 cmp r0, #0x44000000
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440 bne reg2_error_loopf
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441 cmp r1, #0x55000000
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442 bne reg2_error_loopf
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444 cmp r0, #0x66000000
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445 bne reg2_error_loopf
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446 cmp r1, #0x77000000
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447 bne reg2_error_loopf
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449 cmp r0, #0x88000000
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450 bne reg2_error_loopf
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451 cmp r1, #0x99000000
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452 bne reg2_error_loopf
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454 cmp r0, #0xAA000000
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455 bne reg2_error_loopf
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456 cmp r1, #0xBB000000
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457 bne reg2_error_loopf
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459 cmp r0, #0xFF000000
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460 bne reg2_error_loopf
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461 cmp r1, #0x11000000
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462 bne reg2_error_loopf
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464 cmp r0, #0x22000000
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465 bne reg2_error_loopf
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466 cmp r1, #0x33000000
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467 bne reg2_error_loopf
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469 cmp r0, #0x44000000
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470 bne reg2_error_loopf
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471 cmp r1, #0x55000000
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472 bne reg2_error_loopf
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474 cmp r0, #0x66000000
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475 bne reg2_error_loopf
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476 cmp r1, #0x77000000
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477 bne reg2_error_loopf
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480 cmp r0, #0xFF000000
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481 bne reg2_error_loopf
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482 cmp r1, #0x11000000
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483 bne reg2_error_loopf
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485 cmp r0, #0x22000000
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486 bne reg2_error_loopf
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487 cmp r1, #0x33000000
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488 bne reg2_error_loopf
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490 cmp r0, #0x44000000
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491 bne reg2_error_loopf
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492 cmp r1, #0x55000000
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493 bne reg2_error_loopf
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495 cmp r0, #0x66000000
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496 bne reg2_error_loopf
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497 cmp r1, #0x77000000
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498 bne reg2_error_loopf
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500 cmp r0, #0x88000000
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501 bne reg2_error_loopf
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502 cmp r1, #0x99000000
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503 bne reg2_error_loopf
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505 cmp r0, #0xAA000000
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506 bne reg2_error_loopf
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507 cmp r1, #0xBB000000
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508 bne reg2_error_loopf
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510 cmp r0, #0xFF000000
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511 bne reg2_error_loopf
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512 cmp r1, #0x11000000
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513 bne reg2_error_loopf
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515 cmp r0, #0x22000000
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516 bne reg2_error_loopf
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517 cmp r1, #0x33000000
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518 bne reg2_error_loopf
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520 cmp r0, #0x44000000
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521 bne reg2_error_loopf
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522 cmp r1, #0x55000000
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523 bne reg2_error_loopf
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525 cmp r0, #0x66000000
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526 bne reg2_error_loopf
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527 cmp r1, #0x77000000
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528 bne reg2_error_loopf
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530 cmp r0, #0x88000000
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531 bne reg2_error_loopf
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532 cmp r1, #0x99000000
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533 bne reg2_error_loopf
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535 cmp r0, #0xAA000000
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536 bne reg2_error_loopf
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537 cmp r1, #0xBB000000
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538 bne reg2_error_loopf
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540 cmp r0, #0xFF000000
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541 bne reg2_error_loopf
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542 cmp r1, #0x11000000
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543 bne reg2_error_loopf
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545 cmp r0, #0x22000000
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546 bne reg2_error_loopf
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547 cmp r1, #0x33000000
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548 bne reg2_error_loopf
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550 cmp r0, #0x44000000
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551 bne reg2_error_loopf
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552 cmp r1, #0x55000000
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553 bne reg2_error_loopf
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555 cmp r0, #0x66000000
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556 bne reg2_error_loopf
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557 cmp r1, #0x77000000
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558 bne reg2_error_loopf
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560 ; Restore the registers that were clobbered by the test.
\r
563 ; VFP register test passed. Jump to the core register test.
\r
567 ; If this line is hit then a VFP register value was found to be
\r
573 cmp r0, #0xFF000000
\r
574 bne reg2_error_loop
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575 cmp r1, #0x11000000
\r
576 bne reg2_error_loop
\r
577 cmp r2, #0x22000000
\r
578 bne reg2_error_loop
\r
579 cmp r3, #0x33000000
\r
580 bne reg2_error_loop
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581 cmp r4, #0x44000000
\r
582 bne reg2_error_loop
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583 cmp r5, #0x55000000
\r
584 bne reg2_error_loop
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585 cmp r6, #0x66000000
\r
586 bne reg2_error_loop
\r
587 cmp r7, #0x77000000
\r
588 bne reg2_error_loop
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589 cmp r8, #0x88000000
\r
590 bne reg2_error_loop
\r
591 cmp r9, #0x99000000
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592 bne reg2_error_loop
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593 cmp r10, #0xAA000000
\r
594 bne reg2_error_loop
\r
595 cmp r11, #0xBB000000
\r
596 bne reg2_error_loop
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597 cmp r12, #0xCC000000
\r
598 bne reg2_error_loop
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599 cmp r14, #0xEE000000
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600 bne reg2_error_loop
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602 ; Everything passed, increment the loop counter.
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604 ldr r0, =ulRegTest2LoopCounter
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614 ; If this line is hit then there was an error in a core register value.
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615 ; The loop ensures the loop counter stops incrementing.
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