6 // Disable MMU and enable ICache
\r
7 Reg = __jtagCP15ReadReg(1, 0, 0, 0);
\r
10 __jtagCP15WriteReg(1, 0, 0, 0, Reg);
\r
12 __writeMemory16(0x0000FF41, 0xFCFE721C, "Memory"); // set PIPC7.6 direction controlled by alt.WE0
\r
13 __writeMemory16(0x0000FF41, 0xFCFE341C, "Memory"); // set PMC7.6 to be alt.WE0
\r
15 __writeMemory16(0x0000FFFF, 0xFCFE7220, "Memory"); // set PIPC8 direction controlled by alt.A8-A23
\r
16 __writeMemory16(0x0000FFFF, 0xFCFE3420, "Memory"); // set PMC8 to be alt.A8-A23
\r
18 __writeMemory16(0x00000003, 0xFCFE7224, "Memory"); // set PIPC9 direction controlled by alt.A24-A25
\r
19 __writeMemory16(0x00000003, 0xFCFE3424, "Memory"); // set PMC9 to be alt.A24-A25
\r
21 __writeMemory16(0x00000080, 0xFCFE720C, "Memory"); // set PIPC3 direction controlled by alt.CS1
\r
22 __writeMemory16(0x00000080, 0xFCFE340C, "Memory"); // set PMC3 to be alt.CS1
\r
23 __writeMemory16(0x00000080, 0xFCFE360C, "Memory"); // set PFCE3 to be alt.CS1
\r
24 __writeMemory16(0x00000080, 0xFCFE3A0C, "Memory"); // set PFCAE3 to be alt.CS1
\r
29 __message "----- Prepare hardware for debug -----\n";
\r