1 /*******************************************************************************
\r
3 * This software is supplied by Renesas Electronics Corporation and is only
\r
4 * intended for use with Renesas products. No other uses are authorized. This
\r
5 * software is owned by Renesas Electronics Corporation and is protected under
\r
6 * all applicable laws, including copyright laws.
\r
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
\r
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
\r
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
\r
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
\r
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
\r
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
\r
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
\r
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
\r
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
\r
16 * Renesas reserves the right, without notice, to make changes to this software
\r
17 * and to discontinue the availability of this software. By using this software,
\r
18 * you agree to the additional terms and conditions found by accessing the
\r
20 * http://www.renesas.com/disclaimer
\r
22 * Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved.
\r
23 *******************************************************************************/
\r
24 /*******************************************************************************
\r
25 * File Name : stb_init.c
\r
27 * $Date:: 2013-04-10 12:58:44 +0100#$
\r
28 * Device(s) : Aragon
\r
29 * Tool-Chain : DS-5 Ver 5.8
\r
32 * H/W Platform : Aragon CPU Board
\r
33 * Description : Aragon Sample Program - Initialize peripheral function sample
\r
36 *******************************************************************************/
\r
39 /******************************************************************************
\r
40 Includes <System Includes> , "Project Includes"
\r
41 ******************************************************************************/
\r
42 #include "r_typedefs.h"
\r
43 #include "devdrv_common.h" /* Common Driver Header */
\r
44 #include "stb_init.h"
\r
45 #include "iodefine.h"
\r
47 /* Do not include the following pragmas when compiling with IAR. */
\r
49 #pragma arm section code = "CODE_RESET"
\r
50 #pragma arm section rodata = "CONST_RESET"
\r
51 #pragma arm section rwdata = "DATA_RESET"
\r
52 #pragma arm section zidata = "BSS_RESET"
\r
55 /******************************************************************************
\r
57 ******************************************************************************/
\r
60 /******************************************************************************
\r
62 ******************************************************************************/
\r
65 /******************************************************************************
\r
66 Imported global variables and functions (from other files)
\r
67 ******************************************************************************/
\r
70 /******************************************************************************
\r
71 Exported global variables and functions (to be accessed by other files)
\r
72 ******************************************************************************/
\r
75 /******************************************************************************
\r
76 Private global variables and functions
\r
77 ******************************************************************************/
\r
80 /******************************************************************************
\r
81 * Function Name: StbInit
\r
85 * Return Value : none
\r
86 ******************************************************************************/
\r
89 volatile uint8_t dummy_buf;
\r
91 /* ---- The clock of all modules is permitted. ---- */
\r
92 CPG.STBCR2.BYTE = 0x6Au; /* Port level is keep in standby mode, [1], [1], [0], */
\r
93 /* [1], [0], [1], CoreSight */
\r
94 dummy_buf = CPG.STBCR2.BYTE; /* (Dummy read) */
\r
95 CPG.STBCR3.BYTE = 0x00u; /* IEBus, IrDA, LIN0, LIN1, MTU2, RSCAN2, [0], PWM */
\r
96 dummy_buf = CPG.STBCR3.BYTE; /* (Dummy read) */
\r
97 CPG.STBCR4.BYTE = 0x00u; /* SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 */
\r
98 dummy_buf = CPG.STBCR4.BYTE; /* (Dummy read) */
\r
99 CPG.STBCR5.BYTE = 0x00u; /* SCIM0, SCIM1, SDG0, SDG1, SDG2, SDG3, OSTM0, OSTM1 */
\r
100 dummy_buf = CPG.STBCR5.BYTE; /* (Dummy read) */
\r
101 CPG.STBCR6.BYTE = 0x00u; /* A/D, CEU, DISCOM0, DISCOM1, DRC0, DRC1, JCU, RTClock */
\r
102 dummy_buf = CPG.STBCR6.BYTE; /* (Dummy read) */
\r
103 CPG.STBCR7.BYTE = 0x24u; /* DVDEC0, DVDEC1, [1], ETHER, FLCTL, [1], USB0, USB1 */
\r
104 dummy_buf = CPG.STBCR7.BYTE; /* (Dummy read) */
\r
105 CPG.STBCR8.BYTE = 0x05u; /* IMR-LS20, IMR-LS21, IMR-LSD, MMCIF, MOST50, [1], SCUX, [1] */
\r
106 dummy_buf = CPG.STBCR8.BYTE; /* (Dummy read) */
\r
107 CPG.STBCR9.BYTE = 0x00u; /* I2C0, I2C1, I2C2, I2C3, SPIBSC0, SPIBSC1, VDC50, VDC51 */
\r
108 dummy_buf = CPG.STBCR9.BYTE; /* (Dummy read) */
\r
109 CPG.STBCR10.BYTE = 0x00u; /* RSPI0, RSPI1, RSPI2, RSPI3, RSPI4, CD-ROMDEC, RSPDIF, RGPVG */
\r
110 dummy_buf = CPG.STBCR10.BYTE; /* (Dummy read) */
\r
111 CPG.STBCR11.BYTE = 0xC0u; /* [1], [1], SSIF0, SSIF1, SSIF2, SSIF3, SSIF4, SSIF5 */
\r
112 dummy_buf = CPG.STBCR11.BYTE; /* (Dummy read) */
\r
113 CPG.STBCR12.BYTE = 0xF0u; /* [1], [1], [1], [1], SDHI00, SDHI01, SDHI10, SDHI11 */
\r
114 dummy_buf = CPG.STBCR12.BYTE; /* (Dummy read) */
\r