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31 ******************************************************************************/
32 /****************************************************************************/
37 * The is the main header file for the Device Configuration Interface of the Zynq
38 * device. The device configuration interface has three main functionality.
42 * This current version of the driver supports only the AXI-PCAP and Security
43 * Policy blocks. There is a separate driver for XADC.
45 * AXI-PCAP is used for download/upload an encrypted or decrypted bitstream.
46 * DMA embedded in the AXI PCAP provides the master interface to
47 * the Device configuration block for any DMA transfers. The data transfer can
48 * take place between the Tx/RxFIFOs of AXI-PCAP and memory (on chip
49 * RAM/DDR/peripheral memory).
51 * The current driver only supports the downloading the FPGA bitstream and
52 * readback of the decrypted image (sort of loopback).
53 * The driver does not know what information needs to be written to the FPGA to
54 * readback FPGA configuration register or memory data. The application above the
55 * driver should take care of creating the data that needs to be downloaded to
56 * the FPGA so that the bitstream can be readback.
57 * This driver also does not support the reading of the internal registers of the
58 * PCAP. The driver has no knowledge of the PCAP internals.
60 * <b> Initialization and Configuration </b>
62 * The device driver enables higher layer software (e.g., an application) to
63 * communicate with the Device Configuration device.
65 * XDcfg_CfgInitialize() API is used to initialize the Device Configuration
66 * Interface. The user needs to first call the XDcfg_LookupConfig() API which
67 * returns the Configuration structure pointer which is passed as a parameter to
68 * the XDcfg_CfgInitialize() API.
71 * The Driver implements an interrupt handler to support the interrupts provided
76 * This driver is not thread safe. Any needs for threads or thread mutual
77 * exclusion must be satisfied by the layer above this driver.
81 * Asserts are used within all Xilinx drivers to enforce constraints on argument
82 * values. Asserts can be turned off on a system-wide basis by defining, at
83 * compile time, the NDEBUG identifier. By default, asserts are turned on and it
84 * is recommended that users leave asserts on during development.
86 * <b> Building the driver </b>
88 * The XDcfg driver is composed of several source files. This allows the user
89 * to build and link only those parts of the driver that are necessary.
94 * MODIFICATION HISTORY:
96 * Ver Who Date Changes
97 * ----- --- -------- ---------------------------------------------
98 * 1.00a hvm 02/07/11 First release
99 * 2.00a nm 05/31/12 Updated the driver for CR 660835 so that input length for
100 * source/destination to the XDcfg_InitiateDma, XDcfg_Transfer
101 * APIs is words (32 bit) and not bytes.
102 * Updated the notes for XDcfg_InitiateDma/XDcfg_Transfer APIs
103 * to add information that 2 LSBs of the Source/Destination
104 * address when equal to 2
\92b01 indicate the last DMA command
105 * of an overall transfer.
106 * Destination Address passed to this API for secure transfers
107 * instead of using 0xFFFFFFFF for CR 662197. This issue was
108 * resulting in the failure of secure transfers of
109 * non-bitstream images.
110 * 2.01a nm 07/07/12 Updated the XDcfg_IntrClear function to directly
111 * set the mask instead of oring it with the
112 * value read from the interrupt status register
113 * Added defines for the PS Version bits,
114 * removed the FIFO Flush bits from the
115 * Miscellaneous Control Reg.
116 * Added XDcfg_GetPsVersion, XDcfg_SelectIcapInterface
117 * and XDcfg_SelectPcapInterface APIs for CR 643295
118 * The user has to call the XDcfg_SelectIcapInterface API
119 * for the PL reconfiguration using AXI HwIcap.
120 * Updated the XDcfg_Transfer API to clear the
121 * QUARTER_PCAP_RATE_EN bit in the control register for
122 * non secure writes for CR 675543.
123 * 2.02a nm 01/31/13 Fixed CR# 679335.
124 * Added Setting and Clearing the internal PCAP loopback.
125 * Removed code for enabling/disabling AES engine as BootROM
126 * locks down this setting.
128 * Skip Checking the PCFG_INIT in case of non-secure DMA
131 * XDcfg_Transfer fails to transfer data in loopback mode.
133 * Peripheral test fails with Running
134 * DcfgSelfTestExample() in SECURE bootmode.
135 * 2.03a nm 04/19/13 Fixed CR# 703728.
136 * Updated the register definitions as per the latest TRM
137 * version UG585 (v1.4) November 16, 2012.
138 * 3.0 adk 10/12/13 Updated as per the New Tcl API's
139 * 3.0 kpc 21/02/14 Added function prototype for XDcfg_ClearControlRegister
142 ******************************************************************************/
143 #ifndef XDCFG_H /* prevent circular inclusions */
144 #define XDCFG_H /* by using protection macros */
146 /***************************** Include Files *********************************/
148 #include "xdevcfg_hw.h"
150 #include "xil_assert.h"
156 /************************** Constant Definitions *****************************/
158 /* Types of PCAP transfers */
160 #define XDCFG_NON_SECURE_PCAP_WRITE 1
161 #define XDCFG_SECURE_PCAP_WRITE 2
162 #define XDCFG_PCAP_READBACK 3
163 #define XDCFG_CONCURRENT_SECURE_READ_WRITE 4
164 #define XDCFG_CONCURRENT_NONSEC_READ_WRITE 5
167 /**************************** Type Definitions *******************************/
169 * The handler data type allows the user to define a callback function to
170 * respond to interrupt events in the system. This function is executed
171 * in interrupt context, so amount of processing should be minimized.
173 * @param CallBackRef is the callback reference passed in by the upper
174 * layer when setting the callback functions, and passed back to
175 * the upper layer when the callback is invoked. Its type is
176 * unimportant to the driver component, so it is a void pointer.
177 * @param Status is the Interrupt status of the XDcfg device.
179 typedef void (*XDcfg_IntrHandler) (void *CallBackRef, u32 Status);
182 * This typedef contains configuration information for the device.
185 u16 DeviceId; /**< Unique ID of device */
186 u32 BaseAddr; /**< Base address of the device */
190 * The XDcfg driver instance data.
193 XDcfg_Config Config; /**< Hardware Configuration */
194 u32 IsReady; /**< Device is initialized and ready */
195 u32 IsStarted; /**< Device Configuration Interface
198 XDcfg_IntrHandler StatusHandler; /* Event handler function */
199 void *CallBackRef; /* Callback reference for event handler */
202 /****************************************************************************/
205 * Unlock the Device Config Interface block.
207 * @param InstancePtr is a pointer to the instance of XDcfg driver.
211 * @note C-style signature:
212 * void XDcfg_Unlock(XDcfg* InstancePtr)
214 *****************************************************************************/
215 #define XDcfg_Unlock(InstancePtr) \
216 XDcfg_WriteReg((InstancePtr)->Config.BaseAddr, \
217 XDCFG_UNLOCK_OFFSET, XDCFG_UNLOCK_DATA)
221 /****************************************************************************/
224 * Get the version number of the PS from the Miscellaneous Control Register.
226 * @param InstancePtr is a pointer to the instance of XDcfg driver.
228 * @return Version of the PS.
230 * @note C-style signature:
231 * void XDcfg_GetPsVersion(XDcfg* InstancePtr)
233 *****************************************************************************/
234 #define XDcfg_GetPsVersion(InstancePtr) \
235 ((XDcfg_ReadReg((InstancePtr)->Config.BaseAddr, \
236 XDCFG_MCTRL_OFFSET)) & \
237 XDCFG_MCTRL_PCAP_PS_VERSION_MASK) >> \
238 XDCFG_MCTRL_PCAP_PS_VERSION_SHIFT
242 /****************************************************************************/
245 * Read the multiboot config register value.
247 * @param InstancePtr is a pointer to the instance of XDcfg driver.
251 * @note C-style signature:
252 * u32 XDcfg_ReadMultiBootConfig(XDcfg* InstancePtr)
254 *****************************************************************************/
255 #define XDcfg_ReadMultiBootConfig(InstancePtr) \
256 XDcfg_ReadReg((InstancePtr)->Config.BaseAddr + \
257 XDCFG_MULTIBOOT_ADDR_OFFSET)
260 /****************************************************************************/
263 * Selects ICAP interface for reconfiguration after the initial configuration
266 * @param InstancePtr is a pointer to the instance of XDcfg driver.
270 * @note C-style signature:
271 * void XDcfg_SelectIcapInterface(XDcfg* InstancePtr)
273 *****************************************************************************/
274 #define XDcfg_SelectIcapInterface(InstancePtr) \
275 XDcfg_WriteReg((InstancePtr)->Config.BaseAddr, XDCFG_CTRL_OFFSET, \
276 ((XDcfg_ReadReg((InstancePtr)->Config.BaseAddr, XDCFG_CTRL_OFFSET)) \
277 & ( ~XDCFG_CTRL_PCAP_PR_MASK)))
279 /****************************************************************************/
282 * Selects PCAP interface for reconfiguration after the initial configuration
285 * @param InstancePtr is a pointer to the instance of XDcfg driver.
289 * @note C-style signature:
290 * void XDcfg_SelectPcapInterface(XDcfg* InstancePtr)
292 *****************************************************************************/
293 #define XDcfg_SelectPcapInterface(InstancePtr) \
294 XDcfg_WriteReg((InstancePtr)->Config.BaseAddr, XDCFG_CTRL_OFFSET, \
295 ((XDcfg_ReadReg((InstancePtr)->Config.BaseAddr, XDCFG_CTRL_OFFSET)) \
296 | XDCFG_CTRL_PCAP_PR_MASK))
300 /************************** Function Prototypes ******************************/
303 * Lookup configuration in xdevcfg_sinit.c.
305 XDcfg_Config *XDcfg_LookupConfig(u16 DeviceId);
308 * Selftest function in xdevcfg_selftest.c
310 int XDcfg_SelfTest(XDcfg *InstancePtr);
313 * Interface functions in xdevcfg.c
315 int XDcfg_CfgInitialize(XDcfg *InstancePtr,
316 XDcfg_Config *ConfigPtr, u32 EffectiveAddress);
318 void XDcfg_EnablePCAP(XDcfg *InstancePtr);
320 void XDcfg_DisablePCAP(XDcfg *InstancePtr);
322 void XDcfg_SetControlRegister(XDcfg *InstancePtr, u32 Mask);
324 void XDcfg_ClearControlRegister(XDcfg *InstancePtr, u32 Mask);
326 u32 XDcfg_GetControlRegister(XDcfg *InstancePtr);
328 void XDcfg_SetLockRegister(XDcfg *InstancePtr, u32 Data);
330 u32 XDcfg_GetLockRegister(XDcfg *InstancePtr);
332 void XDcfg_SetConfigRegister(XDcfg *InstancePtr, u32 Data);
334 u32 XDcfg_GetConfigRegister(XDcfg *InstancePtr);
336 void XDcfg_SetStatusRegister(XDcfg *InstancePtr, u32 Data);
338 u32 XDcfg_GetStatusRegister(XDcfg *InstancePtr);
340 void XDcfg_SetRomShadowRegister(XDcfg *InstancePtr, u32 Data);
342 u32 XDcfg_GetSoftwareIdRegister(XDcfg *InstancePtr);
344 void XDcfg_SetMiscControlRegister(XDcfg *InstancePtr, u32 Mask);
346 u32 XDcfg_GetMiscControlRegister(XDcfg *InstancePtr);
348 u32 XDcfg_IsDmaBusy(XDcfg *InstancePtr);
350 void XDcfg_InitiateDma(XDcfg *InstancePtr, u32 SourcePtr, u32 DestPtr,
351 u32 SrcWordLength, u32 DestWordLength);
353 u32 XDcfg_Transfer(XDcfg *InstancePtr,
354 void *SourcePtr, u32 SrcWordLength,
355 void *DestPtr, u32 DestWordLength,
359 * Interrupt related function prototypes implemented in xdevcfg_intr.c
361 void XDcfg_IntrEnable(XDcfg *InstancePtr, u32 Mask);
363 void XDcfg_IntrDisable(XDcfg *InstancePtr, u32 Mask);
365 u32 XDcfg_IntrGetEnabled(XDcfg *InstancePtr);
367 u32 XDcfg_IntrGetStatus(XDcfg *InstancePtr);
369 void XDcfg_IntrClear(XDcfg *InstancePtr, u32 Mask);
371 void XDcfg_InterruptHandler(XDcfg *InstancePtr);
373 void XDcfg_SetHandler(XDcfg *InstancePtr, void *CallBackFunc,
380 #endif /* end of protection macro */