1 /******************************************************************************
3 * Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * Use of the Software is limited solely to applications:
16 * (a) running on a Xilinx device, or
17 * (b) that interact with a Xilinx device through a bus or interconnect.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
27 * Except as contained in this notice, the name of the Xilinx shall not be used
28 * in advertising or otherwise to promote the sale, use or other dealings in
29 * this Software without prior written authorization from Xilinx.
31 ******************************************************************************/
32 /*****************************************************************************/
37 * This file contains the implementation of the XUsbPs driver. It is the
38 * driver for an USB controller in DEVICE or HOST mode.
40 * <h2>Introduction</h2>
42 * The Spartan-3AF Embedded Peripheral Block contains a USB controller for
43 * communication with serial peripherals or hosts. The USB controller supports
44 * Host, Device and On the Go (OTG) applications.
46 * <h2>USB Controller Features</h2>
48 * - Supports Low Speed USB 1.1 (1.5Mbps), Full Speed USB 1.1 (12Mbps), and
49 * High Speed USB 2.0 (480Mbps) data speeds
50 * - Supports Device, Host and OTG operational modes
51 * - ULPI transceiver interface for USB 2.0 operation
52 * - Integrated USB Full and Low speed serial transceiver interfaces for lowest
55 * <h2>Initialization & Configuration</h2>
57 * The configuration of the USB driver happens in multiple stages:
59 * - (a) Configuration of the basic parameters:
60 * In this stage the basic parameters for the driver are configured,
61 * including the base address and the controller ID.
63 * - (b) Configuration of the DEVICE endpoints (if applicable):
64 * If DEVICE mode is desired, the endpoints of the controller need to be
65 * configured using the XUsbPs_DeviceConfig data structure. Once the
66 * endpoint configuration is set up in the data structure, The user then
67 * needs to allocate the required amount of DMAable memory and
68 * finalize the configuration of the XUsbPs_DeviceConfig data structure,
69 * e.g. setting the DMAMemVirt and DMAMemPhys members.
71 * - (c) Configuration of the DEVICE modes:
72 * In the second stage the parameters for DEVICE are configured.
73 * The caller only needs to configure the modes that are
74 * actually used. Configuration is done with the:
75 * XUsbPs_ConfigureDevice()
76 * Configuration parameters are defined and passed
77 * into these functions using the:
78 * XUsbPs_DeviceConfig data structures.
81 * <h2>USB Device Endpoints</h2>
83 * The USB core supports up to 4 endpoints. Each endpoint has two directions,
84 * an OUT (RX) and an IN (TX) direction. Note that the direction is viewed from
85 * the host's perspective. Endpoint 0 defaults to be the control endpoint and
86 * does not need to be set up. Other endpoints need to be configured and set up
87 * depending on the application. Only endpoints that are actuelly used by the
88 * application need to be initialized.
89 * See the example code (xusbps_intr_example.c) for more information.
92 * <h2>Interrupt Handling</h2>
94 * The USB core uses one interrupt line to report interrupts to the CPU.
95 * Interrupts are handled by the driver's interrupt handler function
96 * XUsbPs_IntrHandler().
97 * It has to be registered with the OS's interrupt subsystem. The driver's
98 * interrupt handler divides incoming interrupts into two categories:
100 * - General device interrupts
101 * - Endopint related interrupts
103 * The user (typically the adapter layer) can register general interrupt
104 * handler fucntions and endpoint specific interrupt handler functions with the
105 * driver to receive those interrupts by calling the
106 * XUsbPs_IntrSetHandler()
108 * XUsbPs_EpSetHandler()
109 * functions respectively. Calling these functions with a NULL pointer as the
110 * argument for the function pointer will "clear" the handler function.
112 * The user can register one handler function for the generic interrupts and
113 * two handler functions for each endpoint, one for the RX (OUT) and one for
114 * the TX (IN) direction. For some applications it may be useful to register a
115 * single endpoint handler function for muliple endpoints/directions.
117 * When a callback function is called by the driver, parameters identifying the
118 * type of the interrupt will be passed into the handler functions. For general
119 * interrupts the interrupt mask will be passed into the handler function. For
120 * endpoint interrupts the parameters include the number of the endpoint, the
121 * direction (OUT/IN) and the type of the interrupt.
124 * <h2>Data buffer handling</h2>
126 * Data buffers are sent to and received from endpoint using the
127 * XUsbPs_EpBufferSend(), XUsbPs_EpBufferSendWithZLT()
129 * XUsbPs_EpBufferReceive()
132 * User data buffer size is limited to 16 Kbytes. If the user wants to send a
133 * data buffer that is bigger than this limit it needs to break down the data
134 * buffer into multiple fragments and send the fragments individually.
136 * From the controller perspective Data buffers can be aligned at any boundary.
137 * if the buffers are from cache region then the buffer and buffer size should
138 * be aligned to cache line aligned
143 * The driver uses a zero copy mechanism which imposes certain restrictions to
144 * the way the user can handle the data buffers.
146 * One restriction is that the user needs to release a buffer after it is done
147 * processing the data in the buffer.
149 * Similarly, when the user sends a data buffer it MUST not re-use the buffer
150 * until it is notified by the driver that the buffer has been transmitted. The
151 * driver will notify the user via the registered endpoint interrupt handling
152 * function by sending a XUSBPS_EP_EVENT_DATA_TX event.
157 * The driver uses DMA internally to move data from/to memory. This behaviour
158 * is transparent to the user. Keeping the DMA handling hidden from the user
159 * has the advantage that the same API can be used with USB cores that do not
164 * MODIFICATION HISTORY:
166 * Ver Who Date Changes
167 * ----- ---- -------- ----------------------------------------------------------
168 * 1.00a wgr 10/10/10 First release
169 * 1.02a wgr 05/16/12 Removed comments as they are showing up in SDK
171 * 1.03a nm 09/21/12 Fixed CR#678977. Added proper sequence for setup packet
173 * 1.04a nm 10/23/12 Fixed CR# 679106.
174 * 11/02/12 Fixed CR# 683931. Mult bits are set properly in dQH.
175 * 2.00a kpc 04/03/14 Fixed CR#777763. Corrected the setup tripwire macro val.
176 * 2.1 kpc 04/28/14 Removed unused function prototypes
179 ******************************************************************************/
188 /***************************** Include Files *********************************/
190 #include "xusbps_hw.h"
191 #include "xil_types.h"
194 /************************** Constant Definitions *****************************/
197 * @name System hang prevention Timeout counter value.
199 * This value is used throughout the code to initialize a Timeout counter that
200 * is used when hard polling a register. The ides is to initialize the Timeout
201 * counter to a value that is longer than any expected Timeout but short enough
202 * so the system will continue to work and report an error while the user is
203 * still paying attention. A reasonable Timeout time would be about 10 seconds.
204 * The XUSBPS_TIMEOUT_COUNTER value should be chosen so a polling loop would
205 * run about 10 seconds before a Timeout is detected. For example:
207 * int Timeout = XUSBPS_TIMEOUT_COUNTER;
208 * while ((XUsbPs_ReadReg(InstancePtr->Config.BaseAddress,
209 * XUSBPS_CMD_OFFSET) &
210 * XUSBPS_CMD_RST_MASK) && --Timeout) {
213 * if (0 == Timeout) {
214 * return XST_FAILURE;
218 #define XUSBPS_TIMEOUT_COUNTER 1000000
222 * @name Endpoint Direction (bitmask)
223 * Definitions to be used with Endpoint related function that require a
224 * 'Direction' parameter.
227 * The direction is always defined from the perspective of the HOST! This
228 * means that an IN endpoint on the controller is used for sending data while
229 * the OUT endpoint on the controller is used for receiving data.
232 #define XUSBPS_EP_DIRECTION_IN 0x01 /**< Endpoint direction IN. */
233 #define XUSBPS_EP_DIRECTION_OUT 0x02 /**< Endpoint direction OUT. */
238 * @name Endpoint Type
239 * Definitions to be used with Endpoint related functions that require a 'Type'
243 #define XUSBPS_EP_TYPE_NONE 0 /**< Endpoint is not used. */
244 #define XUSBPS_EP_TYPE_CONTROL 1 /**< Endpoint for Control Transfers */
245 #define XUSBPS_EP_TYPE_ISOCHRONOUS 2 /**< Endpoint for isochronous data */
246 #define XUSBPS_EP_TYPE_BULK 3 /**< Endpoint for BULK Transfers. */
247 #define XUSBPS_EP_TYPE_INTERRUPT 4 /**< Endpoint for interrupt Transfers */
251 * Endpoint Max Packet Length in DeviceConfig is a coded value, ch9.6.6.
255 #define ENDPOINT_MAXP_LENGTH 0x400
256 #define ENDPOINT_MAXP_MULT_MASK 0xC00
257 #define ENDPOINT_MAXP_MULT_SHIFT 10
261 * @name Field names for status retrieval
262 * Definitions for the XUsbPs_GetStatus() function call 'StatusType'
266 #define XUSBPS_EP_STS_ADDRESS 1 /**< Address of controller. */
267 #define XUSBPS_EP_STS_CONTROLLER_STATE 2 /**< Current controller state. */
273 * @name USB Default alternate setting
277 #define XUSBPS_DEFAULT_ALT_SETTING 0 /**< The default alternate setting is 0 */
281 * @name Endpoint event types
282 * Definitions that are used to identify events that occur on endpoints. Passed
283 * to the endpoint event handler functions registered with
284 * XUsbPs_EpSetHandler().
287 #define XUSBPS_EP_EVENT_SETUP_DATA_RECEIVED 0x01
288 /**< Setup data has been received on the enpoint. */
289 #define XUSBPS_EP_EVENT_DATA_RX 0x02
290 /**< Data frame has been received on the endpoint. */
291 #define XUSBPS_EP_EVENT_DATA_TX 0x03
292 /**< Data frame has been sent on the endpoint. */
297 * Maximum packet size for endpoint, 1024
300 #define XUSBPS_MAX_PACKET_SIZE 1024
301 /**< Maximum value can be put into the queue head */
303 /**************************** Type Definitions *******************************/
305 /******************************************************************************
306 * This data type defines the callback function to be used for Endpoint
309 * @param CallBackRef is the Callback reference passed in by the upper
310 * layer when setting the handler, and is passed back to the upper
311 * layer when the handler is called.
312 * @param EpNum is the Number of the endpoint that caused the event.
313 * @param EventType is the type of the event that occured on the endpoint.
314 * @param Data is a pointer to user data pointer specified when callback
317 typedef void (*XUsbPs_EpHandlerFunc)(void *CallBackRef,
318 u8 EpNum, u8 EventType, void *Data);
321 /******************************************************************************
322 * This data type defines the callback function to be used for the general
325 * @param CallBackRef is the Callback reference passed in by the upper
326 * layer when setting the handler, and is passed back to the upper
327 * layer when the handler is called.
328 * @param IrqMask is the Content of the interrupt status register. This
329 * value can be used by the callback function to distinguish the
330 * individual interrupt types.
332 typedef void (*XUsbPs_IntrHandlerFunc)(void *CallBackRef, u32 IrqMask);
335 /******************************************************************************/
337 /* The following type definitions are used for referencing Queue Heads and
338 * Transfer Descriptors. The structures themselves are not used, however, the
339 * types are used in the API to avoid using (void *) pointers.
341 typedef u8 XUsbPs_dQH[XUSBPS_dQH_ALIGN];
342 typedef u8 XUsbPs_dTD[XUSBPS_dTD_ALIGN];
346 * The following data structures are used internally by the L0/L1 driver.
347 * Their contents MUST NOT be changed by the upper layers.
351 * The following data structure represents OUT endpoint.
355 /**< Pointer to the Queue Head structure of the endpoint. */
358 /**< Pointer to the first dTD of the dTD list for this
362 /**< Buffer to the currently processed descriptor. */
365 /**< Pointer to the first buffer of the buffer list for this
368 XUsbPs_EpHandlerFunc HandlerFunc;
369 /**< Handler function for this endpoint. */
371 /**< User data reference for the handler. */
376 * The following data structure represents IN endpoint.
380 /**< Pointer to the Queue Head structure of the endpoint. */
383 /**< List of pointers to the Transfer Descriptors of the
387 /**< Buffer to the next available descriptor in the list. */
390 /**< Buffer to the last unsent descriptor in the list*/
392 XUsbPs_EpHandlerFunc HandlerFunc;
393 /**< Handler function for this endpoint. */
395 /**< User data reference for the handler. */
400 * The following data structure represents an endpoint used internally
401 * by the L0/L1 driver.
404 /* Each endpoint has an OUT and an IN component.
406 XUsbPs_EpOut Out; /**< OUT endpoint structure */
407 XUsbPs_EpIn In; /**< IN endpoint structure */
413 * The following structure is used by the user to receive Setup Data from an
414 * endpoint. Using this structure simplifies the process of interpreting the
415 * setup data in the core's data fields.
417 * The naming scheme for the members of this structure is different from the
418 * naming scheme found elsewhere in the code. The members of this structure are
419 * defined in the Chapter 9 USB reference guide. Using this naming scheme makes
420 * it easier for people familiar with the standard to read the code.
423 u8 bmRequestType; /**< bmRequestType in setup data */
424 u8 bRequest; /**< bRequest in setup data */
425 u16 wValue; /**< wValue in setup data */
426 u16 wIndex; /**< wIndex in setup data */
427 u16 wLength; /**< wLength in setup data */
433 * Data structures used to configure endpoints.
438 - XUSBPS_EP_TYPE_CONTROL
439 - XUSBPS_EP_TYPE_ISOCHRONOUS
440 - XUSBPS_EP_TYPE_BULK
441 - XUSBPS_EP_TYPE_INTERRUPT */
444 /**< Number of buffers to be handled by this endpoint. */
446 /**< Buffer size. Only relevant for OUT (receive) Endpoints. */
449 /**< Maximum packet size for this endpoint. This number will
450 * define the maximum number of bytes sent on the wire per
451 * transaction. Range: 0..1024 */
456 * Endpoint configuration structure.
459 XUsbPs_EpSetup Out; /**< OUT component of endpoint. */
460 XUsbPs_EpSetup In; /**< IN component of endpoint. */
465 * The XUsbPs_DeviceConfig structure contains the configuration information to
466 * configure the USB controller for DEVICE mode. This data structure is used
467 * with the XUsbPs_ConfigureDevice() function call.
470 u8 NumEndpoints; /**< Number of Endpoints for the controller.
471 This number depends on the runtime
472 configuration of driver. The driver may
473 configure fewer endpoints than are available
476 XUsbPs_EpConfig EpCfg[XUSBPS_MAX_ENDPOINTS];
477 /**< List of endpoint configurations. */
480 u32 DMAMemPhys; /**< Physical base address of DMAable memory
481 allocated for the driver. */
483 /* The following members are used internally by the L0/L1 driver. They
484 * MUST NOT be accesses and/or modified in any way by the upper layers.
486 * The reason for having these members is that we generally try to
487 * avoid allocating memory in the L0/L1 driver as we want to be OS
488 * independent. In order to avoid allocating memory for this data
489 * structure wihin L0/L1 we put it into the XUsbPs_DeviceConfig
490 * structure which is allocated by the caller.
492 XUsbPs_Endpoint Ep[XUSBPS_MAX_ENDPOINTS];
493 /**< List of endpoint metadata structures. */
495 u32 PhysAligned; /**< 64 byte aligned base address of the DMA
496 memory block. Will be computed and set by
498 } XUsbPs_DeviceConfig;
502 * The XUsbPs_Config structure contains configuration information for the USB
505 * This structure only contains the basic configuration for the controller. The
506 * caller also needs to initialize the controller for the DEVICE mode
507 * using the XUsbPs_DeviceConfig data structures with the
508 * XUsbPs_ConfigureDevice() function call
511 u16 DeviceID; /**< Unique ID of controller. */
512 u32 BaseAddress; /**< Core register base address. */
517 * The XUsbPs driver instance data. The user is required to allocate a
518 * variable of this type for every USB controller in the system. A pointer to a
519 * variable of this type is then passed to the driver API functions.
522 XUsbPs_Config Config; /**< Configuration structure */
524 int CurrentAltSetting; /**< Current alternative setting of interface */
526 void *UserDataPtr; /**< Data pointer to be used by upper layers to
527 store application dependent data structures.
528 The upper layers are responsible to allocated
529 and free the memory. The driver will not
530 mofidy this data pointer. */
533 * The following structures hold the configuration for DEVICE mode
534 * of the controller. They are initialized using the
535 * XUsbPs_ConfigureDevice() function call.
537 XUsbPs_DeviceConfig DeviceConfig;
538 /**< Configuration for the DEVICE mode. */
540 XUsbPs_IntrHandlerFunc HandlerFunc;
541 /**< Handler function for the controller. */
543 /**< User data reference for the handler. */
545 /**< User interrupt mask. Defines which interrupts will cause
546 * the callback to be called. */
550 /***************** Macros (Inline Functions) Definitions *********************/
552 /******************************************************************************
554 * USB CONTROLLER RELATED MACROS
556 ******************************************************************************/
557 /*****************************************************************************/
559 * This macro returns the current frame number.
561 * @param InstancePtr is a pointer to the XUsbPs instance of the
564 * @return The current frame number.
566 * @note C-style signature:
567 * u32 XUsbPs_GetFrameNum(const XUsbPs *InstancePtr)
569 ******************************************************************************/
570 #define XUsbPs_GetFrameNum(InstancePtr) \
571 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, XUSBPS_FRAME_OFFSET)
574 /*****************************************************************************/
576 * This macro starts the USB engine.
578 * @param InstancePtr is a pointer to the XUsbPs instance of the
581 * @note C-style signature:
582 * void XUsbPs_Start(XUsbPs *InstancePtr)
584 ******************************************************************************/
585 #define XUsbPs_Start(InstancePtr) \
586 XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
589 /*****************************************************************************/
591 * This macro stops the USB engine.
593 * @param InstancePtr is a pointer to the XUsbPs instance of the
596 * @note C-style signature:
597 * void XUsbPs_Stop(XUsbPs *InstancePtr)
599 ******************************************************************************/
600 #define XUsbPs_Stop(InstancePtr) \
601 XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
604 /*****************************************************************************/
606 * This macro forces the USB engine to be in Full Speed (FS) mode.
608 * @param InstancePtr is a pointer to the XUsbPs instance of the
611 * @note C-style signature:
612 * void XUsbPs_ForceFS(XUsbPs *InstancePtr)
614 ******************************************************************************/
615 #define XUsbPs_ForceFS(InstancePtr) \
616 XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
617 XUSBPS_PORTSCR_PFSC_MASK)
620 /*****************************************************************************/
622 * This macro starts the USB Timer 0, with repeat option for period of
625 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
626 * @param Interval is the interval for Timer0 to generate an interrupt
628 * @note C-style signature:
629 * void XUsbPs_StartTimer0(XUsbPs *InstancePtr, u32 Interval)
631 ******************************************************************************/
632 #define XUsbPs_StartTimer0(InstancePtr, Interval) \
634 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
635 XUSBPS_TIMER0_LD_OFFSET, (Interval)); \
636 XUsbPs_SetBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
637 XUSBPS_TIMER_RUN_MASK | \
638 XUSBPS_TIMER_RESET_MASK | \
639 XUSBPS_TIMER_REPEAT_MASK); \
643 /*****************************************************************************/
645 * This macro stops Timer 0.
647 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
649 * @note C-style signature:
650 * void XUsbPs_StopTimer0(XUsbPs *InstancePtr)
652 ******************************************************************************/
653 #define XUsbPs_StopTimer0(InstancePtr) \
654 XUsbPs_ClrBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
655 XUSBPS_TIMER_RUN_MASK)
658 /*****************************************************************************/
660 * This macro reads Timer 0.
662 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
664 * @note C-style signature:
665 * void XUsbPs_ReadTimer0(XUsbPs *InstancePtr)
667 ******************************************************************************/
668 #define XUsbPs_ReadTimer0(InstancePtr) \
669 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
670 XUSBPS_TIMER0_CTL_OFFSET) & \
671 XUSBPS_TIMER_COUNTER_MASK
674 /*****************************************************************************/
676 * This macro force remote wakeup on host
678 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
680 * @note C-style signature:
681 * void XUsbPs_RemoteWakeup(XUsbPs *InstancePtr)
683 ******************************************************************************/
684 #define XUsbPs_RemoteWakeup(InstancePtr) \
685 XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
686 XUSBPS_PORTSCR_FPR_MASK)
689 /******************************************************************************
691 * ENDPOINT RELATED MACROS
693 ******************************************************************************/
694 /*****************************************************************************/
696 * This macro enables the given endpoint for the given direction.
698 * @param InstancePtr is a pointer to the XUsbPs instance of the
700 * @param EpNum is number of the endpoint to enable.
701 * @param Dir is direction of the endpoint (bitfield):
702 * - XUSBPS_EP_DIRECTION_OUT
703 * - XUSBPS_EP_DIRECTION_IN
705 * @note C-style signature:
706 * void XUsbPs_EpEnable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
708 ******************************************************************************/
709 #define XUsbPs_EpEnable(InstancePtr, EpNum, Dir) \
710 XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
711 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
712 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
715 /*****************************************************************************/
717 * This macro disables the given endpoint for the given direction.
719 * @param InstancePtr is a pointer to the XUsbPs instance of the
721 * @param EpNum is the number of the endpoint to disable.
722 * @param Dir is the direction of the endpoint (bitfield):
723 * - XUSBPS_EP_DIRECTION_OUT
724 * - XUSBPS_EP_DIRECTION_IN
726 * @note C-style signature:
727 * void XUsbPs_EpDisable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
729 ******************************************************************************/
730 #define XUsbPs_EpDisable(InstancePtr, EpNum, Dir) \
731 XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
732 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
733 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
736 /*****************************************************************************/
738 * This macro stalls the given endpoint for the given direction, and flush
741 * @param InstancePtr is a pointer to the XUsbPs instance of the
743 * @param EpNum is number of the endpoint to stall.
744 * @param Dir is the direction of the endpoint (bitfield):
745 * - XUSBPS_EP_DIRECTION_OUT
746 * - XUSBPS_EP_DIRECTION_IN
748 * @note C-style signature:
749 * void XUsbPs_EpStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
751 ******************************************************************************/
752 #define XUsbPs_EpStall(InstancePtr, EpNum, Dir) \
753 XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
754 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
755 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
758 /*****************************************************************************/
760 * This macro unstalls the given endpoint for the given direction.
762 * @param InstancePtr is a pointer to the XUsbPs instance of the
764 * @param EpNum is the Number of the endpoint to unstall.
765 * @param Dir is the Direction of the endpoint (bitfield):
766 * - XUSBPS_EP_DIRECTION_OUT
767 * - XUSBPS_EP_DIRECTION_IN
769 * @note C-style signature:
770 * void XUsbPs_EpUnStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
772 ******************************************************************************/
773 #define XUsbPs_EpUnStall(InstancePtr, EpNum, Dir) \
774 XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
775 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
776 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
779 /*****************************************************************************/
781 * This macro flush an endpoint upon interface disable
783 * @param InstancePtr is a pointer to the XUsbPs instance of the
785 * @param EpNum is the number of the endpoint to flush.
786 * @param Dir is the direction of the endpoint (bitfield):
787 * - XUSBPS_EP_DIRECTION_OUT
788 * - XUSBPS_EP_DIRECTION_IN
790 * @note C-style signature:
791 * void XUsbPs_EpFlush(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
793 ******************************************************************************/
794 #define XUsbPs_EpFlush(InstancePtr, EpNum, Dir) \
795 XUsbPs_SetBits(InstancePtr, XUSBPS_EPFLUSH_OFFSET, \
796 EpNum << ((Dir) & XUSBPS_EP_DIRECTION_OUT ? \
797 XUSBPS_EPFLUSH_RX_SHIFT:XUSBPS_EPFLUSH_TX_SHIFT)) \
799 /*****************************************************************************/
801 * This macro enables the interrupts defined by the bit mask.
803 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
804 * @param IntrMask is the Bit mask of interrupts to be enabled.
806 * @note C-style signature:
807 * void XUsbPs_IntrEnable(XUsbPs *InstancePtr, u32 IntrMask)
809 ******************************************************************************/
810 #define XUsbPs_IntrEnable(InstancePtr, IntrMask) \
811 XUsbPs_SetBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
814 /*****************************************************************************/
816 * This function disables the interrupts defined by the bit mask.
819 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
820 * @param IntrMask is a Bit mask of interrupts to be disabled.
822 * @note C-style signature:
823 * void XUsbPs_IntrDisable(XUsbPs *InstancePtr, u32 IntrMask)
825 ******************************************************************************/
826 #define XUsbPs_IntrDisable(InstancePtr, IntrMask) \
827 XUsbPs_ClrBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
830 /*****************************************************************************/
832 * This macro enables the endpoint NAK interrupts defined by the bit mask.
834 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
835 * @param NakIntrMask is the Bit mask of endpoint NAK interrupts to be
837 * @note C-style signature:
838 * void XUsbPs_NakIntrEnable(XUsbPs *InstancePtr, u32 NakIntrMask)
840 ******************************************************************************/
841 #define XUsbPs_NakIntrEnable(InstancePtr, NakIntrMask) \
842 XUsbPs_SetBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
845 /*****************************************************************************/
847 * This macro disables the endpoint NAK interrupts defined by the bit mask.
849 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
850 * @param NakIntrMask is a Bit mask of endpoint NAK interrupts to be
855 * void XUsbPs_NakIntrDisable(XUsbPs *InstancePtr, u32 NakIntrMask)
857 ******************************************************************************/
858 #define XUsbPs_NakIntrDisable(InstancePtr, NakIntrMask) \
859 XUsbPs_ClrBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
862 /*****************************************************************************/
864 * This function clears the endpoint NAK interrupts status defined by the
867 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
868 * @param NakIntrMask is the Bit mask of endpoint NAK interrupts to be cleared.
870 * @note C-style signature:
871 * void XUsbPs_NakIntrClear(XUsbPs *InstancePtr, u32 NakIntrMask)
873 ******************************************************************************/
874 #define XUsbPs_NakIntrClear(InstancePtr, NakIntrMask) \
875 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
876 XUSBPS_EPNAKISR_OFFSET, NakIntrMask)
880 /*****************************************************************************/
882 * This macro sets the Interrupt Threshold value in the control register
884 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
885 * @param Threshold is the Interrupt threshold to be set.
887 * - XUSBPS_CMD_ITHRESHOLD_0 - Immediate interrupt
888 * - XUSBPS_CMD_ITHRESHOLD_1 - 1 Frame
889 * - XUSBPS_CMD_ITHRESHOLD_2 - 2 Frames
890 * - XUSBPS_CMD_ITHRESHOLD_4 - 4 Frames
891 * - XUSBPS_CMD_ITHRESHOLD_8 - 8 Frames
892 * - XUSBPS_CMD_ITHRESHOLD_16 - 16 Frames
893 * - XUSBPS_CMD_ITHRESHOLD_32 - 32 Frames
894 * - XUSBPS_CMD_ITHRESHOLD_64 - 64 Frames
898 * void XUsbPs_SetIntrThreshold(XUsbPs *InstancePtr, u8 Threshold)
900 ******************************************************************************/
901 #define XUsbPs_SetIntrThreshold(InstancePtr, Threshold) \
902 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
903 XUSBPS_CMD_OFFSET, (Threshold))\
906 /*****************************************************************************/
908 * This macro sets the Tripwire bit in the USB command register.
910 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
912 * @note C-style signature:
913 * void XUsbPs_SetTripwire(XUsbPs *InstancePtr)
915 ******************************************************************************/
916 #define XUsbPs_SetSetupTripwire(InstancePtr) \
917 XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, \
918 XUSBPS_CMD_SUTW_MASK)
921 /*****************************************************************************/
923 * This macro clears the Tripwire bit in the USB command register.
925 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
927 * @note C-style signature:
928 * void XUsbPs_ClrTripwire(XUsbPs *InstancePtr)
930 ******************************************************************************/
931 #define XUsbPs_ClrSetupTripwire(InstancePtr) \
932 XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, \
933 XUSBPS_CMD_SUTW_MASK)
936 /*****************************************************************************/
938 * This macro checks if the Tripwire bit in the USB command register is set.
940 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
943 * - TRUE: The tripwire bit is still set.
944 * - FALSE: The tripwire bit has been cleared.
946 * @note C-style signature:
947 * int XUsbPs_TripwireIsSet(XUsbPs *InstancePtr)
949 ******************************************************************************/
950 #define XUsbPs_SetupTripwireIsSet(InstancePtr) \
951 (XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
952 XUSBPS_CMD_OFFSET) & \
953 XUSBPS_CMD_SUTW_MASK ? TRUE : FALSE)
956 /******************************************************************************
958 * GENERAL REGISTER / BIT MANIPULATION MACROS
960 ******************************************************************************/
961 /****************************************************************************/
963 * This macro sets the given bit mask in the register.
965 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
966 * @param RegOffset is the register offset to be written.
967 * @param Bits is the Bits to be set in the register
971 * @note C-style signature:
972 * void XUsbPs_SetBits(u32 BaseAddress, u32 RegOffset, u32 Bits)
974 *****************************************************************************/
975 #define XUsbPs_SetBits(InstancePtr, RegOffset, Bits) \
976 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
977 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
978 RegOffset) | (Bits));
981 /****************************************************************************/
984 * This macro clears the given bits in the register.
986 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
987 * @param RegOffset is the register offset to be written.
988 * @param Bits are the bits to be cleared in the register
994 * void XUsbPs_ClrBits(u32 BaseAddress, u32 RegOffset, u32 Bits)
996 *****************************************************************************/
997 #define XUsbPs_ClrBits(InstancePtr, RegOffset, Bits) \
998 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
999 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
1000 RegOffset) & ~(Bits));
1003 /************************** Function Prototypes ******************************/
1006 * Setup / Initialize functions.
1008 * Implemented in file xusbps.c
1010 int XUsbPs_CfgInitialize(XUsbPs *InstancePtr,
1011 const XUsbPs_Config *ConfigPtr, u32 BaseAddress);
1013 int XUsbPs_ConfigureDevice(XUsbPs *InstancePtr,
1014 const XUsbPs_DeviceConfig *CfgPtr);
1017 * Common functions used for DEVICE/HOST mode.
1019 int XUsbPs_Reset(XUsbPs *InstancePtr);
1022 * DEVICE mode specific functions.
1024 int XUsbPs_BusReset(XUsbPs *InstancePtr);
1025 int XUsbPs_SetDeviceAddress(XUsbPs *InstancePtr, u8 Address);
1029 * Handling Suspend and Resume.
1031 * Implemented in xusbps.c
1033 int XUsbPs_Suspend(const XUsbPs *InstancePtr);
1034 int XUsbPs_Resume(const XUsbPs *InstancePtr);
1035 int XUsbPs_RequestHostResume(const XUsbPs *InstancePtr);
1039 * Functions for managing Endpoints / Transfers
1041 * Implemented in file xusbps_endpoint.c
1043 int XUsbPs_EpBufferSend(XUsbPs *InstancePtr, u8 EpNum,
1044 const u8 *BufferPtr, u32 BufferLen);
1045 int XUsbPs_EpBufferSendWithZLT(XUsbPs *InstancePtr, u8 EpNum,
1046 const u8 *BufferPtr, u32 BufferLen);
1047 int XUsbPs_EpBufferReceive(XUsbPs *InstancePtr, u8 EpNum,
1048 u8 **BufferPtr, u32 *BufferLenPtr, u32 *Handle);
1049 void XUsbPs_EpBufferRelease(u32 Handle);
1051 int XUsbPs_EpSetHandler(XUsbPs *InstancePtr, u8 EpNum, u8 Direction,
1052 XUsbPs_EpHandlerFunc CallBackFunc,
1054 int XUsbPs_EpGetSetupData(XUsbPs *InstancePtr, int EpNum,
1055 XUsbPs_SetupData *SetupDataPtr);
1057 int XUsbPs_EpPrime(XUsbPs *InstancePtr, u8 EpNum, u8 Direction);
1059 int XUsbPs_ReconfigureEp(XUsbPs *InstancePtr, XUsbPs_DeviceConfig *CfgPtr,
1060 int EpNum, unsigned short NewDirection, int DirectionChanged);
1063 * Interrupt handling functions
1065 * Implemented in file xusbps_intr.c
1067 void XUsbPs_IntrHandler(void *InstancePtr);
1069 int XUsbPs_IntrSetHandler(XUsbPs *InstancePtr,
1070 XUsbPs_IntrHandlerFunc CallBackFunc,
1071 void *CallBackRef, u32 Mask);
1073 * Helper functions for static configuration.
1074 * Implemented in xusbps_sinit.c
1076 XUsbPs_Config *XUsbPs_LookupConfig(u16 DeviceId);
1082 #endif /* XUSBPS_H */