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1 /******************************************************************************
2 *
3 * Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy
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10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * Use of the Software is limited solely to applications:
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18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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29 * this Software without prior written authorization from Xilinx.
30 *
31 ******************************************************************************/
32 /*****************************************************************************/
33 /**
34 *
35 * @file xpm_counter.c
36 *
37 * This file contains APIs for configuring and controlling the Cortex-A9
38 * Performance Monitor Events. For more information about the event counters,
39 * see xpm_counter.h.
40 *
41 * <pre>
42 * MODIFICATION HISTORY:
43 *
44 * Ver   Who  Date     Changes
45 * ----- ---- -------- -----------------------------------------------
46 * 1.00a sdm  07/11/11 First release
47 * 4.2   pkp      07/21/14 Corrected reset value of event counter in function
48 *                                         Xpm_ResetEventCounters to fix CR#796275
49 * </pre>
50 *
51 ******************************************************************************/
52
53 /***************************** Include Files *********************************/
54
55 #include "xpm_counter.h"
56
57 /************************** Constant Definitions ****************************/
58
59 /**************************** Type Definitions ******************************/
60
61 typedef const u32 PmcrEventCfg32[XPM_CTRCOUNT];
62
63 /***************** Macros (Inline Functions) Definitions ********************/
64
65 /************************** Variable Definitions *****************************/
66
67 /************************** Function Prototypes ******************************/
68
69 void Xpm_DisableEventCounters(void);
70 void Xpm_EnableEventCounters (void);
71 void Xpm_ResetEventCounters (void);
72
73 /******************************************************************************/
74
75 /****************************************************************************/
76 /**
77 *
78 * This function disables the Cortex A9 event counters.
79 *
80 * @param        None.
81 *
82 * @return       None.
83 *
84 * @note         None.
85 *
86 *****************************************************************************/
87 void Xpm_DisableEventCounters(void)
88 {
89         /* Disable the event counters */
90         mtcp(XREG_CP15_COUNT_ENABLE_CLR, 0x3f);
91 }
92
93 /****************************************************************************/
94 /**
95 *
96 * This function enables the Cortex A9 event counters.
97 *
98 * @param        None.
99 *
100 * @return       None.
101 *
102 * @note         None.
103 *
104 *****************************************************************************/
105 void Xpm_EnableEventCounters(void)
106 {
107         /* Enable the event counters */
108         mtcp(XREG_CP15_COUNT_ENABLE_SET, 0x3f);
109 }
110
111 /****************************************************************************/
112 /**
113 *
114 * This function resets the Cortex A9 event counters.
115 *
116 * @param        None.
117 *
118 * @return       None.
119 *
120 * @note         None.
121 *
122 *****************************************************************************/
123 void Xpm_ResetEventCounters(void)
124 {
125         u32 Reg;
126 #ifdef __GNUC__
127         Reg = mfcp(XREG_CP15_PERF_MONITOR_CTRL);
128 #elif defined (__ICCARM__)
129         mfcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
130 #else
131         { register u32 C15Reg __asm(XREG_CP15_PERF_MONITOR_CTRL);
132           Reg = C15Reg; }
133 #endif
134         Reg |= (1U << 1U); /* reset event counters */
135         mtcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
136
137 }
138
139 /****************************************************************************/
140 /**
141 *
142 * This function configures the Cortex A9 event counters controller, with the
143 * event codes, in a configuration selected by the user and enables the counters.
144 *
145 * @param        PmcrCfg is configuration value based on which the event counters
146 *               are configured.
147 *               Use XPM_CNTRCFG* values defined in xpm_counter.h.
148 *
149 * @return       None.
150 *
151 * @note         None.
152 *
153 *****************************************************************************/
154 void Xpm_SetEvents(s32 PmcrCfg)
155 {
156         u32 Counter;
157         static PmcrEventCfg32 PmcrEvents[] = {
158         {
159                 XPM_EVENT_SOFTINCR,
160                 XPM_EVENT_INSRFETCH_CACHEREFILL,
161                 XPM_EVENT_INSTRFECT_TLBREFILL,
162                 XPM_EVENT_DATA_CACHEREFILL,
163                 XPM_EVENT_DATA_CACHEACCESS,
164                 XPM_EVENT_DATA_TLBREFILL
165         },
166         {
167                 XPM_EVENT_DATA_READS,
168                 XPM_EVENT_DATA_WRITE,
169                 XPM_EVENT_EXCEPTION,
170                 XPM_EVENT_EXCEPRETURN,
171                 XPM_EVENT_CHANGECONTEXT,
172                 XPM_EVENT_SW_CHANGEPC
173         },
174         {
175                 XPM_EVENT_IMMEDBRANCH,
176                 XPM_EVENT_UNALIGNEDACCESS,
177                 XPM_EVENT_BRANCHMISS,
178                 XPM_EVENT_CLOCKCYCLES,
179                 XPM_EVENT_BRANCHPREDICT,
180                 XPM_EVENT_JAVABYTECODE
181         },
182         {
183                 XPM_EVENT_SWJAVABYTECODE,
184                 XPM_EVENT_JAVABACKBRANCH,
185                 XPM_EVENT_COHERLINEMISS,
186                 XPM_EVENT_COHERLINEHIT,
187                 XPM_EVENT_INSTRSTALL,
188                 XPM_EVENT_DATASTALL
189         },
190         {
191                 XPM_EVENT_MAINTLBSTALL,
192                 XPM_EVENT_STREXPASS,
193                 XPM_EVENT_STREXFAIL,
194                 XPM_EVENT_DATAEVICT,
195                 XPM_EVENT_NODISPATCH,
196                 XPM_EVENT_ISSUEEMPTY
197         },
198         {
199                 XPM_EVENT_INSTRRENAME,
200                 XPM_EVENT_PREDICTFUNCRET,
201                 XPM_EVENT_MAINEXEC,
202                 XPM_EVENT_SECEXEC,
203                 XPM_EVENT_LDRSTR,
204                 XPM_EVENT_FLOATRENAME
205         },
206         {
207                 XPM_EVENT_NEONRENAME,
208                 XPM_EVENT_PLDSTALL,
209                 XPM_EVENT_WRITESTALL,
210                 XPM_EVENT_INSTRTLBSTALL,
211                 XPM_EVENT_DATATLBSTALL,
212                 XPM_EVENT_INSTR_uTLBSTALL
213         },
214         {
215                 XPM_EVENT_DATA_uTLBSTALL,
216                 XPM_EVENT_DMB_STALL,
217                 XPM_EVENT_INT_CLKEN,
218                 XPM_EVENT_DE_CLKEN,
219                 XPM_EVENT_INSTRISB,
220                 XPM_EVENT_INSTRDSB
221         },
222         {
223                 XPM_EVENT_INSTRDMB,
224                 XPM_EVENT_EXTINT,
225                 XPM_EVENT_PLE_LRC,
226                 XPM_EVENT_PLE_LRS,
227                 XPM_EVENT_PLE_FLUSH,
228                 XPM_EVENT_PLE_CMPL
229         },
230         {
231                 XPM_EVENT_PLE_OVFL,
232                 XPM_EVENT_PLE_PROG,
233                 XPM_EVENT_PLE_LRC,
234                 XPM_EVENT_PLE_LRS,
235                 XPM_EVENT_PLE_FLUSH,
236                 XPM_EVENT_PLE_CMPL
237         },
238         {
239                 XPM_EVENT_DATASTALL,
240                 XPM_EVENT_INSRFETCH_CACHEREFILL,
241                 XPM_EVENT_INSTRFECT_TLBREFILL,
242                 XPM_EVENT_DATA_CACHEREFILL,
243                 XPM_EVENT_DATA_CACHEACCESS,
244                 XPM_EVENT_DATA_TLBREFILL
245         },
246         };
247         const u32 *ptr = PmcrEvents[PmcrCfg];
248
249         Xpm_DisableEventCounters();
250
251         for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
252
253                 /* Selecet event counter */
254                 mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
255
256                 /* Set the event */
257                 mtcp(XREG_CP15_EVENT_TYPE_SEL, ptr[Counter]);
258         }
259
260         Xpm_ResetEventCounters();
261         Xpm_EnableEventCounters();
262 }
263
264 /****************************************************************************/
265 /**
266 *
267 * This function disables the event counters and returns the counter values.
268 *
269 * @param        PmCtrValue is a pointer to an array of type u32 PmCtrValue[6].
270 *               It is an output parameter which is used to return the PM
271 *               counter values.
272 *
273 * @return       None.
274 *
275 * @note         None.
276 *
277 *****************************************************************************/
278 void Xpm_GetEventCounters(u32 *PmCtrValue)
279 {
280         u32 Counter;
281
282         Xpm_DisableEventCounters();
283
284         for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
285
286                 mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
287 #ifdef __GNUC__
288                 PmCtrValue[Counter] = mfcp(XREG_CP15_PERF_MONITOR_COUNT);
289 #elif defined (__ICCARM__)
290                 mfcp(XREG_CP15_PERF_MONITOR_COUNT, PmCtrValue[Counter]);
291 #else
292                 { register u32 Cp15Reg __asm(XREG_CP15_PERF_MONITOR_COUNT);
293                   PmCtrValue[Counter] = Cp15Reg; }
294 #endif
295         }
296 }