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36 * @addtogroup usbps_v2_2
40 * This file contains the implementation of the XUsbPs driver. It is the
41 * driver for an USB controller in DEVICE or HOST mode.
43 * <h2>Introduction</h2>
45 * The Spartan-3AF Embedded Peripheral Block contains a USB controller for
46 * communication with serial peripherals or hosts. The USB controller supports
47 * Host, Device and On the Go (OTG) applications.
49 * <h2>USB Controller Features</h2>
51 * - Supports Low Speed USB 1.1 (1.5Mbps), Full Speed USB 1.1 (12Mbps), and
52 * High Speed USB 2.0 (480Mbps) data speeds
53 * - Supports Device, Host and OTG operational modes
54 * - ULPI transceiver interface for USB 2.0 operation
55 * - Integrated USB Full and Low speed serial transceiver interfaces for lowest
58 * <h2>Initialization & Configuration</h2>
60 * The configuration of the USB driver happens in multiple stages:
62 * - (a) Configuration of the basic parameters:
63 * In this stage the basic parameters for the driver are configured,
64 * including the base address and the controller ID.
66 * - (b) Configuration of the DEVICE endpoints (if applicable):
67 * If DEVICE mode is desired, the endpoints of the controller need to be
68 * configured using the XUsbPs_DeviceConfig data structure. Once the
69 * endpoint configuration is set up in the data structure, The user then
70 * needs to allocate the required amount of DMAable memory and
71 * finalize the configuration of the XUsbPs_DeviceConfig data structure,
72 * e.g. setting the DMAMemVirt and DMAMemPhys members.
74 * - (c) Configuration of the DEVICE modes:
75 * In the second stage the parameters for DEVICE are configured.
76 * The caller only needs to configure the modes that are
77 * actually used. Configuration is done with the:
78 * XUsbPs_ConfigureDevice()
79 * Configuration parameters are defined and passed
80 * into these functions using the:
81 * XUsbPs_DeviceConfig data structures.
84 * <h2>USB Device Endpoints</h2>
86 * The USB core supports up to 4 endpoints. Each endpoint has two directions,
87 * an OUT (RX) and an IN (TX) direction. Note that the direction is viewed from
88 * the host's perspective. Endpoint 0 defaults to be the control endpoint and
89 * does not need to be set up. Other endpoints need to be configured and set up
90 * depending on the application. Only endpoints that are actuelly used by the
91 * application need to be initialized.
92 * See the example code (xusbps_intr_example.c) for more information.
95 * <h2>Interrupt Handling</h2>
97 * The USB core uses one interrupt line to report interrupts to the CPU.
98 * Interrupts are handled by the driver's interrupt handler function
99 * XUsbPs_IntrHandler().
100 * It has to be registered with the OS's interrupt subsystem. The driver's
101 * interrupt handler divides incoming interrupts into two categories:
103 * - General device interrupts
104 * - Endopint related interrupts
106 * The user (typically the adapter layer) can register general interrupt
107 * handler fucntions and endpoint specific interrupt handler functions with the
108 * driver to receive those interrupts by calling the
109 * XUsbPs_IntrSetHandler()
111 * XUsbPs_EpSetHandler()
112 * functions respectively. Calling these functions with a NULL pointer as the
113 * argument for the function pointer will "clear" the handler function.
115 * The user can register one handler function for the generic interrupts and
116 * two handler functions for each endpoint, one for the RX (OUT) and one for
117 * the TX (IN) direction. For some applications it may be useful to register a
118 * single endpoint handler function for muliple endpoints/directions.
120 * When a callback function is called by the driver, parameters identifying the
121 * type of the interrupt will be passed into the handler functions. For general
122 * interrupts the interrupt mask will be passed into the handler function. For
123 * endpoint interrupts the parameters include the number of the endpoint, the
124 * direction (OUT/IN) and the type of the interrupt.
127 * <h2>Data buffer handling</h2>
129 * Data buffers are sent to and received from endpoint using the
130 * XUsbPs_EpBufferSend(), XUsbPs_EpBufferSendWithZLT()
132 * XUsbPs_EpBufferReceive()
135 * User data buffer size is limited to 16 Kbytes. If the user wants to send a
136 * data buffer that is bigger than this limit it needs to break down the data
137 * buffer into multiple fragments and send the fragments individually.
139 * From the controller perspective Data buffers can be aligned at any boundary.
140 * if the buffers are from cache region then the buffer and buffer size should
141 * be aligned to cache line aligned
146 * The driver uses a zero copy mechanism which imposes certain restrictions to
147 * the way the user can handle the data buffers.
149 * One restriction is that the user needs to release a buffer after it is done
150 * processing the data in the buffer.
152 * Similarly, when the user sends a data buffer it MUST not re-use the buffer
153 * until it is notified by the driver that the buffer has been transmitted. The
154 * driver will notify the user via the registered endpoint interrupt handling
155 * function by sending a XUSBPS_EP_EVENT_DATA_TX event.
160 * The driver uses DMA internally to move data from/to memory. This behaviour
161 * is transparent to the user. Keeping the DMA handling hidden from the user
162 * has the advantage that the same API can be used with USB cores that do not
167 * MODIFICATION HISTORY:
169 * Ver Who Date Changes
170 * ----- ---- -------- ----------------------------------------------------------
171 * 1.00a wgr 10/10/10 First release
172 * 1.02a wgr 05/16/12 Removed comments as they are showing up in SDK
174 * 1.03a nm 09/21/12 Fixed CR#678977. Added proper sequence for setup packet
176 * 1.04a nm 10/23/12 Fixed CR# 679106.
177 * 11/02/12 Fixed CR# 683931. Mult bits are set properly in dQH.
178 * 2.00a kpc 04/03/14 Fixed CR#777763. Corrected the setup tripwire macro val.
179 * 2.1 kpc 04/28/14 Removed unused function prototypes
180 * 2.2 kpc 08/23/14 Exported XUsbPs_DeviceReset API as global for calling in
181 * code coverage tests.
182 * 2.3 kpc 02/19/14 Fixed CR#873972, CR#873974. Corrected the logic for proper
183 * moving of dTD Head/Tail Pointers. Invalidate the cache
184 * after buffer receive in Endpoint Buffer Handler.
187 ******************************************************************************/
196 /***************************** Include Files *********************************/
198 #include "xusbps_hw.h"
199 #include "xil_types.h"
202 /************************** Constant Definitions *****************************/
205 * @name System hang prevention Timeout counter value.
207 * This value is used throughout the code to initialize a Timeout counter that
208 * is used when hard polling a register. The ides is to initialize the Timeout
209 * counter to a value that is longer than any expected Timeout but short enough
210 * so the system will continue to work and report an error while the user is
211 * still paying attention. A reasonable Timeout time would be about 10 seconds.
212 * The XUSBPS_TIMEOUT_COUNTER value should be chosen so a polling loop would
213 * run about 10 seconds before a Timeout is detected. For example:
215 * int Timeout = XUSBPS_TIMEOUT_COUNTER;
216 * while ((XUsbPs_ReadReg(InstancePtr->Config.BaseAddress,
217 * XUSBPS_CMD_OFFSET) &
218 * XUSBPS_CMD_RST_MASK) && --Timeout) {
221 * if (0 == Timeout) {
222 * return XST_FAILURE;
226 #define XUSBPS_TIMEOUT_COUNTER 1000000
230 * @name Endpoint Direction (bitmask)
231 * Definitions to be used with Endpoint related function that require a
232 * 'Direction' parameter.
235 * The direction is always defined from the perspective of the HOST! This
236 * means that an IN endpoint on the controller is used for sending data while
237 * the OUT endpoint on the controller is used for receiving data.
240 #define XUSBPS_EP_DIRECTION_IN 0x01 /**< Endpoint direction IN. */
241 #define XUSBPS_EP_DIRECTION_OUT 0x02 /**< Endpoint direction OUT. */
246 * @name Endpoint Type
247 * Definitions to be used with Endpoint related functions that require a 'Type'
251 #define XUSBPS_EP_TYPE_NONE 0 /**< Endpoint is not used. */
252 #define XUSBPS_EP_TYPE_CONTROL 1 /**< Endpoint for Control Transfers */
253 #define XUSBPS_EP_TYPE_ISOCHRONOUS 2 /**< Endpoint for isochronous data */
254 #define XUSBPS_EP_TYPE_BULK 3 /**< Endpoint for BULK Transfers. */
255 #define XUSBPS_EP_TYPE_INTERRUPT 4 /**< Endpoint for interrupt Transfers */
259 * Endpoint Max Packet Length in DeviceConfig is a coded value, ch9.6.6.
263 #define ENDPOINT_MAXP_LENGTH 0x400
264 #define ENDPOINT_MAXP_MULT_MASK 0xC00
265 #define ENDPOINT_MAXP_MULT_SHIFT 10
269 * @name Field names for status retrieval
270 * Definitions for the XUsbPs_GetStatus() function call 'StatusType'
274 #define XUSBPS_EP_STS_ADDRESS 1 /**< Address of controller. */
275 #define XUSBPS_EP_STS_CONTROLLER_STATE 2 /**< Current controller state. */
281 * @name USB Default alternate setting
285 #define XUSBPS_DEFAULT_ALT_SETTING 0 /**< The default alternate setting is 0 */
289 * @name Endpoint event types
290 * Definitions that are used to identify events that occur on endpoints. Passed
291 * to the endpoint event handler functions registered with
292 * XUsbPs_EpSetHandler().
295 #define XUSBPS_EP_EVENT_SETUP_DATA_RECEIVED 0x01
296 /**< Setup data has been received on the enpoint. */
297 #define XUSBPS_EP_EVENT_DATA_RX 0x02
298 /**< Data frame has been received on the endpoint. */
299 #define XUSBPS_EP_EVENT_DATA_TX 0x03
300 /**< Data frame has been sent on the endpoint. */
305 * Maximum packet size for endpoint, 1024
308 #define XUSBPS_MAX_PACKET_SIZE 1024
309 /**< Maximum value can be put into the queue head */
311 /**************************** Type Definitions *******************************/
313 /******************************************************************************
314 * This data type defines the callback function to be used for Endpoint
317 * @param CallBackRef is the Callback reference passed in by the upper
318 * layer when setting the handler, and is passed back to the upper
319 * layer when the handler is called.
320 * @param EpNum is the Number of the endpoint that caused the event.
321 * @param EventType is the type of the event that occured on the endpoint.
322 * @param Data is a pointer to user data pointer specified when callback
325 typedef void (*XUsbPs_EpHandlerFunc)(void *CallBackRef,
326 u8 EpNum, u8 EventType, void *Data);
329 /******************************************************************************
330 * This data type defines the callback function to be used for the general
333 * @param CallBackRef is the Callback reference passed in by the upper
334 * layer when setting the handler, and is passed back to the upper
335 * layer when the handler is called.
336 * @param IrqMask is the Content of the interrupt status register. This
337 * value can be used by the callback function to distinguish the
338 * individual interrupt types.
340 typedef void (*XUsbPs_IntrHandlerFunc)(void *CallBackRef, u32 IrqMask);
343 /******************************************************************************/
345 /* The following type definitions are used for referencing Queue Heads and
346 * Transfer Descriptors. The structures themselves are not used, however, the
347 * types are used in the API to avoid using (void *) pointers.
349 typedef u8 XUsbPs_dQH[XUSBPS_dQH_ALIGN];
350 typedef u8 XUsbPs_dTD[XUSBPS_dTD_ALIGN];
354 * The following data structures are used internally by the L0/L1 driver.
355 * Their contents MUST NOT be changed by the upper layers.
359 * The following data structure represents OUT endpoint.
363 /**< Pointer to the Queue Head structure of the endpoint. */
366 /**< Pointer to the first dTD of the dTD list for this
370 /**< Buffer to the currently processed descriptor. */
373 /**< Pointer to the first buffer of the buffer list for this
376 XUsbPs_EpHandlerFunc HandlerFunc;
377 /**< Handler function for this endpoint. */
379 /**< User data reference for the handler. */
384 * The following data structure represents IN endpoint.
388 /**< Pointer to the Queue Head structure of the endpoint. */
391 /**< List of pointers to the Transfer Descriptors of the
395 /**< Buffer to the next available descriptor in the list. */
398 /**< Buffer to the last unsent descriptor in the list*/
400 XUsbPs_EpHandlerFunc HandlerFunc;
401 /**< Handler function for this endpoint. */
403 /**< User data reference for the handler. */
408 * The following data structure represents an endpoint used internally
409 * by the L0/L1 driver.
412 /* Each endpoint has an OUT and an IN component.
414 XUsbPs_EpOut Out; /**< OUT endpoint structure */
415 XUsbPs_EpIn In; /**< IN endpoint structure */
421 * The following structure is used by the user to receive Setup Data from an
422 * endpoint. Using this structure simplifies the process of interpreting the
423 * setup data in the core's data fields.
425 * The naming scheme for the members of this structure is different from the
426 * naming scheme found elsewhere in the code. The members of this structure are
427 * defined in the Chapter 9 USB reference guide. Using this naming scheme makes
428 * it easier for people familiar with the standard to read the code.
431 u8 bmRequestType; /**< bmRequestType in setup data */
432 u8 bRequest; /**< bRequest in setup data */
433 u16 wValue; /**< wValue in setup data */
434 u16 wIndex; /**< wIndex in setup data */
435 u16 wLength; /**< wLength in setup data */
441 * Data structures used to configure endpoints.
446 - XUSBPS_EP_TYPE_CONTROL
447 - XUSBPS_EP_TYPE_ISOCHRONOUS
448 - XUSBPS_EP_TYPE_BULK
449 - XUSBPS_EP_TYPE_INTERRUPT */
452 /**< Number of buffers to be handled by this endpoint. */
454 /**< Buffer size. Only relevant for OUT (receive) Endpoints. */
457 /**< Maximum packet size for this endpoint. This number will
458 * define the maximum number of bytes sent on the wire per
459 * transaction. Range: 0..1024 */
464 * Endpoint configuration structure.
467 XUsbPs_EpSetup Out; /**< OUT component of endpoint. */
468 XUsbPs_EpSetup In; /**< IN component of endpoint. */
473 * The XUsbPs_DeviceConfig structure contains the configuration information to
474 * configure the USB controller for DEVICE mode. This data structure is used
475 * with the XUsbPs_ConfigureDevice() function call.
478 u8 NumEndpoints; /**< Number of Endpoints for the controller.
479 This number depends on the runtime
480 configuration of driver. The driver may
481 configure fewer endpoints than are available
484 XUsbPs_EpConfig EpCfg[XUSBPS_MAX_ENDPOINTS];
485 /**< List of endpoint configurations. */
488 u32 DMAMemPhys; /**< Physical base address of DMAable memory
489 allocated for the driver. */
491 /* The following members are used internally by the L0/L1 driver. They
492 * MUST NOT be accesses and/or modified in any way by the upper layers.
494 * The reason for having these members is that we generally try to
495 * avoid allocating memory in the L0/L1 driver as we want to be OS
496 * independent. In order to avoid allocating memory for this data
497 * structure wihin L0/L1 we put it into the XUsbPs_DeviceConfig
498 * structure which is allocated by the caller.
500 XUsbPs_Endpoint Ep[XUSBPS_MAX_ENDPOINTS];
501 /**< List of endpoint metadata structures. */
503 u32 PhysAligned; /**< 64 byte aligned base address of the DMA
504 memory block. Will be computed and set by
506 } XUsbPs_DeviceConfig;
510 * The XUsbPs_Config structure contains configuration information for the USB
513 * This structure only contains the basic configuration for the controller. The
514 * caller also needs to initialize the controller for the DEVICE mode
515 * using the XUsbPs_DeviceConfig data structures with the
516 * XUsbPs_ConfigureDevice() function call
519 u16 DeviceID; /**< Unique ID of controller. */
520 u32 BaseAddress; /**< Core register base address. */
525 * The XUsbPs driver instance data. The user is required to allocate a
526 * variable of this type for every USB controller in the system. A pointer to a
527 * variable of this type is then passed to the driver API functions.
530 XUsbPs_Config Config; /**< Configuration structure */
532 int CurrentAltSetting; /**< Current alternative setting of interface */
534 void *UserDataPtr; /**< Data pointer to be used by upper layers to
535 store application dependent data structures.
536 The upper layers are responsible to allocated
537 and free the memory. The driver will not
538 mofidy this data pointer. */
541 * The following structures hold the configuration for DEVICE mode
542 * of the controller. They are initialized using the
543 * XUsbPs_ConfigureDevice() function call.
545 XUsbPs_DeviceConfig DeviceConfig;
546 /**< Configuration for the DEVICE mode. */
548 XUsbPs_IntrHandlerFunc HandlerFunc;
549 /**< Handler function for the controller. */
551 /**< User data reference for the handler. */
553 /**< User interrupt mask. Defines which interrupts will cause
554 * the callback to be called. */
558 /***************** Macros (Inline Functions) Definitions *********************/
560 /******************************************************************************
562 * USB CONTROLLER RELATED MACROS
564 ******************************************************************************/
565 /*****************************************************************************/
567 * This macro returns the current frame number.
569 * @param InstancePtr is a pointer to the XUsbPs instance of the
572 * @return The current frame number.
574 * @note C-style signature:
575 * u32 XUsbPs_GetFrameNum(const XUsbPs *InstancePtr)
577 ******************************************************************************/
578 #define XUsbPs_GetFrameNum(InstancePtr) \
579 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, XUSBPS_FRAME_OFFSET)
582 /*****************************************************************************/
584 * This macro starts the USB engine.
586 * @param InstancePtr is a pointer to the XUsbPs instance of the
589 * @note C-style signature:
590 * void XUsbPs_Start(XUsbPs *InstancePtr)
592 ******************************************************************************/
593 #define XUsbPs_Start(InstancePtr) \
594 XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
597 /*****************************************************************************/
599 * This macro stops the USB engine.
601 * @param InstancePtr is a pointer to the XUsbPs instance of the
604 * @note C-style signature:
605 * void XUsbPs_Stop(XUsbPs *InstancePtr)
607 ******************************************************************************/
608 #define XUsbPs_Stop(InstancePtr) \
609 XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
612 /*****************************************************************************/
614 * This macro forces the USB engine to be in Full Speed (FS) mode.
616 * @param InstancePtr is a pointer to the XUsbPs instance of the
619 * @note C-style signature:
620 * void XUsbPs_ForceFS(XUsbPs *InstancePtr)
622 ******************************************************************************/
623 #define XUsbPs_ForceFS(InstancePtr) \
624 XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
625 XUSBPS_PORTSCR_PFSC_MASK)
628 /*****************************************************************************/
630 * This macro starts the USB Timer 0, with repeat option for period of
633 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
634 * @param Interval is the interval for Timer0 to generate an interrupt
636 * @note C-style signature:
637 * void XUsbPs_StartTimer0(XUsbPs *InstancePtr, u32 Interval)
639 ******************************************************************************/
640 #define XUsbPs_StartTimer0(InstancePtr, Interval) \
642 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
643 XUSBPS_TIMER0_LD_OFFSET, (Interval)); \
644 XUsbPs_SetBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
645 XUSBPS_TIMER_RUN_MASK | \
646 XUSBPS_TIMER_RESET_MASK | \
647 XUSBPS_TIMER_REPEAT_MASK); \
651 /*****************************************************************************/
653 * This macro stops Timer 0.
655 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
657 * @note C-style signature:
658 * void XUsbPs_StopTimer0(XUsbPs *InstancePtr)
660 ******************************************************************************/
661 #define XUsbPs_StopTimer0(InstancePtr) \
662 XUsbPs_ClrBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
663 XUSBPS_TIMER_RUN_MASK)
666 /*****************************************************************************/
668 * This macro reads Timer 0.
670 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
672 * @note C-style signature:
673 * void XUsbPs_ReadTimer0(XUsbPs *InstancePtr)
675 ******************************************************************************/
676 #define XUsbPs_ReadTimer0(InstancePtr) \
677 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
678 XUSBPS_TIMER0_CTL_OFFSET) & \
679 XUSBPS_TIMER_COUNTER_MASK
682 /*****************************************************************************/
684 * This macro force remote wakeup on host
686 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
688 * @note C-style signature:
689 * void XUsbPs_RemoteWakeup(XUsbPs *InstancePtr)
691 ******************************************************************************/
692 #define XUsbPs_RemoteWakeup(InstancePtr) \
693 XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
694 XUSBPS_PORTSCR_FPR_MASK)
697 /******************************************************************************
699 * ENDPOINT RELATED MACROS
701 ******************************************************************************/
702 /*****************************************************************************/
704 * This macro enables the given endpoint for the given direction.
706 * @param InstancePtr is a pointer to the XUsbPs instance of the
708 * @param EpNum is number of the endpoint to enable.
709 * @param Dir is direction of the endpoint (bitfield):
710 * - XUSBPS_EP_DIRECTION_OUT
711 * - XUSBPS_EP_DIRECTION_IN
713 * @note C-style signature:
714 * void XUsbPs_EpEnable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
716 ******************************************************************************/
717 #define XUsbPs_EpEnable(InstancePtr, EpNum, Dir) \
718 XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
719 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
720 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
723 /*****************************************************************************/
725 * This macro disables the given endpoint for the given direction.
727 * @param InstancePtr is a pointer to the XUsbPs instance of the
729 * @param EpNum is the number of the endpoint to disable.
730 * @param Dir is the direction of the endpoint (bitfield):
731 * - XUSBPS_EP_DIRECTION_OUT
732 * - XUSBPS_EP_DIRECTION_IN
734 * @note C-style signature:
735 * void XUsbPs_EpDisable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
737 ******************************************************************************/
738 #define XUsbPs_EpDisable(InstancePtr, EpNum, Dir) \
739 XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
740 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
741 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
744 /*****************************************************************************/
746 * This macro stalls the given endpoint for the given direction, and flush
749 * @param InstancePtr is a pointer to the XUsbPs instance of the
751 * @param EpNum is number of the endpoint to stall.
752 * @param Dir is the direction of the endpoint (bitfield):
753 * - XUSBPS_EP_DIRECTION_OUT
754 * - XUSBPS_EP_DIRECTION_IN
756 * @note C-style signature:
757 * void XUsbPs_EpStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
759 ******************************************************************************/
760 #define XUsbPs_EpStall(InstancePtr, EpNum, Dir) \
761 XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
762 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
763 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
766 /*****************************************************************************/
768 * This macro unstalls the given endpoint for the given direction.
770 * @param InstancePtr is a pointer to the XUsbPs instance of the
772 * @param EpNum is the Number of the endpoint to unstall.
773 * @param Dir is the Direction of the endpoint (bitfield):
774 * - XUSBPS_EP_DIRECTION_OUT
775 * - XUSBPS_EP_DIRECTION_IN
777 * @note C-style signature:
778 * void XUsbPs_EpUnStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
780 ******************************************************************************/
781 #define XUsbPs_EpUnStall(InstancePtr, EpNum, Dir) \
782 XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
783 ((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
784 ((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
787 /*****************************************************************************/
789 * This macro flush an endpoint upon interface disable
791 * @param InstancePtr is a pointer to the XUsbPs instance of the
793 * @param EpNum is the number of the endpoint to flush.
794 * @param Dir is the direction of the endpoint (bitfield):
795 * - XUSBPS_EP_DIRECTION_OUT
796 * - XUSBPS_EP_DIRECTION_IN
798 * @note C-style signature:
799 * void XUsbPs_EpFlush(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
801 ******************************************************************************/
802 #define XUsbPs_EpFlush(InstancePtr, EpNum, Dir) \
803 XUsbPs_SetBits(InstancePtr, XUSBPS_EPFLUSH_OFFSET, \
804 EpNum << ((Dir) & XUSBPS_EP_DIRECTION_OUT ? \
805 XUSBPS_EPFLUSH_RX_SHIFT:XUSBPS_EPFLUSH_TX_SHIFT)) \
807 /*****************************************************************************/
809 * This macro enables the interrupts defined by the bit mask.
811 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
812 * @param IntrMask is the Bit mask of interrupts to be enabled.
814 * @note C-style signature:
815 * void XUsbPs_IntrEnable(XUsbPs *InstancePtr, u32 IntrMask)
817 ******************************************************************************/
818 #define XUsbPs_IntrEnable(InstancePtr, IntrMask) \
819 XUsbPs_SetBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
822 /*****************************************************************************/
824 * This function disables the interrupts defined by the bit mask.
827 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
828 * @param IntrMask is a Bit mask of interrupts to be disabled.
830 * @note C-style signature:
831 * void XUsbPs_IntrDisable(XUsbPs *InstancePtr, u32 IntrMask)
833 ******************************************************************************/
834 #define XUsbPs_IntrDisable(InstancePtr, IntrMask) \
835 XUsbPs_ClrBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
838 /*****************************************************************************/
840 * This macro enables the endpoint NAK interrupts defined by the bit mask.
842 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
843 * @param NakIntrMask is the Bit mask of endpoint NAK interrupts to be
845 * @note C-style signature:
846 * void XUsbPs_NakIntrEnable(XUsbPs *InstancePtr, u32 NakIntrMask)
848 ******************************************************************************/
849 #define XUsbPs_NakIntrEnable(InstancePtr, NakIntrMask) \
850 XUsbPs_SetBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
853 /*****************************************************************************/
855 * This macro disables the endpoint NAK interrupts defined by the bit mask.
857 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
858 * @param NakIntrMask is a Bit mask of endpoint NAK interrupts to be
863 * void XUsbPs_NakIntrDisable(XUsbPs *InstancePtr, u32 NakIntrMask)
865 ******************************************************************************/
866 #define XUsbPs_NakIntrDisable(InstancePtr, NakIntrMask) \
867 XUsbPs_ClrBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
870 /*****************************************************************************/
872 * This function clears the endpoint NAK interrupts status defined by the
875 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
876 * @param NakIntrMask is the Bit mask of endpoint NAK interrupts to be cleared.
878 * @note C-style signature:
879 * void XUsbPs_NakIntrClear(XUsbPs *InstancePtr, u32 NakIntrMask)
881 ******************************************************************************/
882 #define XUsbPs_NakIntrClear(InstancePtr, NakIntrMask) \
883 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
884 XUSBPS_EPNAKISR_OFFSET, NakIntrMask)
888 /*****************************************************************************/
890 * This macro sets the Interrupt Threshold value in the control register
892 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
893 * @param Threshold is the Interrupt threshold to be set.
895 * - XUSBPS_CMD_ITHRESHOLD_0 - Immediate interrupt
896 * - XUSBPS_CMD_ITHRESHOLD_1 - 1 Frame
897 * - XUSBPS_CMD_ITHRESHOLD_2 - 2 Frames
898 * - XUSBPS_CMD_ITHRESHOLD_4 - 4 Frames
899 * - XUSBPS_CMD_ITHRESHOLD_8 - 8 Frames
900 * - XUSBPS_CMD_ITHRESHOLD_16 - 16 Frames
901 * - XUSBPS_CMD_ITHRESHOLD_32 - 32 Frames
902 * - XUSBPS_CMD_ITHRESHOLD_64 - 64 Frames
906 * void XUsbPs_SetIntrThreshold(XUsbPs *InstancePtr, u8 Threshold)
908 ******************************************************************************/
909 #define XUsbPs_SetIntrThreshold(InstancePtr, Threshold) \
910 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
911 XUSBPS_CMD_OFFSET, (Threshold))\
914 /*****************************************************************************/
916 * This macro sets the Tripwire bit in the USB command register.
918 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
920 * @note C-style signature:
921 * void XUsbPs_SetTripwire(XUsbPs *InstancePtr)
923 ******************************************************************************/
924 #define XUsbPs_SetSetupTripwire(InstancePtr) \
925 XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, \
926 XUSBPS_CMD_SUTW_MASK)
929 /*****************************************************************************/
931 * This macro clears the Tripwire bit in the USB command register.
933 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
935 * @note C-style signature:
936 * void XUsbPs_ClrTripwire(XUsbPs *InstancePtr)
938 ******************************************************************************/
939 #define XUsbPs_ClrSetupTripwire(InstancePtr) \
940 XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, \
941 XUSBPS_CMD_SUTW_MASK)
944 /*****************************************************************************/
946 * This macro checks if the Tripwire bit in the USB command register is set.
948 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
951 * - TRUE: The tripwire bit is still set.
952 * - FALSE: The tripwire bit has been cleared.
954 * @note C-style signature:
955 * int XUsbPs_TripwireIsSet(XUsbPs *InstancePtr)
957 ******************************************************************************/
958 #define XUsbPs_SetupTripwireIsSet(InstancePtr) \
959 (XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
960 XUSBPS_CMD_OFFSET) & \
961 XUSBPS_CMD_SUTW_MASK ? TRUE : FALSE)
964 /******************************************************************************
966 * GENERAL REGISTER / BIT MANIPULATION MACROS
968 ******************************************************************************/
969 /****************************************************************************/
971 * This macro sets the given bit mask in the register.
973 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
974 * @param RegOffset is the register offset to be written.
975 * @param Bits is the Bits to be set in the register
979 * @note C-style signature:
980 * void XUsbPs_SetBits(u32 BaseAddress, u32 RegOffset, u32 Bits)
982 *****************************************************************************/
983 #define XUsbPs_SetBits(InstancePtr, RegOffset, Bits) \
984 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
985 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
986 RegOffset) | (Bits));
989 /****************************************************************************/
992 * This macro clears the given bits in the register.
994 * @param InstancePtr is a pointer to XUsbPs instance of the controller.
995 * @param RegOffset is the register offset to be written.
996 * @param Bits are the bits to be cleared in the register
1001 * C-style signature:
1002 * void XUsbPs_ClrBits(u32 BaseAddress, u32 RegOffset, u32 Bits)
1004 *****************************************************************************/
1005 #define XUsbPs_ClrBits(InstancePtr, RegOffset, Bits) \
1006 XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
1007 XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
1008 RegOffset) & ~(Bits));
1011 /************************** Function Prototypes ******************************/
1014 * Setup / Initialize functions.
1016 * Implemented in file xusbps.c
1018 int XUsbPs_CfgInitialize(XUsbPs *InstancePtr,
1019 const XUsbPs_Config *ConfigPtr, u32 BaseAddress);
1021 int XUsbPs_ConfigureDevice(XUsbPs *InstancePtr,
1022 const XUsbPs_DeviceConfig *CfgPtr);
1025 * Common functions used for DEVICE/HOST mode.
1027 int XUsbPs_Reset(XUsbPs *InstancePtr);
1029 void XUsbPs_DeviceReset(XUsbPs *InstancePtr);
1032 * DEVICE mode specific functions.
1034 int XUsbPs_BusReset(XUsbPs *InstancePtr);
1035 int XUsbPs_SetDeviceAddress(XUsbPs *InstancePtr, u8 Address);
1039 * Handling Suspend and Resume.
1041 * Implemented in xusbps.c
1043 int XUsbPs_Suspend(const XUsbPs *InstancePtr);
1044 int XUsbPs_Resume(const XUsbPs *InstancePtr);
1045 int XUsbPs_RequestHostResume(const XUsbPs *InstancePtr);
1049 * Functions for managing Endpoints / Transfers
1051 * Implemented in file xusbps_endpoint.c
1053 int XUsbPs_EpBufferSend(XUsbPs *InstancePtr, u8 EpNum,
1054 const u8 *BufferPtr, u32 BufferLen);
1055 int XUsbPs_EpBufferSendWithZLT(XUsbPs *InstancePtr, u8 EpNum,
1056 const u8 *BufferPtr, u32 BufferLen);
1057 int XUsbPs_EpBufferReceive(XUsbPs *InstancePtr, u8 EpNum,
1058 u8 **BufferPtr, u32 *BufferLenPtr, u32 *Handle);
1059 void XUsbPs_EpBufferRelease(u32 Handle);
1061 int XUsbPs_EpSetHandler(XUsbPs *InstancePtr, u8 EpNum, u8 Direction,
1062 XUsbPs_EpHandlerFunc CallBackFunc,
1064 int XUsbPs_EpGetSetupData(XUsbPs *InstancePtr, int EpNum,
1065 XUsbPs_SetupData *SetupDataPtr);
1067 int XUsbPs_EpPrime(XUsbPs *InstancePtr, u8 EpNum, u8 Direction);
1069 int XUsbPs_ReconfigureEp(XUsbPs *InstancePtr, XUsbPs_DeviceConfig *CfgPtr,
1070 int EpNum, unsigned short NewDirection, int DirectionChanged);
1073 * Interrupt handling functions
1075 * Implemented in file xusbps_intr.c
1077 void XUsbPs_IntrHandler(void *InstancePtr);
1079 int XUsbPs_IntrSetHandler(XUsbPs *InstancePtr,
1080 XUsbPs_IntrHandlerFunc CallBackFunc,
1081 void *CallBackRef, u32 Mask);
1083 * Helper functions for static configuration.
1084 * Implemented in xusbps_sinit.c
1086 XUsbPs_Config *XUsbPs_LookupConfig(u16 DeviceId);
1092 #endif /* XUSBPS_H */