2 FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not itcan be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /* Kernel includes. */
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76 #include "FreeRTOS.h"
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80 /* Demo includes. */
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86 /* Hardware library includes. */
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87 #include "hw_types.h"
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88 #include "hw_memmap.h"
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89 #include "hw_ints.h"
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90 #include "hw_ethernet.h"
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91 #include "ethernet.h"
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92 #include "interrupt.h"
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94 #define emacNUM_RX_BUFFERS 5
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95 #define emacFRAM_SIZE_BYTES 2
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96 #define macNEGOTIATE_DELAY 2000
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97 #define macWAIT_SEND_TIME ( 10 )
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99 /* The task that handles the MAC peripheral. This is created at a high
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100 priority and is effectively a deferred interrupt handler. The peripheral
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101 handling is deferred to a task to prevent the entire FIFO having to be read
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102 from within an ISR. */
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103 void vMACHandleTask( void *pvParameters );
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105 /*-----------------------------------------------------------*/
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107 /* The semaphore used to wake the uIP task when data arrives. */
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108 xSemaphoreHandle xEMACSemaphore = NULL;
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110 /* The semaphore used to wake the interrupt handler task. The peripheral
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111 is processed at the task level to prevent the need to read the entire FIFO from
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112 within the ISR itself. */
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113 xSemaphoreHandle xMACInterruptSemaphore = NULL;
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115 /* The buffer used by the uIP stack. In this case the pointer is used to
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116 point to one of the Rx buffers. */
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117 unsigned portCHAR *uip_buf;
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119 /* Buffers into which Rx data is placed. */
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122 unsigned portLONG ulJustForAlignment;
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123 unsigned portCHAR ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ];
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126 /* The length of the data within each of the Rx buffers. */
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127 static unsigned portLONG ulRxLength[ emacNUM_RX_BUFFERS ];
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129 /* Used to keep a track of the number of bytes to transmit. */
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130 static unsigned portLONG ulNextTxSpace;
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132 /*-----------------------------------------------------------*/
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134 portBASE_TYPE vInitEMAC( void )
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136 unsigned long ulTemp;
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137 portBASE_TYPE xReturn;
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139 /* Ensure all interrupts are disabled. */
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140 EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
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142 /* Clear any interrupts that were already pending. */
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143 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
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144 EthernetIntClear( ETH_BASE, ulTemp );
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146 /* Initialise the MAC and connect. */
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147 EthernetInit( ETH_BASE );
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148 EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );
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149 EthernetEnable( ETH_BASE );
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151 /* Mark each Rx buffer as empty. */
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152 for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )
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154 ulRxLength[ ulTemp ] = 0;
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157 /* Create the queue and task used to defer the MAC processing to the
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159 vSemaphoreCreateBinary( xMACInterruptSemaphore );
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160 xSemaphoreTake( xMACInterruptSemaphore, 0 );
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161 xReturn = xTaskCreate( vMACHandleTask, ( signed portCHAR * ) "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
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162 vTaskDelay( macNEGOTIATE_DELAY );
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164 /* We are only interested in Rx interrupts. */
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165 IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );
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166 IntEnable( INT_ETH );
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167 EthernetIntEnable(ETH_BASE, ETH_INT_RX);
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171 /*-----------------------------------------------------------*/
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173 unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
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175 static unsigned long ulNextRxBuffer = 0;
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178 iLen = ulRxLength[ ulNextRxBuffer ];
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182 /* Leave room for the size at the start of the buffer. */
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183 uip_buf = &( uxRxBuffers.ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
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185 ulRxLength[ ulNextRxBuffer ] = 0;
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188 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
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190 ulNextRxBuffer = 0;
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196 /*-----------------------------------------------------------*/
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198 void vInitialiseSend( void )
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200 /* Set the index to the first byte to send - skipping over the size
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204 /*-----------------------------------------------------------*/
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206 void vIncrementTxLength( unsigned portLONG ulLength )
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208 ulNextTxSpace += ulLength;
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210 /*-----------------------------------------------------------*/
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212 void vSendBufferToMAC( void )
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214 unsigned long *pulSource;
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215 unsigned portSHORT * pus;
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216 unsigned portLONG ulNextWord;
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218 /* Locate the data to be send. */
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219 pus = ( unsigned portSHORT * ) uip_buf;
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221 /* Add in the size of the data. */
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223 *pus = ulNextTxSpace;
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225 /* Wait for data to be sent if there is no space immediately. */
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226 while( !EthernetSpaceAvail( ETH_BASE ) )
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228 vTaskDelay( macWAIT_SEND_TIME );
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231 pulSource = ( unsigned portLONG * ) pus;
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233 for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned portLONG ) )
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235 HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;
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240 HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;
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242 /*-----------------------------------------------------------*/
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244 void vEMAC_ISR( void )
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246 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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247 unsigned portLONG ulTemp;
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249 /* Clear the interrupt. */
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250 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
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251 EthernetIntClear( ETH_BASE, ulTemp );
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253 /* Was it an Rx interrupt? */
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254 if( ulTemp & ETH_INT_RX )
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256 xSemaphoreGiveFromISR( xMACInterruptSemaphore, &xHigherPriorityTaskWoken );
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257 EthernetIntDisable( ETH_BASE, ETH_INT_RX );
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260 /* Switch to the uIP task. */
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261 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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263 /*-----------------------------------------------------------*/
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265 void vMACHandleTask( void *pvParameters )
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267 unsigned long i, ulInt;
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268 unsigned portLONG ulLength;
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269 unsigned long *pulBuffer;
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270 static unsigned portLONG ulNextRxBuffer = 0;
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274 /* Wait for something to do. */
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275 xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );
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277 while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )
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279 ulLength = HWREG( ETH_BASE + MAC_O_DATA );
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281 /* Leave room at the start of the buffer for the size. */
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282 pulBuffer = ( unsigned long * ) &( uxRxBuffers.ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
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283 *pulBuffer = ( ulLength >> 16 );
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285 /* Get the size of the data. */
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286 pulBuffer = ( unsigned long * ) &( uxRxBuffers.ucRxBuffers[ ulNextRxBuffer ][ 4 ] );
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287 ulLength &= 0xFFFF;
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293 if( ulLength >= UIP_BUFSIZE )
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295 /* The data won't fit in our buffer. Ensure we don't
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296 try to write into the buffer. */
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300 /* Read out the data into our buffer. */
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301 for( i = 0; i < ulLength; i += sizeof( unsigned portLONG ) )
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303 *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );
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307 /* Store the length of the data into the separate array. */
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308 ulRxLength[ ulNextRxBuffer ] = ulLength;
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310 /* Use the next buffer the next time through. */
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312 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
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314 ulNextRxBuffer = 0;
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317 /* Ensure the uIP task is not blocked as data has arrived. */
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318 xSemaphoreGive( xEMACSemaphore );
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322 EthernetIntEnable( ETH_BASE, ETH_INT_RX );
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