2 * FreeRTOS Kernel V10.0.0
\r
3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
6 * this software and associated documentation files (the "Software"), to deal in
\r
7 * the Software without restriction, including without limitation the rights to
\r
8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
9 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
10 * subject to the following conditions:
\r
12 * The above copyright notice and this permission notice shall be included in all
\r
13 * copies or substantial portions of the Software. If you wish to use our Amazon
\r
14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
\r
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
23 * http://www.FreeRTOS.org
\r
24 * http://aws.amazon.com/freertos
\r
26 * 1 tab == 4 spaces!
\r
29 /* Kernel includes. */
\r
30 #include "FreeRTOS.h"
\r
34 /* Demo includes. */
\r
40 /* Hardware library includes. */
\r
41 #include "hw_types.h"
\r
42 #include "hw_memmap.h"
\r
43 #include "hw_ints.h"
\r
44 #include "hw_ethernet.h"
\r
45 #include "ethernet.h"
\r
46 #include "interrupt.h"
\r
48 #define emacNUM_RX_BUFFERS 5
\r
49 #define emacFRAM_SIZE_BYTES 2
\r
50 #define macNEGOTIATE_DELAY 2000
\r
51 #define macWAIT_SEND_TIME ( 10 )
\r
53 /* The task that handles the MAC peripheral. This is created at a high
\r
54 priority and is effectively a deferred interrupt handler. The peripheral
\r
55 handling is deferred to a task to prevent the entire FIFO having to be read
\r
56 from within an ISR. */
\r
57 void vMACHandleTask( void *pvParameters );
\r
59 /*-----------------------------------------------------------*/
\r
61 /* The semaphore used to wake the uIP task when data arrives. */
\r
62 SemaphoreHandle_t xEMACSemaphore = NULL;
\r
64 /* The semaphore used to wake the interrupt handler task. The peripheral
\r
65 is processed at the task level to prevent the need to read the entire FIFO from
\r
66 within the ISR itself. */
\r
67 SemaphoreHandle_t xMACInterruptSemaphore = NULL;
\r
69 /* The buffer used by the uIP stack. In this case the pointer is used to
\r
70 point to one of the Rx buffers. */
\r
71 unsigned char *uip_buf;
\r
73 /* Buffers into which Rx data is placed. */
\r
74 static unsigned char ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ] __attribute__((aligned(4)));
\r
76 /* The length of the data within each of the Rx buffers. */
\r
77 static unsigned long ulRxLength[ emacNUM_RX_BUFFERS ];
\r
79 /* Used to keep a track of the number of bytes to transmit. */
\r
80 static unsigned long ulNextTxSpace;
\r
82 /*-----------------------------------------------------------*/
\r
84 portBASE_TYPE vInitEMAC( void )
\r
86 unsigned long ulTemp;
\r
87 portBASE_TYPE xReturn;
\r
89 /* Ensure all interrupts are disabled. */
\r
90 EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
\r
92 /* Clear any interrupts that were already pending. */
\r
93 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
\r
94 EthernetIntClear( ETH_BASE, ulTemp );
\r
96 /* Initialise the MAC and connect. */
\r
97 EthernetInit( ETH_BASE );
\r
98 EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );
\r
99 EthernetEnable( ETH_BASE );
\r
101 /* Mark each Rx buffer as empty. */
\r
102 for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )
\r
104 ulRxLength[ ulTemp ] = 0;
\r
107 /* Create the queue and task used to defer the MAC processing to the
\r
109 vSemaphoreCreateBinary( xMACInterruptSemaphore );
\r
110 xSemaphoreTake( xMACInterruptSemaphore, 0 );
\r
111 xReturn = xTaskCreate( vMACHandleTask, "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
\r
112 vTaskDelay( macNEGOTIATE_DELAY );
\r
114 /* We are only interested in Rx interrupts. */
\r
115 IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );
\r
116 IntEnable( INT_ETH );
\r
117 EthernetIntEnable(ETH_BASE, ETH_INT_RX);
\r
121 /*-----------------------------------------------------------*/
\r
123 unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
\r
125 static unsigned long ulNextRxBuffer = 0;
\r
128 iLen = ulRxLength[ ulNextRxBuffer ];
\r
132 /* Leave room for the size at the start of the buffer. */
\r
133 uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
\r
135 ulRxLength[ ulNextRxBuffer ] = 0;
\r
138 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
\r
140 ulNextRxBuffer = 0;
\r
146 /*-----------------------------------------------------------*/
\r
148 void vInitialiseSend( void )
\r
150 /* Set the index to the first byte to send - skipping over the size
\r
154 /*-----------------------------------------------------------*/
\r
156 void vIncrementTxLength( unsigned long ulLength )
\r
158 ulNextTxSpace += ulLength;
\r
160 /*-----------------------------------------------------------*/
\r
162 void vSendBufferToMAC( void )
\r
164 unsigned long *pulSource;
\r
165 unsigned short * pus;
\r
166 unsigned long ulNextWord;
\r
168 /* Locate the data to be send. */
\r
169 pus = ( unsigned short * ) uip_buf;
\r
171 /* Add in the size of the data. */
\r
173 *pus = ulNextTxSpace;
\r
175 /* Wait for data to be sent if there is no space immediately. */
\r
176 while( !EthernetSpaceAvail( ETH_BASE ) )
\r
178 vTaskDelay( macWAIT_SEND_TIME );
\r
181 pulSource = ( unsigned long * ) pus;
\r
183 for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned long ) )
\r
185 HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;
\r
190 HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;
\r
192 /*-----------------------------------------------------------*/
\r
194 void vEMAC_ISR( void )
\r
196 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
197 unsigned long ulTemp;
\r
199 /* Clear the interrupt. */
\r
200 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
\r
201 EthernetIntClear( ETH_BASE, ulTemp );
\r
203 /* Was it an Rx interrupt? */
\r
204 if( ulTemp & ETH_INT_RX )
\r
206 xSemaphoreGiveFromISR( xMACInterruptSemaphore, &xHigherPriorityTaskWoken );
\r
207 EthernetIntDisable( ETH_BASE, ETH_INT_RX );
\r
210 /* Switch to the uIP task. */
\r
211 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
\r
213 /*-----------------------------------------------------------*/
\r
215 void vMACHandleTask( void *pvParameters )
\r
218 unsigned long ulLength, ulInt;
\r
219 unsigned long *pulBuffer;
\r
220 static unsigned long ulNextRxBuffer = 0;
\r
224 /* Wait for something to do. */
\r
225 xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );
\r
227 while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )
\r
229 ulLength = HWREG( ETH_BASE + MAC_O_DATA );
\r
231 /* Leave room at the start of the buffer for the size. */
\r
232 pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
\r
233 *pulBuffer = ( ulLength >> 16 );
\r
235 /* Get the size of the data. */
\r
236 pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );
\r
237 ulLength &= 0xFFFF;
\r
243 if( ulLength >= UIP_BUFSIZE )
\r
245 /* The data won't fit in our buffer. Ensure we don't
\r
246 try to write into the buffer. */
\r
250 /* Read out the data into our buffer. */
\r
251 for( i = 0; i < ulLength; i += sizeof( unsigned long ) )
\r
253 *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );
\r
257 /* Store the length of the data into the separate array. */
\r
258 ulRxLength[ ulNextRxBuffer ] = ulLength;
\r
260 /* Use the next buffer the next time through. */
\r
262 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
\r
264 ulNextRxBuffer = 0;
\r
267 /* Ensure the uIP task is not blocked as data has arrived. */
\r
268 xSemaphoreGive( xEMACSemaphore );
\r
272 EthernetIntEnable( ETH_BASE, ETH_INT_RX );
\r