2 FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /* Originally adapted from file written by Andreas Dannenberg. Supplied with permission. */
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77 /* Kernel includes. */
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78 #include "FreeRTOS.h"
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82 /* Hardware specific includes. */
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83 #include "EthDev_LPC17xx.h"
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85 /* Time to wait between each inspection of the link status. */
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86 #define emacWAIT_FOR_LINK_TO_ESTABLISH ( 500 / portTICK_RATE_MS )
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88 /* Short delay used in several places during the initialisation process. */
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89 #define emacSHORT_DELAY ( 2 )
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91 /* Hardware specific bit definitions. */
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92 #define emacLINK_ESTABLISHED ( 0x0001 )
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93 #define emacFULL_DUPLEX_ENABLED ( 0x0004 )
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94 #define emac10BASE_T_MODE ( 0x0002 )
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95 #define emacPINSEL2_VALUE 0x50150105
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97 /* If no buffers are available, then wait this long before looking again.... */
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98 #define emacBUFFER_WAIT_DELAY ( 3 / portTICK_RATE_MS )
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100 /* ...and don't look more than this many times. */
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101 #define emacBUFFER_WAIT_ATTEMPTS ( 30 )
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103 /* Index to the Tx descriptor that is always used first for every Tx. The second
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104 descriptor is then used to re-send in order to speed up the uIP Tx process. */
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105 #define emacTX_DESC_INDEX ( 0 )
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107 #define PCONP_PCENET 0x40000000
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108 /*-----------------------------------------------------------*/
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111 * Configure both the Rx and Tx descriptors during the init process.
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113 static void prvInitDescriptors( void );
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116 * Setup the IO and peripherals required for Ethernet communication.
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118 static void prvSetupEMACHardware( void );
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121 * Control the auto negotiate process.
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123 static void prvConfigurePHY( void );
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126 * Wait for a link to be established, then setup the PHY according to the link
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129 static long prvSetupLinkStatus( void );
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132 * Search the pool of buffers to find one that is free. If a buffer is found
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133 * mark it as in use before returning its address.
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135 static unsigned char *prvGetNextBuffer( void );
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138 * Return an allocated buffer to the pool of free buffers.
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140 static void prvReturnBuffer( unsigned char *pucBuffer );
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143 * Send lValue to the lPhyReg within the PHY.
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145 static long prvWritePHY( long lPhyReg, long lValue );
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148 * Read a value from ucPhyReg within the PHY. *plStatus will be set to
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149 * pdFALSE if there is an error.
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151 static unsigned short prvReadPHY( unsigned char ucPhyReg, long *plStatus );
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153 /*-----------------------------------------------------------*/
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155 /* The semaphore used to wake the uIP task when data arrives. */
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156 extern xSemaphoreHandle xEMACSemaphore;
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158 /* Each ucBufferInUse index corresponds to a position in the pool of buffers.
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159 If the index contains a 1 then the buffer within pool is in use, if it
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160 contains a 0 then the buffer is free. */
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161 static unsigned char ucBufferInUse[ ETH_NUM_BUFFERS ] = { pdFALSE };
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163 /* The uip_buffer is not a fixed array, but instead gets pointed to the buffers
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164 allocated within this file. */
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165 unsigned char * uip_buf;
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167 /* Store the length of the data being sent so the data can be sent twice. The
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168 value will be set back to 0 once the data has been sent twice. */
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169 static unsigned short usSendLen = 0;
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171 /*-----------------------------------------------------------*/
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173 long lEMACInit( void )
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175 long lReturn = pdPASS;
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176 unsigned long ulID1, ulID2;
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178 /* Reset peripherals, configure port pins and registers. */
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179 prvSetupEMACHardware();
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181 /* Check the PHY part number is as expected. */
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182 ulID1 = prvReadPHY( PHY_REG_IDR1, &lReturn );
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183 ulID2 = prvReadPHY( PHY_REG_IDR2, &lReturn );
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184 if( ( (ulID1 << 16UL ) | ( ulID2 & 0xFFF0UL ) ) == DP83848C_ID )
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186 /* Set the Ethernet MAC Address registers */
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187 LPC_EMAC->SA0 = ( configMAC_ADDR0 << 8 ) | configMAC_ADDR1;
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188 LPC_EMAC->SA1 = ( configMAC_ADDR2 << 8 ) | configMAC_ADDR3;
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189 LPC_EMAC->SA2 = ( configMAC_ADDR4 << 8 ) | configMAC_ADDR5;
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191 /* Initialize Tx and Rx DMA Descriptors */
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192 prvInitDescriptors();
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194 /* Receive broadcast and perfect match packets */
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195 LPC_EMAC->RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
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197 /* Setup the PHY. */
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205 /* Check the link status. */
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206 if( lReturn == pdPASS )
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208 lReturn = prvSetupLinkStatus();
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211 if( lReturn == pdPASS )
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213 /* Initialise uip_buf to ensure it points somewhere valid. */
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214 uip_buf = prvGetNextBuffer();
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216 /* Reset all interrupts */
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217 LPC_EMAC->IntClear = ( INT_RX_OVERRUN | INT_RX_ERR | INT_RX_FIN | INT_RX_DONE | INT_TX_UNDERRUN | INT_TX_ERR | INT_TX_FIN | INT_TX_DONE | INT_SOFT_INT | INT_WAKEUP );
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219 /* Enable receive and transmit mode of MAC Ethernet core */
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220 LPC_EMAC->Command |= ( CR_RX_EN | CR_TX_EN );
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221 LPC_EMAC->MAC1 |= MAC1_REC_EN;
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226 /*-----------------------------------------------------------*/
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228 static unsigned char *prvGetNextBuffer( void )
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231 unsigned char *pucReturn = NULL;
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232 unsigned long ulAttempts = 0;
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234 while( pucReturn == NULL )
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236 /* Look through the buffers to find one that is not in use by
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238 for( x = 0; x < ETH_NUM_BUFFERS; x++ )
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240 if( ucBufferInUse[ x ] == pdFALSE )
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242 ucBufferInUse[ x ] = pdTRUE;
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243 pucReturn = ( unsigned char * ) ETH_BUF( x );
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248 /* Was a buffer found? */
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249 if( pucReturn == NULL )
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253 if( ulAttempts >= emacBUFFER_WAIT_ATTEMPTS )
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258 /* Wait then look again. */
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259 vTaskDelay( emacBUFFER_WAIT_DELAY );
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265 /*-----------------------------------------------------------*/
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267 static void prvInitDescriptors( void )
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269 long x, lNextBuffer = 0;
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271 for( x = 0; x < NUM_RX_FRAG; x++ )
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273 /* Allocate the next Ethernet buffer to this descriptor. */
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274 RX_DESC_PACKET( x ) = ETH_BUF( lNextBuffer );
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275 RX_DESC_CTRL( x ) = RCTRL_INT | ( ETH_FRAG_SIZE - 1 );
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276 RX_STAT_INFO( x ) = 0;
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277 RX_STAT_HASHCRC( x ) = 0;
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279 /* The Ethernet buffer is now in use. */
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280 ucBufferInUse[ lNextBuffer ] = pdTRUE;
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284 /* Set EMAC Receive Descriptor Registers. */
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285 LPC_EMAC->RxDescriptor = RX_DESC_BASE;
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286 LPC_EMAC->RxStatus = RX_STAT_BASE;
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287 LPC_EMAC->RxDescriptorNumber = NUM_RX_FRAG - 1;
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289 /* Rx Descriptors Point to 0 */
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290 LPC_EMAC->RxConsumeIndex = 0;
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292 /* A buffer is not allocated to the Tx descriptors until they are actually
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294 for( x = 0; x < NUM_TX_FRAG; x++ )
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296 TX_DESC_PACKET( x ) = ( unsigned long ) NULL;
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297 TX_DESC_CTRL( x ) = 0;
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298 TX_STAT_INFO( x ) = 0;
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301 /* Set EMAC Transmit Descriptor Registers. */
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302 LPC_EMAC->TxDescriptor = TX_DESC_BASE;
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303 LPC_EMAC->TxStatus = TX_STAT_BASE;
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304 LPC_EMAC->TxDescriptorNumber = NUM_TX_FRAG - 1;
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306 /* Tx Descriptors Point to 0 */
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307 LPC_EMAC->TxProduceIndex = 0;
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309 /*-----------------------------------------------------------*/
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311 static void prvSetupEMACHardware( void )
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316 /* Enable P1 Ethernet Pins. */
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317 LPC_PINCON->PINSEL2 = emacPINSEL2_VALUE;
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318 LPC_PINCON->PINSEL3 = ( LPC_PINCON->PINSEL3 & ~0x0000000F ) | 0x00000005;
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320 /* Power Up the EMAC controller. */
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321 LPC_SC->PCONP |= PCONP_PCENET;
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322 vTaskDelay( emacSHORT_DELAY );
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324 /* Reset all EMAC internal modules. */
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325 LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
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326 LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
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328 /* A short delay after reset. */
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329 vTaskDelay( emacSHORT_DELAY );
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331 /* Initialize MAC control registers. */
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332 LPC_EMAC->MAC1 = MAC1_PASS_ALL;
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333 LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
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334 LPC_EMAC->MAXF = ETH_MAX_FLEN;
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335 LPC_EMAC->CLRT = CLRT_DEF;
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336 LPC_EMAC->IPGR = IPGR_DEF;
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338 /* Enable Reduced MII interface. */
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339 LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
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341 /* Reset Reduced MII Logic. */
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342 LPC_EMAC->SUPP = SUPP_RES_RMII;
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343 vTaskDelay( emacSHORT_DELAY );
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344 LPC_EMAC->SUPP = 0;
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346 /* Put the PHY in reset mode */
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347 prvWritePHY( PHY_REG_BMCR, MCFG_RES_MII );
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348 prvWritePHY( PHY_REG_BMCR, MCFG_RES_MII );
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350 /* Wait for hardware reset to end. */
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351 for( x = 0; x < 100; x++ )
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353 vTaskDelay( emacSHORT_DELAY * 5 );
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354 us = prvReadPHY( PHY_REG_BMCR, &lDummy );
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355 if( !( us & MCFG_RES_MII ) )
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357 /* Reset complete */
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362 /*-----------------------------------------------------------*/
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364 static void prvConfigurePHY( void )
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369 /* Auto negotiate the configuration. */
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370 if( prvWritePHY( PHY_REG_BMCR, PHY_AUTO_NEG ) )
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372 vTaskDelay( emacSHORT_DELAY * 5 );
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374 for( x = 0; x < 10; x++ )
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376 us = prvReadPHY( PHY_REG_BMSR, &lDummy );
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378 if( us & PHY_AUTO_NEG_COMPLETE )
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383 vTaskDelay( emacWAIT_FOR_LINK_TO_ESTABLISH );
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387 /*-----------------------------------------------------------*/
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389 static long prvSetupLinkStatus( void )
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391 long lReturn = pdFAIL, x;
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392 unsigned short usLinkStatus;
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394 /* Wait with timeout for the link to be established. */
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395 for( x = 0; x < 10; x++ )
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397 usLinkStatus = prvReadPHY( PHY_REG_STS, &lReturn );
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398 if( usLinkStatus & emacLINK_ESTABLISHED )
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400 /* Link is established. */
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405 vTaskDelay( emacWAIT_FOR_LINK_TO_ESTABLISH );
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408 if( lReturn == pdPASS )
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410 /* Configure Full/Half Duplex mode. */
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411 if( usLinkStatus & emacFULL_DUPLEX_ENABLED )
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413 /* Full duplex is enabled. */
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414 LPC_EMAC->MAC2 |= MAC2_FULL_DUP;
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415 LPC_EMAC->Command |= CR_FULL_DUP;
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416 LPC_EMAC->IPGT = IPGT_FULL_DUP;
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420 /* Half duplex mode. */
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421 LPC_EMAC->IPGT = IPGT_HALF_DUP;
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424 /* Configure 100MBit/10MBit mode. */
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425 if( usLinkStatus & emac10BASE_T_MODE )
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428 LPC_EMAC->SUPP = 0;
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432 /* 100MBit mode. */
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433 LPC_EMAC->SUPP = SUPP_SPEED;
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439 /*-----------------------------------------------------------*/
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441 static void prvReturnBuffer( unsigned char *pucBuffer )
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445 /* Return a buffer to the pool of free buffers. */
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446 for( ul = 0; ul < ETH_NUM_BUFFERS; ul++ )
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448 if( ETH_BUF( ul ) == ( unsigned long ) pucBuffer )
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450 ucBufferInUse[ ul ] = pdFALSE;
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455 /*-----------------------------------------------------------*/
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457 unsigned long ulGetEMACRxData( void )
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459 unsigned long ulLen = 0;
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462 if( LPC_EMAC->RxProduceIndex != LPC_EMAC->RxConsumeIndex )
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464 /* Mark the current buffer as free as uip_buf is going to be set to
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465 the buffer that contains the received data. */
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466 prvReturnBuffer( uip_buf );
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468 ulLen = ( RX_STAT_INFO( LPC_EMAC->RxConsumeIndex ) & RINFO_SIZE ) - 3;
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469 uip_buf = ( unsigned char * ) RX_DESC_PACKET( LPC_EMAC->RxConsumeIndex );
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471 /* Allocate a new buffer to the descriptor. */
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472 RX_DESC_PACKET( LPC_EMAC->RxConsumeIndex ) = ( unsigned long ) prvGetNextBuffer();
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474 /* Move the consume index onto the next position, ensuring it wraps to
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475 the beginning at the appropriate place. */
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476 lIndex = LPC_EMAC->RxConsumeIndex;
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479 if( lIndex >= NUM_RX_FRAG )
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484 LPC_EMAC->RxConsumeIndex = lIndex;
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489 /*-----------------------------------------------------------*/
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491 void vSendEMACTxData( unsigned short usTxDataLen )
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493 unsigned long ulAttempts = 0UL;
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495 /* Check to see if the Tx descriptor is free, indicated by its buffer being
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497 while( TX_DESC_PACKET( emacTX_DESC_INDEX ) != ( unsigned long ) NULL )
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499 /* Wait for the Tx descriptor to become available. */
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500 vTaskDelay( emacBUFFER_WAIT_DELAY );
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503 if( ulAttempts > emacBUFFER_WAIT_ATTEMPTS )
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505 /* Something has gone wrong as the Tx descriptor is still in use.
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506 Clear it down manually, the data it was sending will probably be
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508 prvReturnBuffer( ( unsigned char * ) TX_DESC_PACKET( emacTX_DESC_INDEX ) );
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513 /* Setup the Tx descriptor for transmission. Remember the length of the
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514 data being sent so the second descriptor can be used to send it again from
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516 usSendLen = usTxDataLen;
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517 TX_DESC_PACKET( emacTX_DESC_INDEX ) = ( unsigned long ) uip_buf;
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518 TX_DESC_CTRL( emacTX_DESC_INDEX ) = ( usTxDataLen | TCTRL_LAST | TCTRL_INT );
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519 LPC_EMAC->TxProduceIndex = ( emacTX_DESC_INDEX + 1 );
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521 /* uip_buf is being sent by the Tx descriptor. Allocate a new buffer. */
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522 uip_buf = prvGetNextBuffer();
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524 /*-----------------------------------------------------------*/
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526 static long prvWritePHY( long lPhyReg, long lValue )
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528 const long lMaxTime = 10;
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531 LPC_EMAC->MADR = DP83848C_DEF_ADR | lPhyReg;
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532 LPC_EMAC->MWTD = lValue;
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535 for( x = 0; x < lMaxTime; x++ )
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537 if( ( LPC_EMAC->MIND & MIND_BUSY ) == 0 )
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539 /* Operation has finished. */
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543 vTaskDelay( emacSHORT_DELAY );
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555 /*-----------------------------------------------------------*/
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557 static unsigned short prvReadPHY( unsigned char ucPhyReg, long *plStatus )
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560 const long lMaxTime = 10;
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562 LPC_EMAC->MADR = DP83848C_DEF_ADR | ucPhyReg;
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563 LPC_EMAC->MCMD = MCMD_READ;
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565 for( x = 0; x < lMaxTime; x++ )
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567 /* Operation has finished. */
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568 if( ( LPC_EMAC->MIND & MIND_BUSY ) == 0 )
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573 vTaskDelay( emacSHORT_DELAY );
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576 LPC_EMAC->MCMD = 0;
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578 if( x >= lMaxTime )
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580 *plStatus = pdFAIL;
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583 return( LPC_EMAC->MRDD );
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585 /*-----------------------------------------------------------*/
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587 void vEMAC_ISR( void )
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589 unsigned long ulStatus;
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590 long lHigherPriorityTaskWoken = pdFALSE;
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592 ulStatus = LPC_EMAC->IntStatus;
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594 /* Clear the interrupt. */
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595 LPC_EMAC->IntClear = ulStatus;
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597 if( ulStatus & INT_RX_DONE )
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599 /* Ensure the uIP task is not blocked as data has arrived. */
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600 xSemaphoreGiveFromISR( xEMACSemaphore, &lHigherPriorityTaskWoken );
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603 if( ulStatus & INT_TX_DONE )
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605 if( usSendLen > 0 )
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607 /* Send the data again, using the second descriptor. As there are
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608 only two descriptors the index is set back to 0. */
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609 TX_DESC_PACKET( ( emacTX_DESC_INDEX + 1 ) ) = TX_DESC_PACKET( emacTX_DESC_INDEX );
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610 TX_DESC_CTRL( ( emacTX_DESC_INDEX + 1 ) ) = ( usSendLen | TCTRL_LAST | TCTRL_INT );
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611 LPC_EMAC->TxProduceIndex = ( emacTX_DESC_INDEX );
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613 /* This is the second Tx so set usSendLen to 0 to indicate that the
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614 Tx descriptors will be free again. */
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619 /* The Tx buffer is no longer required. */
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620 prvReturnBuffer( ( unsigned char * ) TX_DESC_PACKET( emacTX_DESC_INDEX ) );
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621 TX_DESC_PACKET( emacTX_DESC_INDEX ) = ( unsigned long ) NULL;
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625 portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );
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