2 FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /* Originally adapted from file written by Andreas Dannenberg. Supplied with permission. */
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72 /* Kernel includes. */
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73 #include "FreeRTOS.h"
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77 /* Hardware specific includes. */
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78 #include "EthDev_LPC17xx.h"
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80 /* Time to wait between each inspection of the link status. */
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81 #define emacWAIT_FOR_LINK_TO_ESTABLISH ( 500 / portTICK_PERIOD_MS )
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83 /* Short delay used in several places during the initialisation process. */
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84 #define emacSHORT_DELAY ( 2 )
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86 /* Hardware specific bit definitions. */
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87 #define emacLINK_ESTABLISHED ( 0x0020)
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88 #define emacFULL_DUPLEX_ENABLED ( 0x0010 )
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89 #define emac10BASE_T_MODE ( 0x0004 )
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90 #define emacPINSEL2_VALUE ( 0x50150105 )
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91 #define emacDIV_44 ( 0x28 )
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93 /* If no buffers are available, then wait this long before looking again.... */
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94 #define emacBUFFER_WAIT_DELAY ( 3 / portTICK_PERIOD_MS )
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96 /* ...and don't look more than this many times. */
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97 #define emacBUFFER_WAIT_ATTEMPTS ( 30 )
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99 /* Index to the Tx descriptor that is always used first for every Tx. The second
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100 descriptor is then used to re-send in order to speed up the uIP Tx process. */
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101 #define emacTX_DESC_INDEX ( 0 )
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103 /*-----------------------------------------------------------*/
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106 * Configure both the Rx and Tx descriptors during the init process.
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108 static void prvInitDescriptors( void );
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111 * Setup the IO and peripherals required for Ethernet communication.
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113 static void prvSetupEMACHardware( void );
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116 * Control the auto negotiate process.
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118 static void prvConfigurePHY( void );
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121 * Wait for a link to be established, then setup the PHY according to the link
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124 static long prvSetupLinkStatus( void );
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127 * Search the pool of buffers to find one that is free. If a buffer is found
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128 * mark it as in use before returning its address.
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130 static unsigned char *prvGetNextBuffer( void );
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133 * Return an allocated buffer to the pool of free buffers.
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135 static void prvReturnBuffer( unsigned char *pucBuffer );
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138 * Send lValue to the lPhyReg within the PHY.
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140 static long prvWritePHY( long lPhyReg, long lValue );
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143 * Read a value from ucPhyReg within the PHY. *plStatus will be set to
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144 * pdFALSE if there is an error.
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146 static unsigned short prvReadPHY( unsigned char ucPhyReg, long *plStatus );
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148 /*-----------------------------------------------------------*/
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150 /* The semaphore used to wake the uIP task when data arrives. */
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151 extern SemaphoreHandle_t xEMACSemaphore;
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153 /* Each ucBufferInUse index corresponds to a position in the pool of buffers.
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154 If the index contains a 1 then the buffer within pool is in use, if it
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155 contains a 0 then the buffer is free. */
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156 static unsigned char ucBufferInUse[ ETH_NUM_BUFFERS ] = { pdFALSE };
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158 /* The uip_buffer is not a fixed array, but instead gets pointed to the buffers
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159 allocated within this file. */
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160 unsigned char * uip_buf;
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162 /* Store the length of the data being sent so the data can be sent twice. The
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163 value will be set back to 0 once the data has been sent twice. */
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164 static unsigned short usSendLen = 0;
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166 /*-----------------------------------------------------------*/
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168 long lEMACInit( void )
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170 long lReturn = pdPASS;
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171 unsigned long ulID1, ulID2;
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173 /* Reset peripherals, configure port pins and registers. */
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174 prvSetupEMACHardware();
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176 /* Check the PHY part number is as expected. */
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177 ulID1 = prvReadPHY( PHY_REG_IDR1, &lReturn );
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178 ulID2 = prvReadPHY( PHY_REG_IDR2, &lReturn );
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179 if( ( (ulID1 << 16UL ) | ( ulID2 & 0xFFFFUL ) ) == KS8721_ID )
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181 /* Set the Ethernet MAC Address registers */
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182 EMAC->SA0 = ( configMAC_ADDR0 << 8 ) | configMAC_ADDR1;
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183 EMAC->SA1 = ( configMAC_ADDR2 << 8 ) | configMAC_ADDR3;
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184 EMAC->SA2 = ( configMAC_ADDR4 << 8 ) | configMAC_ADDR5;
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186 /* Initialize Tx and Rx DMA Descriptors */
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187 prvInitDescriptors();
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189 /* Receive broadcast and perfect match packets */
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190 EMAC->RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
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192 /* Setup the PHY. */
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200 /* Check the link status. */
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201 if( lReturn == pdPASS )
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203 lReturn = prvSetupLinkStatus();
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206 if( lReturn == pdPASS )
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208 /* Initialise uip_buf to ensure it points somewhere valid. */
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209 uip_buf = prvGetNextBuffer();
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211 /* Reset all interrupts */
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212 EMAC->IntClear = ( INT_RX_OVERRUN | INT_RX_ERR | INT_RX_FIN | INT_RX_DONE | INT_TX_UNDERRUN | INT_TX_ERR | INT_TX_FIN | INT_TX_DONE | INT_SOFT_INT | INT_WAKEUP );
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214 /* Enable receive and transmit mode of MAC Ethernet core */
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215 EMAC->Command |= ( CR_RX_EN | CR_TX_EN );
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216 EMAC->MAC1 |= MAC1_REC_EN;
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221 /*-----------------------------------------------------------*/
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223 static unsigned char *prvGetNextBuffer( void )
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226 unsigned char *pucReturn = NULL;
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227 unsigned long ulAttempts = 0;
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229 while( pucReturn == NULL )
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231 /* Look through the buffers to find one that is not in use by
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233 for( x = 0; x < ETH_NUM_BUFFERS; x++ )
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235 if( ucBufferInUse[ x ] == pdFALSE )
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237 ucBufferInUse[ x ] = pdTRUE;
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238 pucReturn = ( unsigned char * ) ETH_BUF( x );
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243 /* Was a buffer found? */
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244 if( pucReturn == NULL )
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248 if( ulAttempts >= emacBUFFER_WAIT_ATTEMPTS )
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253 /* Wait then look again. */
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254 vTaskDelay( emacBUFFER_WAIT_DELAY );
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260 /*-----------------------------------------------------------*/
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262 static void prvInitDescriptors( void )
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264 long x, lNextBuffer = 0;
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266 for( x = 0; x < NUM_RX_FRAG; x++ )
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268 /* Allocate the next Ethernet buffer to this descriptor. */
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269 RX_DESC_PACKET( x ) = ETH_BUF( lNextBuffer );
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270 RX_DESC_CTRL( x ) = RCTRL_INT | ( ETH_FRAG_SIZE - 1 );
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271 RX_STAT_INFO( x ) = 0;
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272 RX_STAT_HASHCRC( x ) = 0;
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274 /* The Ethernet buffer is now in use. */
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275 ucBufferInUse[ lNextBuffer ] = pdTRUE;
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279 /* Set EMAC Receive Descriptor Registers. */
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280 EMAC->RxDescriptor = RX_DESC_BASE;
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281 EMAC->RxStatus = RX_STAT_BASE;
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282 EMAC->RxDescriptorNumber = NUM_RX_FRAG - 1;
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284 /* Rx Descriptors Point to 0 */
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285 EMAC->RxConsumeIndex = 0;
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287 /* A buffer is not allocated to the Tx descriptors until they are actually
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289 for( x = 0; x < NUM_TX_FRAG; x++ )
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291 TX_DESC_PACKET( x ) = ( unsigned long ) NULL;
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292 TX_DESC_CTRL( x ) = 0;
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293 TX_STAT_INFO( x ) = 0;
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296 /* Set EMAC Transmit Descriptor Registers. */
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297 EMAC->TxDescriptor = TX_DESC_BASE;
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298 EMAC->TxStatus = TX_STAT_BASE;
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299 EMAC->TxDescriptorNumber = NUM_TX_FRAG - 1;
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301 /* Tx Descriptors Point to 0 */
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302 EMAC->TxProduceIndex = 0;
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304 /*-----------------------------------------------------------*/
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306 static void prvSetupEMACHardware( void )
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311 /* Enable P1 Ethernet Pins. */
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312 PINCON->PINSEL2 = emacPINSEL2_VALUE;
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313 PINCON->PINSEL3 = ( PINCON->PINSEL3 & ~0x0000000F ) | 0x00000005;
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315 /* Power Up the EMAC controller. */
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316 SC->PCONP |= PCONP_PCENET;
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317 vTaskDelay( emacSHORT_DELAY );
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319 /* Reset all EMAC internal modules. */
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320 EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
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321 EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
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323 /* A short delay after reset. */
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324 vTaskDelay( emacSHORT_DELAY );
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326 /* Initialize MAC control registers. */
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327 EMAC->MAC1 = MAC1_PASS_ALL;
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328 EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
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329 EMAC->MAXF = ETH_MAX_FLEN;
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330 EMAC->CLRT = CLRT_DEF;
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331 EMAC->IPGR = IPGR_DEF;
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332 EMAC->MCFG = emacDIV_44;
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334 /* Enable Reduced MII interface. */
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335 EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
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337 /* Reset Reduced MII Logic. */
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338 EMAC->SUPP = SUPP_RES_RMII;
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339 vTaskDelay( emacSHORT_DELAY );
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342 /* Put the PHY in reset mode */
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343 prvWritePHY( PHY_REG_BMCR, MCFG_RES_MII );
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344 prvWritePHY( PHY_REG_BMCR, MCFG_RES_MII );
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346 /* Wait for hardware reset to end. */
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347 for( x = 0; x < 100; x++ )
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349 vTaskDelay( emacSHORT_DELAY * 5 );
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350 us = prvReadPHY( PHY_REG_BMCR, &lDummy );
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351 if( !( us & MCFG_RES_MII ) )
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353 /* Reset complete */
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358 /*-----------------------------------------------------------*/
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360 static void prvConfigurePHY( void )
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365 /* Auto negotiate the configuration. */
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366 if( prvWritePHY( PHY_REG_BMCR, PHY_AUTO_NEG ) )
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368 vTaskDelay( emacSHORT_DELAY * 5 );
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370 for( x = 0; x < 10; x++ )
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372 us = prvReadPHY( PHY_REG_BMSR, &lDummy );
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374 if( us & PHY_AUTO_NEG_COMPLETE )
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379 vTaskDelay( emacWAIT_FOR_LINK_TO_ESTABLISH );
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383 /*-----------------------------------------------------------*/
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385 static long prvSetupLinkStatus( void )
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387 long lReturn = pdFAIL, x;
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388 unsigned short usLinkStatus;
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390 /* Wait with timeout for the link to be established. */
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391 for( x = 0; x < 10; x++ )
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393 usLinkStatus = prvReadPHY( PHY_CTRLER, &lReturn );
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394 if( usLinkStatus != 0x00 )
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396 /* Link is established. */
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401 vTaskDelay( emacWAIT_FOR_LINK_TO_ESTABLISH );
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404 if( lReturn == pdPASS )
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406 /* Configure Full/Half Duplex mode. */
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407 if( usLinkStatus & emacFULL_DUPLEX_ENABLED )
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409 /* Full duplex is enabled. */
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410 EMAC->MAC2 |= MAC2_FULL_DUP;
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411 EMAC->Command |= CR_FULL_DUP;
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412 EMAC->IPGT = IPGT_FULL_DUP;
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416 /* Half duplex mode. */
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417 EMAC->IPGT = IPGT_HALF_DUP;
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420 /* Configure 100MBit/10MBit mode. */
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421 if( usLinkStatus & emac10BASE_T_MODE )
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428 /* 100MBit mode. */
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429 EMAC->SUPP = SUPP_SPEED;
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435 /*-----------------------------------------------------------*/
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437 static void prvReturnBuffer( unsigned char *pucBuffer )
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441 /* Return a buffer to the pool of free buffers. */
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442 for( ul = 0; ul < ETH_NUM_BUFFERS; ul++ )
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444 if( ETH_BUF( ul ) == ( unsigned long ) pucBuffer )
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446 ucBufferInUse[ ul ] = pdFALSE;
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451 /*-----------------------------------------------------------*/
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453 unsigned long ulGetEMACRxData( void )
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455 unsigned long ulLen = 0;
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458 if( EMAC->RxProduceIndex != EMAC->RxConsumeIndex )
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460 /* Mark the current buffer as free as uip_buf is going to be set to
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461 the buffer that contains the received data. */
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462 prvReturnBuffer( uip_buf );
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464 ulLen = ( RX_STAT_INFO( EMAC->RxConsumeIndex ) & RINFO_SIZE ) - 3;
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465 uip_buf = ( unsigned char * ) RX_DESC_PACKET( EMAC->RxConsumeIndex );
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467 /* Allocate a new buffer to the descriptor. */
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468 RX_DESC_PACKET( EMAC->RxConsumeIndex ) = ( unsigned long ) prvGetNextBuffer();
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470 /* Move the consume index onto the next position, ensuring it wraps to
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471 the beginning at the appropriate place. */
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472 lIndex = EMAC->RxConsumeIndex;
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475 if( lIndex >= NUM_RX_FRAG )
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480 EMAC->RxConsumeIndex = lIndex;
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485 /*-----------------------------------------------------------*/
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487 void vSendEMACTxData( unsigned short usTxDataLen )
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489 unsigned long ulAttempts = 0UL;
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491 /* Check to see if the Tx descriptor is free, indicated by its buffer being
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493 while( TX_DESC_PACKET( emacTX_DESC_INDEX ) != ( unsigned long ) NULL )
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495 /* Wait for the Tx descriptor to become available. */
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496 vTaskDelay( emacBUFFER_WAIT_DELAY );
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499 if( ulAttempts > emacBUFFER_WAIT_ATTEMPTS )
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501 /* Something has gone wrong as the Tx descriptor is still in use.
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502 Clear it down manually, the data it was sending will probably be
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504 prvReturnBuffer( ( unsigned char * ) TX_DESC_PACKET( emacTX_DESC_INDEX ) );
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509 /* Setup the Tx descriptor for transmission. Remember the length of the
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510 data being sent so the second descriptor can be used to send it again from
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512 usSendLen = usTxDataLen;
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513 TX_DESC_PACKET( emacTX_DESC_INDEX ) = ( unsigned long ) uip_buf;
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514 TX_DESC_CTRL( emacTX_DESC_INDEX ) = ( usTxDataLen | TCTRL_LAST | TCTRL_INT );
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515 EMAC->TxProduceIndex = ( emacTX_DESC_INDEX + 1 );
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517 /* uip_buf is being sent by the Tx descriptor. Allocate a new buffer. */
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518 uip_buf = prvGetNextBuffer();
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520 /*-----------------------------------------------------------*/
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522 static long prvWritePHY( long lPhyReg, long lValue )
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524 const long lMaxTime = 10;
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527 EMAC->MADR = KS8721_DEF_ADR | lPhyReg;
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528 EMAC->MWTD = lValue;
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531 for( x = 0; x < lMaxTime; x++ )
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533 if( ( EMAC->MIND & MIND_BUSY ) == 0 )
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535 /* Operation has finished. */
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539 vTaskDelay( emacSHORT_DELAY );
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551 /*-----------------------------------------------------------*/
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553 static unsigned short prvReadPHY( unsigned char ucPhyReg, long *plStatus )
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556 const long lMaxTime = 10;
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558 EMAC->MADR = KS8721_DEF_ADR | ucPhyReg;
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559 EMAC->MCMD = MCMD_READ;
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561 for( x = 0; x < lMaxTime; x++ )
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563 /* Operation has finished. */
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564 if( ( EMAC->MIND & MIND_BUSY ) == 0 )
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569 vTaskDelay( emacSHORT_DELAY );
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574 if( x >= lMaxTime )
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576 *plStatus = pdFAIL;
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579 return( EMAC->MRDD );
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581 /*-----------------------------------------------------------*/
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583 void vEMAC_ISR( void )
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585 unsigned long ulStatus;
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586 long lHigherPriorityTaskWoken = pdFALSE;
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588 ulStatus = EMAC->IntStatus;
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590 /* Clear the interrupt. */
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591 EMAC->IntClear = ulStatus;
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593 if( ulStatus & INT_RX_DONE )
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595 /* Ensure the uIP task is not blocked as data has arrived. */
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596 xSemaphoreGiveFromISR( xEMACSemaphore, &lHigherPriorityTaskWoken );
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599 if( ulStatus & INT_TX_DONE )
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601 if( usSendLen > 0 )
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603 /* Send the data again, using the second descriptor. As there are
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604 only two descriptors the index is set back to 0. */
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605 TX_DESC_PACKET( ( emacTX_DESC_INDEX + 1 ) ) = TX_DESC_PACKET( emacTX_DESC_INDEX );
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606 TX_DESC_CTRL( ( emacTX_DESC_INDEX + 1 ) ) = ( usSendLen | TCTRL_LAST | TCTRL_INT );
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607 EMAC->TxProduceIndex = ( emacTX_DESC_INDEX );
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609 /* This is the second Tx so set usSendLen to 0 to indicate that the
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610 Tx descriptors will be free again. */
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615 /* The Tx buffer is no longer required. */
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616 prvReturnBuffer( ( unsigned char * ) TX_DESC_PACKET( emacTX_DESC_INDEX ) );
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617 TX_DESC_PACKET( emacTX_DESC_INDEX ) = ( unsigned long ) NULL;
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621 portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );
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