4 * \brief SAM D20 System Interrupt Driver
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6 * Copyright (C) 2013 Atmel Corporation. All rights reserved.
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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22 * 3. The name of Atmel may not be used to endorse or promote products derived
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23 * from this software without specific prior written permission.
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25 * 4. This software may only be redistributed and used in connection with an
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26 * Atmel microcontroller product.
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28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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43 #include "system_interrupt.h"
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46 * \brief Check if a interrupt line is pending
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48 * Checks if the requested interrupt vector is pending.
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50 * \param[in] vector Interrupt vector number to check
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52 * \returns A boolean identifying if the requested interrupt vector is pending.
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54 * \retval true Specified interrupt vector is pending
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55 * \retval false Specified interrupt vector is not pending
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58 bool system_interrupt_is_pending(
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59 const enum system_interrupt_vector vector)
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63 if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
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64 result = ((NVIC->ISPR[0] & (1 << vector)) != 0);
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65 } else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
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66 result = ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0);
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76 * \brief Set a interrupt vector as pending
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78 * Set the requested interrupt vector as pending (i.e issues a software
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79 * interrupt request for the specified vector). The software handler will be
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80 * handled (if enabled) in a priority order based on vector number and
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81 * configured priority settings.
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83 * \param[in] vector Interrupt vector number which is set as pending
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85 * \returns Status code identifying if the vector was successfully set as
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88 * \retval STATUS_OK If no error was detected
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89 * \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
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91 enum status_code system_interrupt_set_pending(
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92 const enum system_interrupt_vector vector)
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94 enum status_code status = STATUS_OK;
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96 if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
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97 NVIC->ISPR[0] = (1 << vector);
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98 } else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
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99 /* Note: Because NMI has highest priority it will be executed
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100 * immediately after it has been set pending */
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101 SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk;
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102 } else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
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103 SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;
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105 /* The user want to set something unsupported as pending */
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107 status = STATUS_ERR_INVALID_ARG;
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114 * \brief Clear pending interrupt vector
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116 * Clear a pending interrupt vector, so the software handler is not executed.
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118 * \param[in] vector Interrupt vector number to clear
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120 * \returns A status code identifying if the interrupt pending state was
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121 * successfully cleared.
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123 * \retval STATUS_OK If no error was detected
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124 * \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
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126 enum status_code system_interrupt_clear_pending(
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127 const enum system_interrupt_vector vector)
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129 enum status_code status = STATUS_OK;
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131 if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
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132 NVIC->ICPR[0] = (1 << vector);
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133 } else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
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134 /* Note: Clearing of NMI pending interrupts does not make sense and is
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135 * not supported by the device, as it has the highest priority and will
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136 * always be executed at the moment it is set */
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137 return STATUS_ERR_INVALID_ARG;
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138 } else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
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139 SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
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142 status = STATUS_ERR_INVALID_ARG;
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149 * \brief Set interrupt vector priority level
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151 * Set the priority level of an external interrupt or exception.
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153 * \param[in] vector Interrupt vector to change
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154 * \param[in] priority_level New vector priority level to set
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156 * \returns Status code indicating if the priority level of the interrupt was
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157 * successfully set.
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159 * \retval STATUS_OK If no error was detected
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160 * \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
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162 enum status_code system_interrupt_set_priority(
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163 const enum system_interrupt_vector vector,
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164 const enum system_interrupt_priority_level priority_level)
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166 enum status_code status = STATUS_OK;
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168 if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
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169 uint8_t register_num = vector / 4;
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170 uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
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172 NVIC->IP[register_num] = (priority_level << priority_pos);
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173 } else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
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174 SCB->SHP[1] = (priority_level << _SYSTEM_INTERRUPT_SYSTICK_PRI_POS);
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177 status = STATUS_ERR_INVALID_ARG;
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184 * \brief Get interrupt vector priority level
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186 * Retrieves the priority level of the requested external interrupt or exception.
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188 * \param[in] vector Interrupt vector of which the priority level will be read
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190 * \return Currently configured interrupt priority level of the given interrupt
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193 enum system_interrupt_priority_level system_interrupt_get_priority(
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194 const enum system_interrupt_vector vector)
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196 uint8_t register_num = vector / 4;
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197 uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
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199 enum system_interrupt_priority_level priority = SYSTEM_INTERRUPT_PRIORITY_LEVEL_0;
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202 priority = (enum system_interrupt_priority_level)
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203 ((NVIC->IP[register_num] >> priority_pos) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
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204 } else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
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205 priority = (enum system_interrupt_priority_level)
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206 ((SCB->SHP[1] >> _SYSTEM_INTERRUPT_SYSTICK_PRI_POS) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
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