2 * Copyright 2018 NXP.
\r
3 * All rights reserved.
\r
5 * SPDX-License-Identifier: BSD-3-Clause
\r
9 * How to set up clock using clock driver functions:
\r
11 * 1. Setup clock sources.
\r
13 * 2. Setup voltage for the fastest of the clock outputs
\r
15 * 3. Set up wait states of the flash.
\r
17 * 4. Set up all dividers.
\r
19 * 5. Set up all selectors to provide selected clocks.
\r
22 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
\r
24 product: Clocks v4.1
\r
26 package_id: LPC51U68JBD64
\r
28 processor_version: 3.0.1
\r
29 board: LPCXpresso51u68
\r
30 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
\r
32 #include "fsl_power.h"
\r
33 #include "fsl_clock.h"
\r
34 #include "clock_config.h"
\r
36 /*******************************************************************************
\r
38 ******************************************************************************/
\r
40 /*******************************************************************************
\r
42 ******************************************************************************/
\r
43 /* System clock frequency. */
\r
44 extern uint32_t SystemCoreClock;
\r
46 /*******************************************************************************
\r
47 ************************ BOARD_InitBootClocks function ************************
\r
48 ******************************************************************************/
\r
49 void BOARD_InitBootClocks(void)
\r
51 BOARD_BootClockRUN();
\r
54 /*******************************************************************************
\r
55 ********************** Configuration BOARD_BootClockRUN ***********************
\r
56 ******************************************************************************/
\r
57 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
\r
59 name: BOARD_BootClockRUN
\r
60 called_from_default_init: true
\r
62 - {id: PLL_clock.outFreq, value: 12 MHz}
\r
63 - {id: SYSTICK_clock.outFreq, value: 12 MHz}
\r
64 - {id: System_clock.outFreq, value: 12 MHz}
\r
66 - {id: SYSCON.M_MULT.scale, value: '0', locked: true}
\r
67 - {id: SYSCON.N_DIV.scale, value: '3', locked: true}
\r
68 - {id: SYSCON.PLL_BYPASS.sel, value: SYSCON.SYSPLLCLKSEL}
\r
69 - {id: SYSCON.SYSPLLCLKSEL.sel, value: SYSCON.fro_12m}
\r
70 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
\r
72 /*******************************************************************************
\r
73 * Variables for BOARD_BootClockRUN configuration
\r
74 ******************************************************************************/
\r
75 /*******************************************************************************
\r
76 * Code for BOARD_BootClockRUN configuration
\r
77 ******************************************************************************/
\r
78 void BOARD_BootClockRUN(void)
\r
80 /*!< Set up the clock sources */
\r
82 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
\r
83 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
\r
84 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
\r
85 accidentally being below the voltage for current speed */
\r
86 POWER_SetVoltageForFreq(
\r
87 12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
\r
88 CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
\r
91 CLOCK_AttachClk(kFRO12M_to_SYS_PLL); /*!< Switch PLL clock source selector to FRO12M */
\r
92 const pll_setup_t pllSetup = {.syspllctrl = SYSCON_SYSPLLCTRL_UPLIMOFF_MASK | SYSCON_SYSPLLCTRL_BYPASS_MASK,
\r
93 .syspllndec = SYSCON_SYSPLLNDEC_NDEC(1U),
\r
94 .syspllpdec = SYSCON_SYSPLLPDEC_PDEC(2U),
\r
95 .syspllssctrl = {0x0U, (SYSCON_SYSPLLSSCTRL1_MD(0U) | (uint32_t)(kSS_MF_512) |
\r
96 (uint32_t)(kSS_MR_K0) | (uint32_t)(kSS_MC_NOC))},
\r
97 .pllRate = 12000000U,
\r
98 .flags = PLL_SETUPFLAG_POWERUP};
\r
99 CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired values */
\r
101 /* PLL in Fractional/Spread spectrum mode */
\r
102 /* SYSTICK is used for waiting for PLL stabilization */
\r
104 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SysTick divider counter and halt it */
\r
105 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 3U, false); /*!< Set SysTick divider to value 3 */
\r
106 SysTick->LOAD = 27999UL; /*!< Set SysTick count value */
\r
107 SysTick->VAL = 0UL; /*!< Reset current count value */
\r
108 SysTick->CTRL = SysTick_CTRL_ENABLE_Msk; /*!< Enable SYSTICK */
\r
109 while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != SysTick_CTRL_COUNTFLAG_Msk)
\r
111 } /*!< Waiting for PLL stabilization */
\r
112 SysTick->CTRL = 0UL; /*!< Stop SYSTICK */
\r
114 /*!< Set up dividers */
\r
115 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
\r
116 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */
\r
117 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */
\r
119 /*!< Set up clock selectors - Attach clocks to the peripheries */
\r
120 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
\r
121 /*!< Set SystemCoreClock variable. */
\r
122 SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
\r
125 /*******************************************************************************
\r
126 ******************** Configuration BOARD_BootClockFRO12M **********************
\r
127 ******************************************************************************/
\r
128 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
\r
130 name: BOARD_BootClockFRO12M
\r
132 - {id: SYSTICK_clock.outFreq, value: 12 MHz}
\r
133 - {id: System_clock.outFreq, value: 12 MHz}
\r
134 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
\r
136 /*******************************************************************************
\r
137 * Variables for BOARD_BootClockFRO12M configuration
\r
138 ******************************************************************************/
\r
139 /*******************************************************************************
\r
140 * Code for BOARD_BootClockFRO12M configuration
\r
141 ******************************************************************************/
\r
142 void BOARD_BootClockFRO12M(void)
\r
144 /*!< Set up the clock sources */
\r
146 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
\r
147 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
\r
148 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
\r
149 accidentally being below the voltage for current speed */
\r
150 POWER_SetVoltageForFreq(
\r
151 12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
\r
152 CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
\r
154 /*!< Set up dividers */
\r
155 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
\r
156 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */
\r
157 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */
\r
159 /*!< Set up clock selectors - Attach clocks to the peripheries */
\r
160 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
\r
161 /*!< Set SystemCoreClock variable. */
\r
162 SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
\r
165 /*******************************************************************************
\r
166 ******************* Configuration BOARD_BootClockFROHF48M *********************
\r
167 ******************************************************************************/
\r
168 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
\r
170 name: BOARD_BootClockFROHF48M
\r
172 - {id: SYSTICK_clock.outFreq, value: 48 MHz}
\r
173 - {id: System_clock.outFreq, value: 48 MHz}
\r
175 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
\r
176 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
\r
178 /*******************************************************************************
\r
179 * Variables for BOARD_BootClockFROHF48M configuration
\r
180 ******************************************************************************/
\r
181 /*******************************************************************************
\r
182 * Code for BOARD_BootClockFROHF48M configuration
\r
183 ******************************************************************************/
\r
184 void BOARD_BootClockFROHF48M(void)
\r
186 /*!< Set up the clock sources */
\r
188 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
\r
189 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
\r
190 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
\r
191 accidentally being below the voltage for current speed */
\r
192 POWER_SetVoltageForFreq(
\r
193 48000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
\r
194 CLOCK_SetFLASHAccessCyclesForFreq(48000000U); /*!< Set FLASH wait states for core */
\r
196 CLOCK_SetupFROClocking(48000000U); /*!< Set up high frequency FRO output to selected frequency */
\r
198 /*!< Set up dividers */
\r
199 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
\r
200 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */
\r
201 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */
\r
203 /*!< Set up clock selectors - Attach clocks to the peripheries */
\r
204 CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
\r
205 /*!< Set SystemCoreClock variable. */
\r
206 SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
\r
209 /*******************************************************************************
\r
210 ******************* Configuration BOARD_BootClockFROHF96M *********************
\r
211 ******************************************************************************/
\r
212 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
\r
214 name: BOARD_BootClockFROHF96M
\r
216 - {id: SYSTICK_clock.outFreq, value: 96 MHz}
\r
217 - {id: System_clock.outFreq, value: 96 MHz}
\r
219 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
\r
221 - {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
\r
222 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
\r
224 /*******************************************************************************
\r
225 * Variables for BOARD_BootClockFROHF96M configuration
\r
226 ******************************************************************************/
\r
227 /*******************************************************************************
\r
228 * Code for BOARD_BootClockFROHF96M configuration
\r
229 ******************************************************************************/
\r
230 void BOARD_BootClockFROHF96M(void)
\r
232 /*!< Set up the clock sources */
\r
234 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
\r
235 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
\r
236 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
\r
237 accidentally being below the voltage for current speed */
\r
238 POWER_SetVoltageForFreq(
\r
239 96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
\r
240 CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
\r
242 CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
\r
244 /*!< Set up dividers */
\r
245 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
\r
246 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */
\r
247 CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */
\r
249 /*!< Set up clock selectors - Attach clocks to the peripheries */
\r
250 CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
\r
251 /*!< Set SystemCoreClock variable. */
\r
252 SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
\r