]> git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/Debug_IAR/Obj/list.xcl
Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+).
[freertos] / FreeRTOS / Demo / CORTEX_M0+_LPC51U68_LPCXpresso / Debug_IAR / Obj / list.xcl
1 "C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\list.c"\r
2 -std=c11\r
3 -ferror-limit=0\r
4 -fbracket-depth=512\r
5 -MD\r
6 -MF\r
7 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\Debug_IAR\Obj\list.pbi.dep\r
8 -o\r
9 list.pbi\r
10 -I\r
11 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\r
12 -I\r
13 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include\r
14 -I\r
15 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\portable\IAR\ARM_CM0\r
16 -I\r
17 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\Common\include\r
18 -I\r
19 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\app\r
20 -I\r
21 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\r
22 -I\r
23 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\r
24 -I\r
25 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists\r
26 -I\r
27 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager\r
28 -I\r
29 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart\r
30 -I\r
31 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device\r
32 -I\r
33 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\r
34 -I\r
35 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific\r
36 -I\r
37 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\r
38 -I\r
39 C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc\r
40 -I\r
41 C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc\c\r
42 -I\r
43 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\include\r
44 -I\r
45 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\portable\IAR\ARM_CM0\r
46 -I\r
47 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\Common\include\r
48 -I\r
49 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\app\r
50 -I\r
51 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\r
52 -I\r
53 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\r
54 -I\r
55 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists\r
56 -I\r
57 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager\r
58 -I\r
59 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart\r
60 -I\r
61 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\device\r
62 -I\r
63 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\r
64 -I\r
65 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific\r
66 -I\r
67 C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\r
68 -D__CHAR_BITS__=8\r
69 -D__CHAR_MAX__=0xff\r
70 -D__CHAR_MIN__=0\r
71 -D__CHAR_SIZE__=1\r
72 -D__UNSIGNED_CHAR_MAX__=0xff\r
73 -D__SIGNED_CHAR_MAX__=127\r
74 -D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)\r
75 -D__CHAR_ALIGN__=1\r
76 -D__SHORT_SIZE__=2\r
77 -D__UNSIGNED_SHORT_MAX__=0xffff\r
78 -D__SIGNED_SHORT_MAX__=32767\r
79 -D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)\r
80 -D__SHORT_ALIGN__=2\r
81 -D__INT_SIZE__=4\r
82 -D__UNSIGNED_INT_MAX__=0xffffffffU\r
83 -D__SIGNED_INT_MAX__=2147483647\r
84 -D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)\r
85 -D__INT_ALIGN__=4\r
86 -D__LONG_SIZE__=4\r
87 -D__UNSIGNED_LONG_MAX__=0xffffffffUL\r
88 -D__SIGNED_LONG_MAX__=2147483647L\r
89 -D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)\r
90 -D__LONG_ALIGN__=4\r
91 -D__LONG_LONG_SIZE__=8\r
92 -D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL\r
93 -D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL\r
94 -D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)\r
95 -D__LONG_LONG_ALIGN__=8\r
96 -D__INT8_T_TYPE__=signed char\r
97 -D__INT8_T_MAX__=127\r
98 -D__INT8_T_MIN__=(-__INT8_T_MAX__-1)\r
99 -D__UINT8_T_TYPE__=unsigned char\r
100 -D__UINT8_T_MAX__=0xff\r
101 -D__INT8_SIZE_PREFIX__="hh"\r
102 -D__INT16_T_TYPE__=signed short int\r
103 -D__INT16_T_MAX__=32767\r
104 -D__INT16_T_MIN__=(-__INT16_T_MAX__-1)\r
105 -D__UINT16_T_TYPE__=unsigned short int\r
106 -D__UINT16_T_MAX__=0xffff\r
107 -D__INT16_SIZE_PREFIX__="h"\r
108 -D__INT32_T_TYPE__=signed int\r
109 -D__INT32_T_MAX__=2147483647\r
110 -D__INT32_T_MIN__=(-__INT32_T_MAX__-1)\r
111 -D__UINT32_T_TYPE__=unsigned int\r
112 -D__UINT32_T_MAX__=0xffffffffU\r
113 -D__INT32_SIZE_PREFIX__=""\r
114 -D__INT64_T_TYPE__=signed long long int\r
115 -D__INT64_T_MAX__=9223372036854775807LL\r
116 -D__INT64_T_MIN__=(-__INT64_T_MAX__-1)\r
117 -D__UINT64_T_TYPE__=unsigned long long int\r
118 -D__UINT64_T_MAX__=0xffffffffffffffffULL\r
119 -D__INT64_SIZE_PREFIX__="ll"\r
120 -D__INT_LEAST8_T_TYPE__=signed char\r
121 -D__INT_LEAST8_T_MAX__=127\r
122 -D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)\r
123 -D__UINT_LEAST8_T_TYPE__=unsigned char\r
124 -D__UINT_LEAST8_T_MAX__=0xff\r
125 -D__INT8_C_SUFFIX__=\r
126 -D__UINT8_C_SUFFIX__=\r
127 -D__INT_LEAST8_SIZE_PREFIX__="hh"\r
128 -D__INT_LEAST16_T_TYPE__=signed short int\r
129 -D__INT_LEAST16_T_MAX__=32767\r
130 -D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)\r
131 -D__UINT_LEAST16_T_TYPE__=unsigned short int\r
132 -D__UINT_LEAST16_T_MAX__=0xffff\r
133 -D__INT16_C_SUFFIX__=\r
134 -D__UINT16_C_SUFFIX__=\r
135 -D__INT_LEAST16_SIZE_PREFIX__="h"\r
136 -D__INT_LEAST32_T_TYPE__=signed int\r
137 -D__INT_LEAST32_T_MAX__=2147483647\r
138 -D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)\r
139 -D__UINT_LEAST32_T_TYPE__=unsigned int\r
140 -D__UINT_LEAST32_T_MAX__=0xffffffffU\r
141 -D__INT32_C_SUFFIX__=\r
142 -D__UINT32_C_SUFFIX__=U\r
143 -D__INT_LEAST32_SIZE_PREFIX__=""\r
144 -D__INT_LEAST64_T_TYPE__=signed long long int\r
145 -D__INT_LEAST64_T_MAX__=9223372036854775807LL\r
146 -D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)\r
147 -D__UINT_LEAST64_T_TYPE__=unsigned long long int\r
148 -D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL\r
149 -D__INT64_C_SUFFIX__=LL\r
150 -D__UINT64_C_SUFFIX__=ULL\r
151 -D__INT_LEAST64_SIZE_PREFIX__="ll"\r
152 -D__INT_FAST8_T_TYPE__=signed int\r
153 -D__INT_FAST8_T_MAX__=2147483647\r
154 -D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)\r
155 -D__UINT_FAST8_T_TYPE__=unsigned int\r
156 -D__UINT_FAST8_T_MAX__=0xffffffffU\r
157 -D__INT_FAST8_SIZE_PREFIX__=""\r
158 -D__INT_FAST16_T_TYPE__=signed int\r
159 -D__INT_FAST16_T_MAX__=2147483647\r
160 -D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)\r
161 -D__UINT_FAST16_T_TYPE__=unsigned int\r
162 -D__UINT_FAST16_T_MAX__=0xffffffffU\r
163 -D__INT_FAST16_SIZE_PREFIX__=""\r
164 -D__INT_FAST32_T_TYPE__=signed int\r
165 -D__INT_FAST32_T_MAX__=2147483647\r
166 -D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)\r
167 -D__UINT_FAST32_T_TYPE__=unsigned int\r
168 -D__UINT_FAST32_T_MAX__=0xffffffffU\r
169 -D__INT_FAST32_SIZE_PREFIX__=""\r
170 -D__INT_FAST64_T_TYPE__=signed long long int\r
171 -D__INT_FAST64_T_MAX__=9223372036854775807LL\r
172 -D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)\r
173 -D__UINT_FAST64_T_TYPE__=unsigned long long int\r
174 -D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL\r
175 -D__INT_FAST64_SIZE_PREFIX__="ll"\r
176 -D__INTMAX_T_TYPE__=signed long long int\r
177 -D__INTMAX_T_MAX__=9223372036854775807LL\r
178 -D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)\r
179 -D__UINTMAX_T_TYPE__=unsigned long long int\r
180 -D__UINTMAX_T_MAX__=0xffffffffffffffffULL\r
181 -D__INTMAX_C_SUFFIX__=LL\r
182 -D__UINTMAX_C_SUFFIX__=ULL\r
183 -D__INTMAX_SIZE_PREFIX__="ll"\r
184 -D__FLOAT_SIZE__=4\r
185 -D__FLOAT_ALIGN__=4\r
186 -D__DOUBLE_SIZE__=8\r
187 -D__DOUBLE_ALIGN__=8\r
188 -D__LONG_DOUBLE_SIZE__=8\r
189 -D__LONG_DOUBLE_ALIGN__=8\r
190 -D____FP16_SIZE__=2\r
191 -D____FP16_ALIGN__=2\r
192 -D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0\r
193 -D__SUBNORMAL_FLOATING_POINTS__=0\r
194 -D__SIZE_T_TYPE__=unsigned int\r
195 -D__SIZE_T_MAX__=0xffffffffU\r
196 -D__PTRDIFF_T_TYPE__=signed int\r
197 -D__PTRDIFF_T_MAX__=2147483647\r
198 -D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)\r
199 -D__INTPTR_T_TYPE__=signed int\r
200 -D__INTPTR_T_MAX__=2147483647\r
201 -D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)\r
202 -D__UINTPTR_T_TYPE__=unsigned int\r
203 -D__UINTPTR_T_MAX__=0xffffffffU\r
204 -D__INTPTR_SIZE_PREFIX__=""\r
205 -D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int\r
206 -D__JMP_BUF_NUM_ELEMENTS__=8\r
207 -D__TID__=0xcf70\r
208 -D__VER__=8040002\r
209 -D__BUILD_NUMBER__=214\r
210 -D__IAR_SYSTEMS_ICC__=9\r
211 -D_MAX_ALIGNMENT=8\r
212 -D__LITTLE_ENDIAN__=1\r
213 -D__BOOL_TYPE__=unsigned char\r
214 -D__BOOL_SIZE__=1\r
215 -D__WCHAR_T_TYPE__=unsigned int\r
216 -D__WCHAR_T_SIZE__=4\r
217 -D__WCHAR_T_MAX__=0xffffffffU\r
218 -D__DEF_PTR_MEM__=__data\r
219 -D__DEF_PTR_SIZE__=4\r
220 -D__DATA_MEM0__=__data\r
221 -D__DATA_MEM0_POINTER_OK__=1\r
222 -D__DATA_MEM0_UNIQUE_POINTER__=1\r
223 -D__DATA_MEM0_VAR_OK__=1\r
224 -D__DATA_MEM0_INTPTR_TYPE__=int\r
225 -D__DATA_MEM0_UINTPTR_TYPE__=unsigned int\r
226 -D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""\r
227 -D__DATA_MEM0_MAX_SIZE__=0x7fffffffU\r
228 -D_RSIZE_MAX=0x7fffffffU\r
229 -D__DATA_MEM0_HEAP_SEGMENT__="HEAP"\r
230 -D__DATA_MEM0_PAGE_SIZE__=0\r
231 -D__DATA_MEM0_HEAP__=0\r
232 -D__CODE_MEM0__=__code\r
233 -D__CODE_MEM0_POINTER_OK__=1\r
234 -D__CODE_MEM0_UNIQUE_POINTER__=1\r
235 -D__HEAP_MEM0__=0\r
236 -D__HEAP_DEFAULT_MEM__=0\r
237 -D__HEAPND_MEMORY_LIST1__()=\r
238 -D__MULTIPLE_HEAPS__=0\r
239 -D__DEF_HEAP_MEM__=__data\r
240 -D__DEF_STACK_MEM_INDEX__=0\r
241 -D__PRAGMA_PACK_ON__=1\r
242 -D__MULTIPLE_INHERITANCE__=1\r
243 -D__AAPCS__=1\r
244 -D__ARM4TM__=4\r
245 -D__ARM5TM__=5\r
246 -D__ARM5T__=5\r
247 -D__ARM5__=5\r
248 -D__ARM6M__=11\r
249 -D__ARM6SM__=12\r
250 -D__ARM6__=6\r
251 -D__ARM_32BIT_STATE=1\r
252 -D__ARM_ACLE=201\r
253 -D__ARM_ALIGN_MAX_PWR=8\r
254 -D__ARM_ALIGN_MAX_STACK_PWR=3\r
255 -D__ARM_ARCH=6\r
256 -D__ARM_ARCH_ISA_THUMB=1\r
257 -D__ARM_ARCH_PROFILE='M'\r
258 -D__ARM_FEATURE_COPROC=0\r
259 -D__ARM_FP16_ARGS=1\r
260 -D__ARM_FP16_FORMAT_IEEE=1\r
261 -D__ARM_PCS=1\r
262 -D__ARM_PROFILE_M__=1\r
263 -D__ARM_SIZE_MINIMAL_ENUM=1\r
264 -D__ARM_SIZE_WCHAR_T=4\r
265 -D__CODE_SIZE_LIMIT=0\r
266 -D__CORE__=__ARM6M__\r
267 -D__CPU_MODE__=1\r
268 -D__ICCARM_INTRINSICS_VERSION__=2\r
269 -D__ICCARM__=1\r
270 -D__INTERWORKING__=1\r
271 -D__PLAIN_INT_BITFIELD_IS_SIGNED__=0\r
272 -D__HAS_WEAK__=1\r
273 -D__HAS_PACKED__=1\r
274 -D__HAS_JOINED_TYPES__=1\r
275 -D__HAS_LOCATED_DECLARATION__=1\r
276 -D__HAS_LOCATED_WITH_INIT__=1\r
277 -D__IAR_COMPILERBASE__=656646\r
278 -D__IAR_COMPILERBASE_STR__=10.5.6.1181\r
279 -D__UNICODE_SOURCE_SUPPORTED__=1\r
280 -D__VTABLE_MEM__=\r
281 -D__PRAGMA_REDEFINE_EXTNAME=1\r
282 -D__STDC__=1\r
283 -D__STDC_VERSION__=201710L\r
284 -D__STDC_NO_VLA__=1\r
285 -D__STDC_NO_ATOMICS__=1\r
286 -D__STDC_UTF_16__=1\r
287 -D__STDC_UTF_32__=1\r
288 -D__STDC_LIB_EXT1__=201112L\r
289 -D__STDC_NO_THREADS__=1\r
290 -D__STDC_ISO_10646__=201103L\r
291 -D__STDC_HOSTED__=1\r
292 -D__EDG_IA64_ABI=1\r
293 -D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1\r
294 -D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1\r
295 -D__cpp_hex_float=201603L\r
296 -D__cpp_unicode_literals=200710L\r
297 -D__cpp_static_assert=200410L\r
298 -D__EDG__=1\r
299 -D__EDG_VERSION__=500\r
300 -D__EDG_SIZE_TYPE__=unsigned int\r
301 -D__EDG_PTRDIFF_TYPE__=int\r
302 -D__EDG_DELTA_TYPE=int\r
303 -D__EDG_IA64_VTABLE_ENTRY_TYPE=int\r
304 -D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short\r
305 -D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1\r
306 -D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1\r
307 -D__EDG_ABI_COMPATIBILITY_VERSION=9999\r
308 -D__EDG_ABI_CHANGES_FOR_RTTI=1\r
309 -D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1\r
310 -D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1\r
311 -D__EDG_BSD=0\r
312 -D__EDG_SYSV=0\r
313 -D__EDG_ANSIC=1\r
314 -D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1\r
315 -D__EDG_FLOAT80_ENABLING_POSSIBLE=0\r
316 -D__EDG_FLOAT128_ENABLING_POSSIBLE=0\r
317 -D__EDG_INT128_EXTENSIONS_ALLOWED=0\r
318 -DDEBUG=1\r
319 -DCPU_LPC51U68JBD64=1\r
320 -D_DLIB_CONFIG_FILE_HEADER_NAME="C:\\Program Files (x86)\\IAR Systems\\Embedded Workbench 8.3\\arm\\inc\\c\\DLib_Config_Normal.h"\r
321 -D_DLIB_CONFIG_FILE_STRING="C:\\Program Files (x86)\\IAR Systems\\Embedded Workbench 8.3\\arm\\inc\\c\\DLib_Config_Normal.h"\r
322 -D__VERSION__="IAR ANSI C/C++ Compiler V8.40.2.214/W32 for ARM"\r
323 -D_VA_DEFINED=\r
324 -D_VA_LIST=struct __va_list\r
325 -D__ICCARM_OLD_DEFINED_VAARGS__=1\r
326 -D__VA_STACK_ALIGN__=8\r
327 -D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )\r
328 -D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 ,  _P1 )\r
329 -D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 ,  _P1 ,  _P2 )\r
330 -D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )\r
331 -D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 ,  _P1 )\r
332 -D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
333 -D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )\r
334 -D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 ,  _P1 )\r
335 -D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 ,  _P1 ,  _P2 )\r
336 -D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )\r
337 -D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 ,  _P1 )\r
338 -D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
339 -D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )\r
340 -D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 ,  _P1 )\r
341 -D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
342 -D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )\r
343 -D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )\r
344 -D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 ,  _P1 )\r
345 -D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
346 -D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )\r
347 -D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )\r
348 -D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )\r
349 -D__TOPM_DATA_MEMORY_LIST1__()=\r
350 -D__TOPM_DATA_MEMORY_LIST2__(_P1)=\r
351 -D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=\r
352 -D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )\r
353 -D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 ,  _P1 )\r
354 -D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
355 -D__DATA_MEM0_SIZE_TYPE__=unsigned int\r
356 -D__DATA_MEM0_INDEX_TYPE__=signed int\r
357 -D__iar_fp2bits32(x)=0\r
358 -D__iar_fp2bits64(x)=0\r
359 -D__iar_fpgethi64(x)=0\r
360 -D__iar_atomic_add_fetch(x,y,z)=0\r
361 -D__iar_atomic_sub_fetch(x,y,z)=0\r
362 -D__iar_atomic_load(x,y)=0ULL\r
363 -D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0\r