2 ** ###################################################################
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3 ** Version: rev. 1.0, 2017-12-15
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7 ** Chip specific module features.
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9 ** Copyright 2016 Freescale Semiconductor, Inc.
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10 ** Copyright 2016-2019 NXP
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11 ** All rights reserved.
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13 ** SPDX-License-Identifier: BSD-3-Clause
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15 ** http: www.nxp.com
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16 ** mail: support@nxp.com
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19 ** - rev. 1.0 (2017-12-15)
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22 ** ###################################################################
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25 #ifndef _LPC51U68_FEATURES_H_
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26 #define _LPC51U68_FEATURES_H_
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28 /* SOC module features */
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30 /* @brief ADC availability on the SoC. */
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31 #define FSL_FEATURE_SOC_ADC_COUNT (1)
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32 /* @brief ASYNC_SYSCON availability on the SoC. */
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33 #define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1)
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34 /* @brief CRC availability on the SoC. */
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35 #define FSL_FEATURE_SOC_CRC_COUNT (1)
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36 /* @brief CTIMER availability on the SoC. */
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37 #define FSL_FEATURE_SOC_CTIMER_COUNT (3)
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38 /* @brief DMA availability on the SoC. */
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39 #define FSL_FEATURE_SOC_DMA_COUNT (1)
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40 /* @brief FLEXCOMM availability on the SoC. */
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41 #define FSL_FEATURE_SOC_FLEXCOMM_COUNT (8)
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42 /* @brief FMC availability on the SoC. */
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43 #define FSL_FEATURE_SOC_FMC_COUNT (1)
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44 /* @brief GINT availability on the SoC. */
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45 #define FSL_FEATURE_SOC_GINT_COUNT (2)
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46 /* @brief GPIO availability on the SoC. */
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47 #define FSL_FEATURE_SOC_GPIO_COUNT (1)
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48 /* @brief I2C availability on the SoC. */
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49 #define FSL_FEATURE_SOC_I2C_COUNT (8)
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50 /* @brief I2S availability on the SoC. */
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51 #define FSL_FEATURE_SOC_I2S_COUNT (2)
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52 /* @brief INPUTMUX availability on the SoC. */
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53 #define FSL_FEATURE_SOC_INPUTMUX_COUNT (1)
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54 /* @brief IOCON availability on the SoC. */
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55 #define FSL_FEATURE_SOC_IOCON_COUNT (1)
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56 /* @brief MRT availability on the SoC. */
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57 #define FSL_FEATURE_SOC_MRT_COUNT (1)
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58 /* @brief PINT availability on the SoC. */
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59 #define FSL_FEATURE_SOC_PINT_COUNT (1)
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60 /* @brief RTC availability on the SoC. */
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61 #define FSL_FEATURE_SOC_RTC_COUNT (1)
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62 /* @brief SCT availability on the SoC. */
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63 #define FSL_FEATURE_SOC_SCT_COUNT (1)
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64 /* @brief SPI availability on the SoC. */
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65 #define FSL_FEATURE_SOC_SPI_COUNT (8)
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66 /* @brief SYSCON availability on the SoC. */
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67 #define FSL_FEATURE_SOC_SYSCON_COUNT (1)
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68 /* @brief USART availability on the SoC. */
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69 #define FSL_FEATURE_SOC_USART_COUNT (8)
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70 /* @brief USB availability on the SoC. */
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71 #define FSL_FEATURE_SOC_USB_COUNT (1)
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72 /* @brief UTICK availability on the SoC. */
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73 #define FSL_FEATURE_SOC_UTICK_COUNT (1)
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74 /* @brief WWDT availability on the SoC. */
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75 #define FSL_FEATURE_SOC_WWDT_COUNT (1)
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77 /* ADC module features */
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79 /* @brief Do not has input select (register INSEL). */
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80 #define FSL_FEATURE_ADC_HAS_NO_INSEL (0)
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81 /* @brief Has ASYNMODE bitfile in CTRL reigster. */
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82 #define FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE (1)
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83 /* @brief Has ASYNMODE bitfile in CTRL reigster. */
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84 #define FSL_FEATURE_ADC_HAS_CTRL_RESOL (1)
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85 /* @brief Has ASYNMODE bitfile in CTRL reigster. */
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86 #define FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL (1)
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87 /* @brief Has ASYNMODE bitfile in CTRL reigster. */
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88 #define FSL_FEATURE_ADC_HAS_CTRL_TSAMP (1)
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89 /* @brief Has ASYNMODE bitfile in CTRL reigster. */
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90 #define FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE (0)
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91 /* @brief Has ASYNMODE bitfile in CTRL reigster. */
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92 #define FSL_FEATURE_ADC_HAS_CTRL_CALMODE (0)
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93 /* @brief Has startup register. */
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94 #define FSL_FEATURE_ADC_HAS_STARTUP_REG (1)
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95 /* @brief Has ADTrim register */
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96 #define FSL_FEATURE_ADC_HAS_TRIM_REG (0)
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97 /* @brief Has Calibration register. */
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98 #define FSL_FEATURE_ADC_HAS_CALIB_REG (1)
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100 /* DMA module features */
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102 /* @brief Number of channels */
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103 #define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (18)
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104 /* @brief Align size of DMA descriptor */
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105 #define FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE (512)
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106 /* @brief DMA head link descriptor table align size */
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107 #define FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE (16U)
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109 /* FLEXCOMM module features */
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111 /* @brief FLEXCOMM0 USART INDEX 0 */
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112 #define FSL_FEATURE_FLEXCOMM0_USART_INDEX (0)
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113 /* @brief FLEXCOMM0 SPI INDEX 0 */
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114 #define FSL_FEATURE_FLEXCOMM0_SPI_INDEX (0)
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115 /* @brief FLEXCOMM0 I2C INDEX 0 */
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116 #define FSL_FEATURE_FLEXCOMM0_I2C_INDEX (0)
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117 /* @brief FLEXCOMM1 USART INDEX 1 */
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118 #define FSL_FEATURE_FLEXCOMM1_USART_INDEX (1)
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119 /* @brief FLEXCOMM1 SPI INDEX 1 */
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120 #define FSL_FEATURE_FLEXCOMM1_SPI_INDEX (1)
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121 /* @brief FLEXCOMM1 I2C INDEX 1 */
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122 #define FSL_FEATURE_FLEXCOMM1_I2C_INDEX (1)
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123 /* @brief FLEXCOMM2 USART INDEX 2 */
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124 #define FSL_FEATURE_FLEXCOMM2_USART_INDEX (2)
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125 /* @brief FLEXCOMM2 SPI INDEX 2 */
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126 #define FSL_FEATURE_FLEXCOMM2_SPI_INDEX (2)
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127 /* @brief FLEXCOMM2 I2C INDEX 2 */
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128 #define FSL_FEATURE_FLEXCOMM2_I2C_INDEX (2)
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129 /* @brief FLEXCOMM3 USART INDEX 3 */
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130 #define FSL_FEATURE_FLEXCOMM3_USART_INDEX (3)
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131 /* @brief FLEXCOMM3 SPI INDEX 3 */
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132 #define FSL_FEATURE_FLEXCOMM3_SPI_INDEX (3)
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133 /* @brief FLEXCOMM3 I2C INDEX 3 */
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134 #define FSL_FEATURE_FLEXCOMM3_I2C_INDEX (3)
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135 /* @brief FLEXCOMM4 USART INDEX 4 */
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136 #define FSL_FEATURE_FLEXCOMM4_USART_INDEX (4)
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137 /* @brief FLEXCOMM4 SPI INDEX 4 */
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138 #define FSL_FEATURE_FLEXCOMM4_SPI_INDEX (4)
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139 /* @brief FLEXCOMM4 I2C INDEX 4 */
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140 #define FSL_FEATURE_FLEXCOMM4_I2C_INDEX (4)
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141 /* @brief FLEXCOMM5 USART INDEX 5 */
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142 #define FSL_FEATURE_FLEXCOMM5_USART_INDEX (5)
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143 /* @brief FLEXCOMM5 SPI INDEX 5 */
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144 #define FSL_FEATURE_FLEXCOMM5_SPI_INDEX (5)
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145 /* @brief FLEXCOMM5 I2C INDEX 5 */
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146 #define FSL_FEATURE_FLEXCOMM5_I2C_INDEX (5)
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147 /* @brief FLEXCOMM6 USART INDEX 6 */
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148 #define FSL_FEATURE_FLEXCOMM6_USART_INDEX (6)
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149 /* @brief FLEXCOMM6 SPI INDEX 6 */
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150 #define FSL_FEATURE_FLEXCOMM6_SPI_INDEX (6)
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151 /* @brief FLEXCOMM6 I2C INDEX 6 */
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152 #define FSL_FEATURE_FLEXCOMM6_I2C_INDEX (6)
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153 /* @brief FLEXCOMM7 I2S INDEX 0 */
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154 #define FSL_FEATURE_FLEXCOMM6_I2S_INDEX (0)
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155 /* @brief FLEXCOMM7 USART INDEX 7 */
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156 #define FSL_FEATURE_FLEXCOMM7_USART_INDEX (7)
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157 /* @brief FLEXCOMM7 SPI INDEX 7 */
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158 #define FSL_FEATURE_FLEXCOMM7_SPI_INDEX (7)
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159 /* @brief FLEXCOMM7 I2C INDEX 7 */
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160 #define FSL_FEATURE_FLEXCOMM7_I2C_INDEX (7)
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161 /* @brief FLEXCOMM7 I2S INDEX 1 */
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162 #define FSL_FEATURE_FLEXCOMM7_I2S_INDEX (1)
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163 /* @brief I2S has DMIC interconnection */
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164 #define FSL_FEATURE_FLEXCOMM_INSTANCE_I2S_HAS_DMIC_INTERCONNECTIONn(x) (0)
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166 /* I2S module features */
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168 /* @brief I2S support dual channel transfer */
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169 #define FSL_FEATURE_I2S_SUPPORT_SECONDARY_CHANNEL (0)
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170 /* @brief I2S has DMIC interconnection */
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171 #define FSL_FEATURE_FLEXCOMM_I2S_HAS_DMIC_INTERCONNECTION (0)
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173 /* MRT module features */
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175 /* @brief number of channels. */
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176 #define FSL_FEATURE_MRT_NUMBER_OF_CHANNELS (4)
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178 /* interrupt module features */
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180 /* @brief Lowest interrupt request number. */
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181 #define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14)
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182 /* @brief Highest interrupt request number. */
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183 #define FSL_FEATURE_INTERRUPT_IRQ_MAX (105)
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185 /* PINT module features */
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187 /* @brief Number of connected outputs */
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188 #define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (4)
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190 /* RTC module features */
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192 /* @brief RTC has no reset control */
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193 #define FSL_FEATURE_RTC_HAS_NO_RESET (1)
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195 /* SCT module features */
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197 /* @brief Number of events */
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198 #define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10)
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199 /* @brief Number of states */
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200 #define FSL_FEATURE_SCT_NUMBER_OF_STATES (10)
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201 /* @brief Number of match capture */
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202 #define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10)
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203 /* @brief Number of outputs */
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204 #define FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS (8)
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206 /* SYSCON module features */
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208 /* @brief Pointer to ROM IAP entry functions */
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209 #define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205)
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210 /* @brief Flash page size in bytes */
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211 #define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256)
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212 /* @brief Flash sector size in bytes */
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213 #define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768)
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214 /* @brief Flash size in bytes */
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215 #define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (262144)
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216 /* @brief IAP has Flash read & write function */
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217 #define FSL_FEATURE_IAP_HAS_FLASH_FUNCTION (1)
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218 /* @brief IAP has read Flash signature function */
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219 #define FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ (1)
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220 /* @brief IAP has read extended Flash signature function */
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221 #define FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ (0)
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223 /* SysTick module features */
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225 /* @brief Systick has external reference clock. */
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226 #define FSL_FEATURE_SYSTICK_HAS_EXT_REF (0)
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227 /* @brief Systick external reference clock is core clock divided by this value. */
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228 #define FSL_FEATURE_SYSTICK_EXT_REF_CORE_DIV (0)
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230 /* USB module features */
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232 /* @brief Number of the endpoint in USB FS */
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233 #define FSL_FEATURE_USB_EP_NUM (5)
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235 #endif /* _LPC51U68_FEATURES_H_ */
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