2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
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3 * Copyright 2016-2018 NXP
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4 * All rights reserved.
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6 * SPDX-License-Identifier: BSD-3-Clause
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8 #ifndef _FSL_CTIMER_H_
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9 #define _FSL_CTIMER_H_
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11 #include "fsl_common.h"
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14 * @addtogroup ctimer
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20 /*******************************************************************************
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22 ******************************************************************************/
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24 /*! @name Driver version */
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26 #define FSL_CTIMER_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) /*!< Version 2.0.2 */
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29 /*! @brief List of Timer capture channels */
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30 typedef enum _ctimer_capture_channel
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32 kCTIMER_Capture_0 = 0U, /*!< Timer capture channel 0 */
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33 kCTIMER_Capture_1, /*!< Timer capture channel 1 */
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34 kCTIMER_Capture_2, /*!< Timer capture channel 2 */
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35 #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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36 kCTIMER_Capture_3 /*!< Timer capture channel 3 */
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37 #endif /* FSL_FEATURE_CTIMER_HAS_IR_CR3INT */
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38 } ctimer_capture_channel_t;
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40 /*! @brief List of capture edge options */
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41 typedef enum _ctimer_capture_edge
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43 kCTIMER_Capture_RiseEdge = 1U, /*!< Capture on rising edge */
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44 kCTIMER_Capture_FallEdge = 2U, /*!< Capture on falling edge */
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45 kCTIMER_Capture_BothEdge = 3U, /*!< Capture on rising and falling edge */
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46 } ctimer_capture_edge_t;
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48 /*! @brief List of Timer match registers */
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49 typedef enum _ctimer_match
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51 kCTIMER_Match_0 = 0U, /*!< Timer match register 0 */
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52 kCTIMER_Match_1, /*!< Timer match register 1 */
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53 kCTIMER_Match_2, /*!< Timer match register 2 */
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54 kCTIMER_Match_3 /*!< Timer match register 3 */
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57 /*! @brief List of output control options */
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58 typedef enum _ctimer_match_output_control
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60 kCTIMER_Output_NoAction = 0U, /*!< No action is taken */
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61 kCTIMER_Output_Clear, /*!< Clear the EM bit/output to 0 */
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62 kCTIMER_Output_Set, /*!< Set the EM bit/output to 1 */
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63 kCTIMER_Output_Toggle /*!< Toggle the EM bit/output */
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64 } ctimer_match_output_control_t;
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66 /*! @brief List of Timer modes */
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67 typedef enum _ctimer_timer_mode
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69 kCTIMER_TimerMode = 0U, /* TC is incremented every rising APB bus clock edge */
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70 kCTIMER_IncreaseOnRiseEdge, /* TC is incremented on rising edge of input signal */
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71 kCTIMER_IncreaseOnFallEdge, /* TC is incremented on falling edge of input signal */
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72 kCTIMER_IncreaseOnBothEdge /* TC is incremented on both edges of input signal */
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73 } ctimer_timer_mode_t;
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75 /*! @brief List of Timer interrupts */
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76 typedef enum _ctimer_interrupt_enable
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78 kCTIMER_Match0InterruptEnable = CTIMER_MCR_MR0I_MASK, /*!< Match 0 interrupt */
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79 kCTIMER_Match1InterruptEnable = CTIMER_MCR_MR1I_MASK, /*!< Match 1 interrupt */
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80 kCTIMER_Match2InterruptEnable = CTIMER_MCR_MR2I_MASK, /*!< Match 2 interrupt */
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81 kCTIMER_Match3InterruptEnable = CTIMER_MCR_MR3I_MASK, /*!< Match 3 interrupt */
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82 #if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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83 kCTIMER_Capture0InterruptEnable = CTIMER_CCR_CAP0I_MASK, /*!< Capture 0 interrupt */
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84 kCTIMER_Capture1InterruptEnable = CTIMER_CCR_CAP1I_MASK, /*!< Capture 1 interrupt */
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85 kCTIMER_Capture2InterruptEnable = CTIMER_CCR_CAP2I_MASK, /*!< Capture 2 interrupt */
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86 #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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87 kCTIMER_Capture3InterruptEnable = CTIMER_CCR_CAP3I_MASK, /*!< Capture 3 interrupt */
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88 #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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90 } ctimer_interrupt_enable_t;
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92 /*! @brief List of Timer flags */
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93 typedef enum _ctimer_status_flags
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95 kCTIMER_Match0Flag = CTIMER_IR_MR0INT_MASK, /*!< Match 0 interrupt flag */
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96 kCTIMER_Match1Flag = CTIMER_IR_MR1INT_MASK, /*!< Match 1 interrupt flag */
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97 kCTIMER_Match2Flag = CTIMER_IR_MR2INT_MASK, /*!< Match 2 interrupt flag */
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98 kCTIMER_Match3Flag = CTIMER_IR_MR3INT_MASK, /*!< Match 3 interrupt flag */
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99 #if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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100 kCTIMER_Capture0Flag = CTIMER_IR_CR0INT_MASK, /*!< Capture 0 interrupt flag */
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101 kCTIMER_Capture1Flag = CTIMER_IR_CR1INT_MASK, /*!< Capture 1 interrupt flag */
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102 kCTIMER_Capture2Flag = CTIMER_IR_CR2INT_MASK, /*!< Capture 2 interrupt flag */
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103 #if defined(FSL_FEATURE_CTIMER_HAS_IR_CR3INT) && FSL_FEATURE_CTIMER_HAS_IR_CR3INT
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104 kCTIMER_Capture3Flag = CTIMER_IR_CR3INT_MASK, /*!< Capture 3 interrupt flag */
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105 #endif /* FSL_FEATURE_CTIMER_HAS_IR_CR3INT */
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107 } ctimer_status_flags_t;
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109 typedef void (*ctimer_callback_t)(uint32_t flags);
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111 /*! @brief Callback type when registering for a callback. When registering a callback
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112 * an array of function pointers is passed the size could be 1 or 8, the callback
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113 * type will tell that.
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117 kCTIMER_SingleCallback, /*!< Single Callback type where there is only one callback for the timer.
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118 based on the status flags different channels needs to be handled differently */
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119 kCTIMER_MultipleCallback /*!< Multiple Callback type where there can be 8 valid callbacks, one per channel.
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120 for both match/capture */
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121 } ctimer_callback_type_t;
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124 * @brief Match configuration
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126 * This structure holds the configuration settings for each match register.
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128 typedef struct _ctimer_match_config
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130 uint32_t matchValue; /*!< This is stored in the match register */
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131 bool enableCounterReset; /*!< true: Match will reset the counter
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132 false: Match will not reser the counter */
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133 bool enableCounterStop; /*!< true: Match will stop the counter
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134 false: Match will not stop the counter */
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135 ctimer_match_output_control_t outControl; /*!< Action to be taken on a match on the EM bit/output */
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136 bool outPinInitState; /*!< Initial value of the EM bit/output */
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137 bool enableInterrupt; /*!< true: Generate interrupt upon match
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138 false: Do not generate interrupt on match */
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140 } ctimer_match_config_t;
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143 * @brief Timer configuration structure
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145 * This structure holds the configuration settings for the Timer peripheral. To initialize this
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146 * structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a
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147 * pointer to the configuration structure instance.
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149 * The configuration structure can be made constant so as to reside in flash.
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151 typedef struct _ctimer_config
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153 ctimer_timer_mode_t mode; /*!< Timer mode */
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154 ctimer_capture_channel_t input; /*!< Input channel to increment the timer, used only in timer
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155 modes that rely on this input signal to increment TC */
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156 uint32_t prescale; /*!< Prescale value */
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159 /*******************************************************************************
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161 ******************************************************************************/
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163 #if defined(__cplusplus)
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168 * @name Initialization and deinitialization
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173 * @brief Ungates the clock and configures the peripheral for basic operation.
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175 * @note This API should be called at the beginning of the application before using the driver.
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177 * @param base Ctimer peripheral base address
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178 * @param config Pointer to the user configuration structure.
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180 void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config);
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183 * @brief Gates the timer clock.
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185 * @param base Ctimer peripheral base address
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187 void CTIMER_Deinit(CTIMER_Type *base);
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190 * @brief Fills in the timers configuration structure with the default settings.
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192 * The default values are:
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194 * config->mode = kCTIMER_TimerMode;
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195 * config->input = kCTIMER_Capture_0;
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196 * config->prescale = 0;
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198 * @param config Pointer to the user configuration structure.
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200 void CTIMER_GetDefaultConfig(ctimer_config_t *config);
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205 * @name PWM setup operations
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210 * @brief Configures the PWM signal parameters.
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212 * Enables PWM mode on the match channel passed in and will then setup the match value
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213 * and other match parameters to generate a PWM signal.
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214 * This function will assign match channel 3 to set the PWM cycle.
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216 * @note When setting PWM output from multiple output pins, all should use the same PWM
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219 * @param base Ctimer peripheral base address
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220 * @param matchChannel Match pin to be used to output the PWM signal
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221 * @param pwmPeriod PWM period match value
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222 * @param pulsePeriod Pulse width match value
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223 * @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
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224 * if it is 0 then no interrupt is generated
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226 * @return kStatus_Success on success
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227 * kStatus_Fail If matchChannel passed in is 3; this channel is reserved to set the PWM period
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229 status_t CTIMER_SetupPwmPeriod(
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230 CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pwmPeriod, uint32_t pulsePeriod, bool enableInt);
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233 * @brief Configures the PWM signal parameters.
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235 * Enables PWM mode on the match channel passed in and will then setup the match value
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236 * and other match parameters to generate a PWM signal.
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237 * This function will assign match channel 3 to set the PWM cycle.
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239 * @note When setting PWM output from multiple output pins, all should use the same PWM
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240 * frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.
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242 * @param base Ctimer peripheral base address
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243 * @param matchChannel Match pin to be used to output the PWM signal
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244 * @param dutyCyclePercent PWM pulse width; the value should be between 0 to 100
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245 * @param pwmFreq_Hz PWM signal frequency in Hz
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246 * @param srcClock_Hz Timer counter clock in Hz
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247 * @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
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248 * if it is 0 then no interrupt is generated
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250 * @return kStatus_Success on success
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251 * kStatus_Fail If matchChannel passed in is 3; this channel is reserved to set the PWM cycle
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253 status_t CTIMER_SetupPwm(CTIMER_Type *base,
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254 ctimer_match_t matchChannel,
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255 uint8_t dutyCyclePercent,
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256 uint32_t pwmFreq_Hz,
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257 uint32_t srcClock_Hz,
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261 * @brief Updates the pulse period of an active PWM signal.
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263 * @param base Ctimer peripheral base address
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264 * @param matchChannel Match pin to be used to output the PWM signal
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265 * @param pulsePeriod New PWM pulse width match value
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267 static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)
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269 /* Update PWM pulse period match value */
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270 base->MR[matchChannel] = pulsePeriod;
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274 * @brief Updates the duty cycle of an active PWM signal.
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276 * @note Please use CTIMER_UpdatePwmPulsePeriod to update the PWM with high resolution.
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278 * @param base Ctimer peripheral base address
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279 * @param matchChannel Match pin to be used to output the PWM signal
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280 * @param dutyCyclePercent New PWM pulse width; the value should be between 0 to 100
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282 void CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, ctimer_match_t matchChannel, uint8_t dutyCyclePercent);
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287 * @brief Setup the match register.
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289 * User configuration is used to setup the match value and action to be taken when a match occurs.
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291 * @param base Ctimer peripheral base address
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292 * @param matchChannel Match register to configure
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293 * @param config Pointer to the match configuration structure
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295 void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config);
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298 * @brief Setup the capture.
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300 * @param base Ctimer peripheral base address
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301 * @param capture Capture channel to configure
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302 * @param edge Edge on the channel that will trigger a capture
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303 * @param enableInt Flag to enable channel interrupts, if enabled then the registered call back
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304 * is called upon capture
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306 void CTIMER_SetupCapture(CTIMER_Type *base,
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307 ctimer_capture_channel_t capture,
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308 ctimer_capture_edge_t edge,
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312 * @brief Get the timer count value from TC register.
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314 * @param base Ctimer peripheral base address.
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315 * @return return the timer count value.
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317 static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)
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323 * @brief Register callback.
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325 * @param base Ctimer peripheral base address
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326 * @param cb_func callback function
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327 * @param cb_type callback function type, singular or multiple
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329 void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type);
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332 * @name Interrupt Interface
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337 * @brief Enables the selected Timer interrupts.
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339 * @param base Ctimer peripheral base address
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340 * @param mask The interrupts to enable. This is a logical OR of members of the
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341 * enumeration ::ctimer_interrupt_enable_t
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343 static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)
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345 /* Enable match interrupts */
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346 base->MCR |= mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
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348 /* Enable capture interrupts */
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349 #if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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350 base->CCR |= mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK | CTIMER_CCR_CAP2I_MASK
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351 #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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352 | CTIMER_CCR_CAP3I_MASK
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353 #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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359 * @brief Disables the selected Timer interrupts.
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361 * @param base Ctimer peripheral base address
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362 * @param mask The interrupts to enable. This is a logical OR of members of the
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363 * enumeration ::ctimer_interrupt_enable_t
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365 static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)
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367 /* Disable match interrupts */
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368 base->MCR &= ~(mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK));
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370 /* Disable capture interrupts */
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371 #if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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372 base->CCR &= ~(mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK | CTIMER_CCR_CAP2I_MASK
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373 #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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374 | CTIMER_CCR_CAP3I_MASK
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375 #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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381 * @brief Gets the enabled Timer interrupts.
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383 * @param base Ctimer peripheral base address
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385 * @return The enabled interrupts. This is the logical OR of members of the
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386 * enumeration ::ctimer_interrupt_enable_t
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388 static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)
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390 uint32_t enabledIntrs = 0;
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392 /* Get all the match interrupts enabled */
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394 base->MCR & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
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396 /* Get all the capture interrupts enabled */
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397 #if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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398 enabledIntrs |= base->CCR & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK | CTIMER_CCR_CAP2I_MASK
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399 #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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400 | CTIMER_CCR_CAP3I_MASK
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401 #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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405 return enabledIntrs;
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411 * @name Status Interface
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416 * @brief Gets the Timer status flags.
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418 * @param base Ctimer peripheral base address
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420 * @return The status flags. This is the logical OR of members of the
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421 * enumeration ::ctimer_status_flags_t
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423 static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)
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429 * @brief Clears the Timer status flags.
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431 * @param base Ctimer peripheral base address
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432 * @param mask The status flags to clear. This is a logical OR of members of the
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433 * enumeration ::ctimer_status_flags_t
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435 static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)
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443 * @name Counter Start and Stop
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448 * @brief Starts the Timer counter.
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450 * @param base Ctimer peripheral base address
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452 static inline void CTIMER_StartTimer(CTIMER_Type *base)
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454 base->TCR |= CTIMER_TCR_CEN_MASK;
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458 * @brief Stops the Timer counter.
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460 * @param base Ctimer peripheral base address
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462 static inline void CTIMER_StopTimer(CTIMER_Type *base)
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464 base->TCR &= ~CTIMER_TCR_CEN_MASK;
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470 * @brief Reset the counter.
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472 * The timer counter and prescale counter are reset on the next positive edge of the APB clock.
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474 * @param base Ctimer peripheral base address
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476 static inline void CTIMER_Reset(CTIMER_Type *base)
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478 base->TCR |= CTIMER_TCR_CRST_MASK;
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479 base->TCR &= ~CTIMER_TCR_CRST_MASK;
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482 #if defined(__cplusplus)
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488 #endif /* _FSL_CTIMER_H_ */
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