2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
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3 * Copyright 2016-2019 NXP
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4 * All rights reserved.
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6 * SPDX-License-Identifier: BSD-3-Clause
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9 #include "fsl_usart.h"
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10 #include "fsl_device_registers.h"
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11 #include "fsl_flexcomm.h"
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13 /* Component ID definition, used by tools. */
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14 #ifndef FSL_COMPONENT_ID
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15 #define FSL_COMPONENT_ID "platform.drivers.flexcomm_usart"
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18 enum _usart_transfer_states
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20 kUSART_TxIdle, /* TX idle. */
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21 kUSART_TxBusy, /* TX busy. */
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22 kUSART_RxIdle, /* RX idle. */
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23 kUSART_RxBusy /* RX busy. */
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26 /*******************************************************************************
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28 ******************************************************************************/
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30 /*! @brief IRQ name array */
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31 static const IRQn_Type s_usartIRQ[] = USART_IRQS;
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33 /*! @brief Array to map USART instance number to base address. */
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34 static const uint32_t s_usartBaseAddrs[FSL_FEATURE_SOC_USART_COUNT] = USART_BASE_ADDRS;
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36 /*******************************************************************************
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38 ******************************************************************************/
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40 /* Get the index corresponding to the USART */
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41 /*! brief Returns instance number for USART peripheral base address. */
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42 uint32_t USART_GetInstance(USART_Type *base)
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46 for (i = 0; i < FSL_FEATURE_SOC_USART_COUNT; i++)
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48 if ((uint32_t)base == s_usartBaseAddrs[i])
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59 * brief Get the length of received data in RX ring buffer.
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61 * param handle USART handle pointer.
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62 * return Length of received data in RX ring buffer.
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64 size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle)
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68 /* Check arguments */
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69 assert(NULL != handle);
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71 if (handle->rxRingBufferTail > handle->rxRingBufferHead)
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73 size = (size_t)(handle->rxRingBufferHead + handle->rxRingBufferSize - handle->rxRingBufferTail);
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77 size = (size_t)(handle->rxRingBufferHead - handle->rxRingBufferTail);
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82 static bool USART_TransferIsRxRingBufferFull(usart_handle_t *handle)
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86 /* Check arguments */
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87 assert(NULL != handle);
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89 if (USART_TransferGetRxRingBufferLength(handle) == (handle->rxRingBufferSize - 1U))
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101 * brief Sets up the RX ring buffer.
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103 * This function sets up the RX ring buffer to a specific USART handle.
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105 * When the RX ring buffer is used, data received are stored into the ring buffer even when the
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106 * user doesn't call the USART_TransferReceiveNonBlocking() API. If there is already data received
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107 * in the ring buffer, the user can get the received data from the ring buffer directly.
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109 * note When using the RX ring buffer, one byte is reserved for internal use. In other
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110 * words, if p ringBufferSize is 32, then only 31 bytes are used for saving data.
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112 * param base USART peripheral base address.
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113 * param handle USART handle pointer.
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114 * param ringBuffer Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.
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115 * param ringBufferSize size of the ring buffer.
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117 void USART_TransferStartRingBuffer(USART_Type *base, usart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)
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119 /* Check arguments */
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120 assert(NULL != base);
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121 assert(NULL != handle);
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122 assert(NULL != ringBuffer);
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124 /* Setup the ringbuffer address */
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125 handle->rxRingBuffer = ringBuffer;
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126 handle->rxRingBufferSize = ringBufferSize;
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127 handle->rxRingBufferHead = 0U;
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128 handle->rxRingBufferTail = 0U;
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129 /* ring buffer is ready we can start receiving data */
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130 base->FIFOINTENSET |= USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
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134 * brief Aborts the background transfer and uninstalls the ring buffer.
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136 * This function aborts the background transfer and uninstalls the ring buffer.
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138 * param base USART peripheral base address.
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139 * param handle USART handle pointer.
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141 void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle)
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143 /* Check arguments */
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144 assert(NULL != base);
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145 assert(NULL != handle);
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147 if (handle->rxState == kUSART_RxIdle)
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149 base->FIFOINTENCLR = USART_FIFOINTENCLR_RXLVL_MASK | USART_FIFOINTENCLR_RXERR_MASK;
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151 handle->rxRingBuffer = NULL;
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152 handle->rxRingBufferSize = 0U;
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153 handle->rxRingBufferHead = 0U;
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154 handle->rxRingBufferTail = 0U;
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158 * brief Initializes a USART instance with user configuration structure and peripheral clock.
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160 * This function configures the USART module with the user-defined settings. The user can configure the configuration
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161 * structure and also get the default configuration by using the USART_GetDefaultConfig() function.
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162 * Example below shows how to use this API to configure USART.
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164 * usart_config_t usartConfig;
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165 * usartConfig.baudRate_Bps = 115200U;
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166 * usartConfig.parityMode = kUSART_ParityDisabled;
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167 * usartConfig.stopBitCount = kUSART_OneStopBit;
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168 * USART_Init(USART1, &usartConfig, 20000000U);
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171 * param base USART peripheral base address.
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172 * param config Pointer to user-defined configuration structure.
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173 * param srcClock_Hz USART clock source frequency in HZ.
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174 * retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
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175 * retval kStatus_InvalidArgument USART base address is not valid
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176 * retval kStatus_Success Status USART initialize succeed
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178 status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)
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182 /* check arguments */
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183 assert(!((NULL == base) || (NULL == config) || (0 == srcClock_Hz)));
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184 if ((NULL == base) || (NULL == config) || (0 == srcClock_Hz))
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186 return kStatus_InvalidArgument;
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189 /* initialize flexcomm to USART mode */
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190 result = FLEXCOMM_Init(base, FLEXCOMM_PERIPH_USART);
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191 if (kStatus_Success != result)
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196 if (config->enableTx)
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198 /* empty and enable txFIFO */
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199 base->FIFOCFG |= USART_FIFOCFG_EMPTYTX_MASK | USART_FIFOCFG_ENABLETX_MASK;
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200 /* setup trigger level */
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201 base->FIFOTRIG &= ~(USART_FIFOTRIG_TXLVL_MASK);
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202 base->FIFOTRIG |= USART_FIFOTRIG_TXLVL(config->txWatermark);
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203 /* enable trigger interrupt */
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204 base->FIFOTRIG |= USART_FIFOTRIG_TXLVLENA_MASK;
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207 /* empty and enable rxFIFO */
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208 if (config->enableRx)
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210 base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK | USART_FIFOCFG_ENABLERX_MASK;
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211 /* setup trigger level */
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212 base->FIFOTRIG &= ~(USART_FIFOTRIG_RXLVL_MASK);
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213 base->FIFOTRIG |= USART_FIFOTRIG_RXLVL(config->rxWatermark);
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214 /* enable trigger interrupt */
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215 base->FIFOTRIG |= USART_FIFOTRIG_RXLVLENA_MASK;
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217 /* setup configuration and enable USART */
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218 base->CFG = USART_CFG_PARITYSEL(config->parityMode) | USART_CFG_STOPLEN(config->stopBitCount) |
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219 USART_CFG_DATALEN(config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) |
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220 USART_CFG_SYNCEN(config->syncMode >> 1) | USART_CFG_SYNCMST(config->syncMode) |
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221 USART_CFG_CLKPOL(config->clockPolarity) | USART_CFG_ENABLE_MASK;
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223 /* Setup baudrate */
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224 result = USART_SetBaudRate(base, config->baudRate_Bps, srcClock_Hz);
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225 if (kStatus_Success != result)
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229 /* Setting continuous Clock configuration. used for synchronous mode. */
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230 USART_EnableContinuousSCLK(base, config->enableContinuousSCLK);
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232 return kStatus_Success;
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236 * brief Deinitializes a USART instance.
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238 * This function waits for TX complete, disables TX and RX, and disables the USART clock.
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240 * param base USART peripheral base address.
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242 void USART_Deinit(USART_Type *base)
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244 /* Check arguments */
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245 assert(NULL != base);
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246 while (!(base->STAT & USART_STAT_TXIDLE_MASK))
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249 /* Disable interrupts, disable dma requests, disable peripheral */
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250 base->FIFOINTENCLR = USART_FIFOINTENCLR_TXERR_MASK | USART_FIFOINTENCLR_RXERR_MASK | USART_FIFOINTENCLR_TXLVL_MASK |
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251 USART_FIFOINTENCLR_RXLVL_MASK;
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252 base->FIFOCFG &= ~(USART_FIFOCFG_DMATX_MASK | USART_FIFOCFG_DMARX_MASK);
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253 base->CFG &= ~(USART_CFG_ENABLE_MASK);
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257 * brief Gets the default configuration structure.
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259 * This function initializes the USART configuration structure to a default value. The default
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261 * usartConfig->baudRate_Bps = 115200U;
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262 * usartConfig->parityMode = kUSART_ParityDisabled;
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263 * usartConfig->stopBitCount = kUSART_OneStopBit;
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264 * usartConfig->bitCountPerChar = kUSART_8BitsPerChar;
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265 * usartConfig->loopback = false;
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266 * usartConfig->enableTx = false;
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267 * usartConfig->enableRx = false;
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269 * param config Pointer to configuration structure.
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271 void USART_GetDefaultConfig(usart_config_t *config)
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273 /* Check arguments */
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274 assert(NULL != config);
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276 /* Initializes the configure structure to zero. */
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277 memset(config, 0, sizeof(*config));
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279 /* Set always all members ! */
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280 config->baudRate_Bps = 115200U;
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281 config->parityMode = kUSART_ParityDisabled;
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282 config->stopBitCount = kUSART_OneStopBit;
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283 config->bitCountPerChar = kUSART_8BitsPerChar;
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284 config->loopback = false;
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285 config->enableRx = false;
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286 config->enableTx = false;
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287 config->txWatermark = kUSART_TxFifo0;
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288 config->rxWatermark = kUSART_RxFifo1;
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289 config->syncMode = kUSART_SyncModeDisabled;
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290 config->enableContinuousSCLK = false;
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291 config->clockPolarity = kUSART_RxSampleOnFallingEdge;
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295 * brief Sets the USART instance baud rate.
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297 * This function configures the USART module baud rate. This function is used to update
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298 * the USART module baud rate after the USART module is initialized by the USART_Init.
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300 * USART_SetBaudRate(USART1, 115200U, 20000000U);
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303 * param base USART peripheral base address.
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304 * param baudrate_Bps USART baudrate to be set.
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305 * param srcClock_Hz USART clock source frequency in HZ.
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306 * retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
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307 * retval kStatus_Success Set baudrate succeed.
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308 * retval kStatus_InvalidArgument One or more arguments are invalid.
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310 status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)
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312 uint32_t best_diff = (uint32_t)-1, best_osrval = 0xf, best_brgval = (uint32_t)-1;
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313 uint32_t osrval, brgval, diff, baudrate;
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315 /* check arguments */
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316 assert(!((NULL == base) || (0 == baudrate_Bps) || (0 == srcClock_Hz)));
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317 if ((NULL == base) || (0 == baudrate_Bps) || (0 == srcClock_Hz))
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319 return kStatus_InvalidArgument;
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322 /* If synchronous master mode is enabled, only configure the BRG value. */
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323 if (base->CFG & USART_CFG_SYNCEN_MASK)
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325 if (base->CFG & USART_CFG_SYNCMST_MASK)
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327 brgval = srcClock_Hz / baudrate_Bps;
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328 base->BRG = brgval - 1;
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334 * Smaller values of OSR can make the sampling position within a data bit less accurate and may
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335 * potentially cause more noise errors or incorrect data.
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337 for (osrval = best_osrval; osrval >= 8; osrval--)
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339 brgval = (srcClock_Hz / ((osrval + 1) * baudrate_Bps)) - 1;
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340 if (brgval > 0xFFFF)
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344 baudrate = srcClock_Hz / ((osrval + 1) * (brgval + 1));
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345 diff = baudrate_Bps < baudrate ? baudrate - baudrate_Bps : baudrate_Bps - baudrate;
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346 if (diff < best_diff)
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349 best_osrval = osrval;
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350 best_brgval = brgval;
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354 /* value over range */
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355 if (best_brgval > 0xFFFF)
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357 return kStatus_USART_BaudrateNotSupport;
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360 base->OSR = best_osrval;
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361 base->BRG = best_brgval;
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364 return kStatus_Success;
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368 * brief Writes to the TX register using a blocking method.
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370 * This function polls the TX register, waits for the TX register to be empty or for the TX FIFO
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371 * to have room and writes data to the TX buffer.
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373 * param base USART peripheral base address.
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374 * param data Start address of the data to write.
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375 * param length Size of the data to write.
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377 void USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)
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379 /* Check arguments */
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380 assert(!((NULL == base) || (NULL == data)));
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381 if ((NULL == base) || (NULL == data))
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385 /* Check whether txFIFO is enabled */
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386 if (!(base->FIFOCFG & USART_FIFOCFG_ENABLETX_MASK))
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390 for (; length > 0; length--)
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392 /* Loop until txFIFO get some space for new data */
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393 while (!(base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK))
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396 base->FIFOWR = *data;
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399 /* Wait to finish transfer */
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400 while (!(base->STAT & USART_STAT_TXIDLE_MASK))
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406 * brief Read RX data register using a blocking method.
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408 * This function polls the RX register, waits for the RX register to be full or for RX FIFO to
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409 * have data and read data from the TX register.
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411 * param base USART peripheral base address.
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412 * param data Start address of the buffer to store the received data.
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413 * param length Size of the buffer.
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414 * retval kStatus_USART_FramingError Receiver overrun happened while receiving data.
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415 * retval kStatus_USART_ParityError Noise error happened while receiving data.
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416 * retval kStatus_USART_NoiseError Framing error happened while receiving data.
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417 * retval kStatus_USART_RxError Overflow or underflow rxFIFO happened.
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418 * retval kStatus_Success Successfully received all data.
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420 status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)
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424 /* check arguments */
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425 assert(!((NULL == base) || (NULL == data)));
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426 if ((NULL == base) || (NULL == data))
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428 return kStatus_InvalidArgument;
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431 /* Check whether rxFIFO is enabled */
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432 if (!(base->FIFOCFG & USART_FIFOCFG_ENABLERX_MASK))
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434 return kStatus_Fail;
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436 for (; length > 0; length--)
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438 /* loop until rxFIFO have some data to read */
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439 while (!(base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK))
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442 /* check receive status */
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443 status = base->STAT;
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444 if (status & USART_STAT_FRAMERRINT_MASK)
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446 base->STAT |= USART_STAT_FRAMERRINT_MASK;
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447 return kStatus_USART_FramingError;
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449 if (status & USART_STAT_PARITYERRINT_MASK)
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451 base->STAT |= USART_STAT_PARITYERRINT_MASK;
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452 return kStatus_USART_ParityError;
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454 if (status & USART_STAT_RXNOISEINT_MASK)
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456 base->STAT |= USART_STAT_RXNOISEINT_MASK;
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457 return kStatus_USART_NoiseError;
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459 /* check rxFIFO status */
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460 if (base->FIFOSTAT & USART_FIFOSTAT_RXERR_MASK)
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462 base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
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463 base->FIFOSTAT |= USART_FIFOSTAT_RXERR_MASK;
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464 return kStatus_USART_RxError;
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467 *data = base->FIFORD;
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470 return kStatus_Success;
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474 * brief Initializes the USART handle.
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476 * This function initializes the USART handle which can be used for other USART
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477 * transactional APIs. Usually, for a specified USART instance,
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478 * call this API once to get the initialized handle.
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480 * param base USART peripheral base address.
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481 * param handle USART handle pointer.
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482 * param callback The callback function.
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483 * param userData The parameter of the callback function.
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485 status_t USART_TransferCreateHandle(USART_Type *base,
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486 usart_handle_t *handle,
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487 usart_transfer_callback_t callback,
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490 int32_t instance = 0;
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493 assert(!((NULL == base) || (NULL == handle)));
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494 if ((NULL == base) || (NULL == handle))
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496 return kStatus_InvalidArgument;
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499 instance = USART_GetInstance(base);
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501 memset(handle, 0, sizeof(*handle));
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502 /* Set the TX/RX state. */
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503 handle->rxState = kUSART_RxIdle;
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504 handle->txState = kUSART_TxIdle;
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505 /* Set the callback and user data. */
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506 handle->callback = callback;
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507 handle->userData = userData;
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508 handle->rxWatermark = (usart_rxfifo_watermark_t)USART_FIFOTRIG_RXLVL_GET(base);
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509 handle->txWatermark = (usart_txfifo_watermark_t)USART_FIFOTRIG_TXLVL_GET(base);
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511 FLEXCOMM_SetIRQHandler(base, (flexcomm_irq_handler_t)USART_TransferHandleIRQ, handle);
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513 /* Enable interrupt in NVIC. */
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514 EnableIRQ(s_usartIRQ[instance]);
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516 return kStatus_Success;
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520 * brief Transmits a buffer of data using the interrupt method.
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522 * This function sends data using an interrupt method. This is a non-blocking function, which
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523 * returns directly without waiting for all data to be written to the TX register. When
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524 * all data is written to the TX register in the IRQ handler, the USART driver calls the callback
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525 * function and passes the ref kStatus_USART_TxIdle as status parameter.
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527 * note The kStatus_USART_TxIdle is passed to the upper layer when all data is written
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528 * to the TX register. However it does not ensure that all data are sent out. Before disabling the TX,
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529 * check the kUSART_TransmissionCompleteFlag to ensure that the TX is finished.
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531 * param base USART peripheral base address.
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532 * param handle USART handle pointer.
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533 * param xfer USART transfer structure. See #usart_transfer_t.
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534 * retval kStatus_Success Successfully start the data transmission.
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535 * retval kStatus_USART_TxBusy Previous transmission still not finished, data not all written to TX register yet.
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536 * retval kStatus_InvalidArgument Invalid argument.
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538 status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)
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540 /* Check arguments */
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541 assert(!((NULL == base) || (NULL == handle) || (NULL == xfer)));
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542 if ((NULL == base) || (NULL == handle) || (NULL == xfer))
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544 return kStatus_InvalidArgument;
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546 /* Check xfer members */
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547 assert(!((0 == xfer->dataSize) || (NULL == xfer->data)));
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548 if ((0 == xfer->dataSize) || (NULL == xfer->data))
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550 return kStatus_InvalidArgument;
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553 /* Return error if current TX busy. */
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554 if (kUSART_TxBusy == handle->txState)
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556 return kStatus_USART_TxBusy;
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560 handle->txData = xfer->data;
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561 handle->txDataSize = xfer->dataSize;
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562 handle->txDataSizeAll = xfer->dataSize;
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563 handle->txState = kUSART_TxBusy;
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564 /* Enable transmiter interrupt. */
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565 base->FIFOINTENSET |= USART_FIFOINTENSET_TXLVL_MASK;
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567 return kStatus_Success;
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571 * brief Aborts the interrupt-driven data transmit.
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573 * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
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574 * how many bytes are still not sent out.
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576 * param base USART peripheral base address.
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577 * param handle USART handle pointer.
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579 void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle)
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581 assert(NULL != handle);
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583 /* Disable interrupts */
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584 USART_DisableInterrupts(base, kUSART_TxLevelInterruptEnable);
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586 base->FIFOCFG |= USART_FIFOCFG_EMPTYTX_MASK;
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588 handle->txDataSize = 0;
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589 handle->txState = kUSART_TxIdle;
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593 * brief Get the number of bytes that have been written to USART TX register.
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595 * This function gets the number of bytes that have been written to USART TX
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596 * register by interrupt method.
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598 * param base USART peripheral base address.
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599 * param handle USART handle pointer.
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600 * param count Send bytes count.
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601 * retval kStatus_NoTransferInProgress No send in progress.
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602 * retval kStatus_InvalidArgument Parameter is invalid.
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603 * retval kStatus_Success Get successfully through the parameter \p count;
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605 status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)
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607 assert(NULL != handle);
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608 assert(NULL != count);
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610 if (kUSART_TxIdle == handle->txState)
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612 return kStatus_NoTransferInProgress;
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615 *count = handle->txDataSizeAll - handle->txDataSize;
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617 return kStatus_Success;
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621 * brief Receives a buffer of data using an interrupt method.
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623 * This function receives data using an interrupt method. This is a non-blocking function, which
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624 * returns without waiting for all data to be received.
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625 * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
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626 * the parameter p receivedBytes shows how many bytes are copied from the ring buffer.
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627 * After copying, if the data in the ring buffer is not enough to read, the receive
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628 * request is saved by the USART driver. When the new data arrives, the receive request
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629 * is serviced first. When all data is received, the USART driver notifies the upper layer
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630 * through a callback function and passes the status parameter ref kStatus_USART_RxIdle.
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631 * For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer.
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632 * The 5 bytes are copied to the xfer->data and this function returns with the
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633 * parameter p receivedBytes set to 5. For the left 5 bytes, newly arrived data is
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634 * saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer.
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635 * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
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636 * to receive data to the xfer->data. When all data is received, the upper layer is notified.
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638 * param base USART peripheral base address.
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639 * param handle USART handle pointer.
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640 * param xfer USART transfer structure, see #usart_transfer_t.
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641 * param receivedBytes Bytes received from the ring buffer directly.
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642 * retval kStatus_Success Successfully queue the transfer into transmit queue.
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643 * retval kStatus_USART_RxBusy Previous receive request is not finished.
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644 * retval kStatus_InvalidArgument Invalid argument.
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646 status_t USART_TransferReceiveNonBlocking(USART_Type *base,
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647 usart_handle_t *handle,
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648 usart_transfer_t *xfer,
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649 size_t *receivedBytes)
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652 /* How many bytes to copy from ring buffer to user memory. */
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653 size_t bytesToCopy = 0U;
\r
654 /* How many bytes to receive. */
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655 size_t bytesToReceive;
\r
656 /* How many bytes currently have received. */
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657 size_t bytesCurrentReceived;
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658 uint32_t regPrimask = 0U;
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660 /* Check arguments */
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661 assert(!((NULL == base) || (NULL == handle) || (NULL == xfer)));
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662 if ((NULL == base) || (NULL == handle) || (NULL == xfer))
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664 return kStatus_InvalidArgument;
\r
666 /* Check xfer members */
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667 assert(!((0 == xfer->dataSize) || (NULL == xfer->data)));
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668 if ((0 == xfer->dataSize) || (NULL == xfer->data))
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670 return kStatus_InvalidArgument;
\r
673 /* How to get data:
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674 1. If RX ring buffer is not enabled, then save xfer->data and xfer->dataSize
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675 to uart handle, enable interrupt to store received data to xfer->data. When
\r
676 all data received, trigger callback.
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677 2. If RX ring buffer is enabled and not empty, get data from ring buffer first.
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678 If there are enough data in ring buffer, copy them to xfer->data and return.
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679 If there are not enough data in ring buffer, copy all of them to xfer->data,
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680 save the xfer->data remained empty space to uart handle, receive data
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681 to this empty space and trigger callback when finished. */
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682 if (kUSART_RxBusy == handle->rxState)
\r
684 return kStatus_USART_RxBusy;
\r
688 bytesToReceive = xfer->dataSize;
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689 bytesCurrentReceived = 0U;
\r
690 /* If RX ring buffer is used. */
\r
691 if (handle->rxRingBuffer)
\r
693 /* Disable IRQ, protect ring buffer. */
\r
694 regPrimask = DisableGlobalIRQ();
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695 /* How many bytes in RX ring buffer currently. */
\r
696 bytesToCopy = USART_TransferGetRxRingBufferLength(handle);
\r
699 bytesToCopy = MIN(bytesToReceive, bytesToCopy);
\r
700 bytesToReceive -= bytesToCopy;
\r
701 /* Copy data from ring buffer to user memory. */
\r
702 for (i = 0U; i < bytesToCopy; i++)
\r
704 xfer->data[bytesCurrentReceived++] = handle->rxRingBuffer[handle->rxRingBufferTail];
\r
705 /* Wrap to 0. Not use modulo (%) because it might be large and slow. */
\r
706 if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
\r
708 handle->rxRingBufferTail = 0U;
\r
712 handle->rxRingBufferTail++;
\r
716 /* If ring buffer does not have enough data, still need to read more data. */
\r
717 if (bytesToReceive)
\r
719 /* No data in ring buffer, save the request to UART handle. */
\r
720 handle->rxData = xfer->data + bytesCurrentReceived;
\r
721 handle->rxDataSize = bytesToReceive;
\r
722 handle->rxDataSizeAll = bytesToReceive;
\r
723 handle->rxState = kUSART_RxBusy;
\r
725 /* Enable IRQ if previously enabled. */
\r
726 EnableGlobalIRQ(regPrimask);
\r
727 /* Call user callback since all data are received. */
\r
728 if (0 == bytesToReceive)
\r
730 if (handle->callback)
\r
732 handle->callback(base, handle, kStatus_USART_RxIdle, handle->userData);
\r
736 /* Ring buffer not used. */
\r
739 handle->rxData = xfer->data + bytesCurrentReceived;
\r
740 handle->rxDataSize = bytesToReceive;
\r
741 handle->rxDataSizeAll = bytesToReceive;
\r
742 handle->rxState = kUSART_RxBusy;
\r
744 /* Enable RX interrupt. */
\r
745 base->FIFOINTENSET |= USART_FIFOINTENSET_RXLVL_MASK;
\r
747 /* Return the how many bytes have read. */
\r
750 *receivedBytes = bytesCurrentReceived;
\r
753 return kStatus_Success;
\r
757 * brief Aborts the interrupt-driven data receiving.
\r
759 * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
\r
760 * how many bytes not received yet.
\r
762 * param base USART peripheral base address.
\r
763 * param handle USART handle pointer.
\r
765 void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle)
\r
767 assert(NULL != handle);
\r
769 /* Only abort the receive to handle->rxData, the RX ring buffer is still working. */
\r
770 if (!handle->rxRingBuffer)
\r
772 /* Disable interrupts */
\r
773 USART_DisableInterrupts(base, kUSART_RxLevelInterruptEnable);
\r
775 base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
\r
778 handle->rxDataSize = 0U;
\r
779 handle->rxState = kUSART_RxIdle;
\r
783 * brief Get the number of bytes that have been received.
\r
785 * This function gets the number of bytes that have been received.
\r
787 * param base USART peripheral base address.
\r
788 * param handle USART handle pointer.
\r
789 * param count Receive bytes count.
\r
790 * retval kStatus_NoTransferInProgress No receive in progress.
\r
791 * retval kStatus_InvalidArgument Parameter is invalid.
\r
792 * retval kStatus_Success Get successfully through the parameter \p count;
\r
794 status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)
\r
796 assert(NULL != handle);
\r
797 assert(NULL != count);
\r
799 if (kUSART_RxIdle == handle->rxState)
\r
801 return kStatus_NoTransferInProgress;
\r
804 *count = handle->rxDataSizeAll - handle->rxDataSize;
\r
806 return kStatus_Success;
\r
810 * brief USART IRQ handle function.
\r
812 * This function handles the USART transmit and receive IRQ request.
\r
814 * param base USART peripheral base address.
\r
815 * param handle USART handle pointer.
\r
817 void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)
\r
819 /* Check arguments */
\r
820 assert((NULL != base) && (NULL != handle));
\r
822 bool receiveEnabled = (handle->rxDataSize) || (handle->rxRingBuffer);
\r
823 bool sendEnabled = handle->txDataSize;
\r
825 /* If RX overrun. */
\r
826 if (base->FIFOSTAT & USART_FIFOSTAT_RXERR_MASK)
\r
828 /* Clear rx error state. */
\r
829 base->FIFOSTAT |= USART_FIFOSTAT_RXERR_MASK;
\r
831 base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
\r
832 /* Trigger callback. */
\r
833 if (handle->callback)
\r
835 handle->callback(base, handle, kStatus_USART_RxError, handle->userData);
\r
838 while ((receiveEnabled && (base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK)) ||
\r
839 (sendEnabled && (base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK)))
\r
842 if (receiveEnabled && (base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK))
\r
844 /* Receive to app bufffer if app buffer is present */
\r
845 if (handle->rxDataSize)
\r
847 *handle->rxData = base->FIFORD;
\r
848 handle->rxDataSize--;
\r
850 receiveEnabled = ((handle->rxDataSize != 0) || (handle->rxRingBuffer));
\r
851 if (!handle->rxDataSize)
\r
853 if (!handle->rxRingBuffer)
\r
855 base->FIFOINTENCLR = USART_FIFOINTENCLR_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
\r
857 handle->rxState = kUSART_RxIdle;
\r
858 if (handle->callback)
\r
860 handle->callback(base, handle, kStatus_USART_RxIdle, handle->userData);
\r
864 /* Otherwise receive to ring buffer if ring buffer is present */
\r
867 if (handle->rxRingBuffer)
\r
869 /* If RX ring buffer is full, trigger callback to notify over run. */
\r
870 if (USART_TransferIsRxRingBufferFull(handle))
\r
872 if (handle->callback)
\r
874 handle->callback(base, handle, kStatus_USART_RxRingBufferOverrun, handle->userData);
\r
877 /* If ring buffer is still full after callback function, the oldest data is overridden. */
\r
878 if (USART_TransferIsRxRingBufferFull(handle))
\r
880 /* Increase handle->rxRingBufferTail to make room for new data. */
\r
881 if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
\r
883 handle->rxRingBufferTail = 0U;
\r
887 handle->rxRingBufferTail++;
\r
891 handle->rxRingBuffer[handle->rxRingBufferHead] = base->FIFORD;
\r
892 /* Increase handle->rxRingBufferHead. */
\r
893 if (handle->rxRingBufferHead + 1U == handle->rxRingBufferSize)
\r
895 handle->rxRingBufferHead = 0U;
\r
899 handle->rxRingBufferHead++;
\r
905 if (sendEnabled && (base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK))
\r
907 base->FIFOWR = *handle->txData;
\r
908 handle->txDataSize--;
\r
910 sendEnabled = handle->txDataSize != 0;
\r
913 base->FIFOINTENCLR = USART_FIFOINTENCLR_TXLVL_MASK;
\r
914 handle->txState = kUSART_TxIdle;
\r
915 if (handle->callback)
\r
917 handle->callback(base, handle, kStatus_USART_TxIdle, handle->userData);
\r
923 /* ring buffer is not used */
\r
924 if (NULL == handle->rxRingBuffer)
\r
926 /* restore if rx transfer ends and rxLevel is different from default value */
\r
927 if ((handle->rxDataSize == 0) && (USART_FIFOTRIG_RXLVL_GET(base) != handle->rxWatermark))
\r
930 (base->FIFOTRIG & (~USART_FIFOTRIG_RXLVL_MASK)) | USART_FIFOTRIG_RXLVL(handle->rxWatermark);
\r
932 /* decrease level if rx transfer is bellow */
\r
933 if ((handle->rxDataSize != 0) && (handle->rxDataSize < (USART_FIFOTRIG_RXLVL_GET(base) + 1)))
\r
936 (base->FIFOTRIG & (~USART_FIFOTRIG_RXLVL_MASK)) | (USART_FIFOTRIG_RXLVL(handle->rxDataSize - 1));
\r