git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c

   1 /*\r
   2  * FreeRTOS Kernel V10.2.1\r
   3  * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6  * this software and associated documentation files (the "Software"), to deal in\r
   7  * the Software without restriction, including without limitation the rights to\r
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10  * subject to the following conditions:\r
  11  *\r
  12  * The above copyright notice and this permission notice shall be included in all\r
  13  * copies or substantial portions of the Software.\r
  14  *\r
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  21  *\r
  22  * http://www.FreeRTOS.org\r
  23  * http://aws.amazon.com/freertos\r
  24  *\r
  25  * 1 tab == 4 spaces!\r
  26  */\r
  27 \r
  28 /* \r
  29  * "Reg test" tasks - These fill the registers with known values, then check\r
  30  * that each register maintains its expected value for the lifetime of the\r
  31  * task.  Each task uses a different set of values.  The reg test tasks execute\r
  32  * with a very low priority, so get preempted very frequently.  A register\r
  33  * containing an unexpected value is indicative of an error in the context\r
  34  * switching mechanism.\r
  35  */\r
  36  \r
  37 void vRegTest1Task( void ) __attribute__((naked));\r
  38 void vRegTest2Task( void ) __attribute__((naked));\r
  39 \r
  40 void vRegTest1Task( void )\r
  41 {\r
  42         __asm volatile\r
  43         (\r
  44                 ".extern ulRegTest1LoopCounter          \n"\r
  45                 "                                                                       \n"\r
  46                 "       /* Fill the core registers with known values. */ \n"\r
  47                 "       movs r1, #101                                   \n"\r
  48                 "       movs r2, #102                                   \n"\r
  49                 "       movs r3, #103                                   \n"\r
  50                 "       movs r4, #104                                   \n"\r
  51                 "       movs r5, #105                                   \n"\r
  52                 "       movs r6, #106                                   \n"\r
  53                 "       movs r7, #107                                   \n"\r
  54                 "       movs r0, #108                                   \n"\r
  55                 "       mov      r8, r0                                         \n"\r
  56                 "       movs r0, #109                                   \n"\r
  57                 "       mov  r9, r0                                             \n"\r
  58                 "       movs r0, #110                                   \n"\r
  59                 "       mov      r10, r0                                        \n"\r
  60                 "       movs r0, #111                                   \n"\r
  61                 "       mov      r11, r0                                        \n"\r
  62                 "       movs r0, #112                                   \n"\r
  63                 "       mov  r12, r0                                    \n"\r
  64                 "       movs r0, #100                                   \n"\r
  65                 "                                                                       \n"\r
  66                 "reg1_loop:                                                     \n"\r
  67                 "                                                                       \n"\r
  68                 "       cmp     r0, #100                                        \n"\r
  69                 "       bne     reg1_error_loop                         \n"\r
  70                 "       cmp     r1, #101                                        \n"\r
  71                 "       bne     reg1_error_loop                         \n"\r
  72                 "       cmp     r2, #102                                        \n"\r
  73                 "       bne     reg1_error_loop                         \n"\r
  74                 "       cmp r3, #103                                    \n"\r
  75                 "       bne     reg1_error_loop                         \n"\r
  76                 "       cmp     r4, #104                                        \n"\r
  77                 "       bne     reg1_error_loop                         \n"\r
  78                 "       cmp     r5, #105                                        \n"\r
  79                 "       bne     reg1_error_loop                         \n"\r
  80                 "       cmp     r6, #106                                        \n"\r
  81                 "       bne     reg1_error_loop                         \n"\r
  82                 "       cmp     r7, #107                                        \n"\r
  83                 "       bne     reg1_error_loop                         \n"\r
  84                 "       movs r0, #108                                   \n"\r
  85                 "       cmp     r8, r0                                          \n"\r
  86                 "       bne     reg1_error_loop                         \n"\r
  87                 "       movs r0, #109                                   \n"\r
  88                 "       cmp     r9, r0                                          \n"\r
  89                 "       bne     reg1_error_loop                         \n"\r
  90                 "       movs r0, #110                                   \n"\r
  91                 "       cmp     r10, r0                                         \n"\r
  92                 "       bne     reg1_error_loop                         \n"\r
  93                 "       movs r0, #111                                   \n"\r
  94                 "       cmp     r11, r0                                         \n"\r
  95                 "       bne     reg1_error_loop                         \n"\r
  96                 "       movs r0, #112                                   \n"\r
  97                 "       cmp     r12, r0                                         \n"\r
  98                 "       bne     reg1_error_loop                         \n"\r
  99                 "                                                                       \n"\r
 100                 "       /* Everything passed, increment the loop counter. */ \n"\r
 101                 "       push { r1 }                                             \n"\r
 102                 "       ldr     r0, =ulRegTest1LoopCounter      \n"\r
 103                 "       ldr r1, [r0]                                    \n"\r
 104                 "       add r1, r1, #1                                  \n"\r
 105                 "       str r1, [r0]                                    \n"\r
 106                 "                                                                       \n"\r
 107                 "       /* Yield to increase test coverage. */ \n"\r
 108                 "       movs r0, #0x01                                  \n"\r
 109                 "       ldr r1, =0xe000ed04                     \n" /*NVIC_INT_CTRL */\r
 110                 "       lsl r0, #28                                     \n" /* Shift to PendSV bit */\r
 111                 "       str r0, [r1]                                    \n"\r
 112                 "       dsb                                                             \n"\r
 113                 "       pop { r1 }                                              \n"\r
 114                 "                                                                       \n"\r
 115                 "       /* Start again. */                              \n"\r
 116                 "       movs r0, #100                                   \n"\r
 117                 "       b reg1_loop                                             \n"\r
 118                 "                                                                       \n"\r
 119                 "reg1_error_loop:                                       \n"\r
 120                 "       /* If this line is hit then there was an error in a core register value.        \n"\r
 121                 "       The loop ensures the loop counter stops incrementing. */                                        \n"\r
 122                 "       b reg1_error_loop                               \n"\r
 123                 "       nop                                                             \n"\r
 124         );\r
 125 }\r
 126 /*-----------------------------------------------------------*/\r
 127 \r
 128 void vRegTest2Task( void )\r
 129 {\r
 130         __asm volatile\r
 131         (\r
 132                 ".extern ulRegTest2LoopCounter          \n"\r
 133                 "                                                                       \n"\r
 134                 "       /* Fill the core registers with known values. */ \n"\r
 135                 "       movs r1, #1                                             \n"\r
 136                 "       movs r2, #2                                             \n"\r
 137                 "       movs r3, #3                                             \n"\r
 138                 "       movs r4, #4                                             \n"\r
 139                 "       movs r5, #5                                             \n"\r
 140                 "       movs r6, #6                                             \n"\r
 141                 "       movs r7, #7                                             \n"\r
 142                 "       movs r0, #8                                             \n"\r
 143                 "       movs r8, r0                                             \n"\r
 144                 "       movs r0, #9                                             \n"\r
 145                 "       mov  r9, r0                                             \n"\r
 146                 "       movs r0, #10                                    \n"\r
 147                 "       mov      r10, r0                                        \n"\r
 148                 "       movs r0, #11                                    \n"\r
 149                 "       mov      r11, r0                                        \n"\r
 150                 "       movs r0, #12                                    \n"\r
 151                 "       mov  r12, r0                                    \n"\r
 152                 "       movs r0, #10                                    \n"\r
 153                 "                                                                       \n"\r
 154                 "reg2_loop:                                                     \n"\r
 155                 "                                                                       \n"\r
 156                 "       cmp     r0, #10                                         \n"\r
 157                 "       bne     reg2_error_loop                         \n"\r
 158                 "       cmp     r1, #1                                          \n"\r
 159                 "       bne     reg2_error_loop                         \n"\r
 160                 "       cmp     r2, #2                                          \n"\r
 161                 "       bne     reg2_error_loop                         \n"\r
 162                 "       cmp r3, #3                                              \n"\r
 163                 "       bne     reg2_error_loop                         \n"\r
 164                 "       cmp     r4, #4                                          \n"\r
 165                 "       bne     reg2_error_loop                         \n"\r
 166                 "       cmp     r5, #5                                          \n"\r
 167                 "       bne     reg2_error_loop                         \n"\r
 168                 "       cmp     r6, #6                                          \n"\r
 169                 "       bne     reg2_error_loop                         \n"\r
 170                 "       cmp     r7, #7                                          \n"\r
 171                 "       bne     reg2_error_loop                         \n"\r
 172                 "       movs r0, #8                                             \n"\r
 173                 "       cmp     r8, r0                                          \n"\r
 174                 "       bne     reg2_error_loop                         \n"\r
 175                 "       movs r0, #9                                             \n"\r
 176                 "       cmp     r9, r0                                          \n"\r
 177                 "       bne     reg2_error_loop                         \n"\r
 178                 "       movs r0, #10                                    \n"\r
 179                 "       cmp     r10, r0                                         \n"\r
 180                 "       bne     reg2_error_loop                         \n"\r
 181                 "       movs r0, #11                                    \n"\r
 182                 "       cmp     r11, r0                                         \n"\r
 183                 "       bne     reg2_error_loop                         \n"\r
 184                 "       movs r0, #12                                    \n"\r
 185                 "       cmp     r12, r0                                         \n"\r
 186                 "       bne     reg2_error_loop                         \n"\r
 187                 "                                                                       \n"\r
 188                 "       /* Everything passed, increment the loop counter. */ \n"\r
 189                 "       push { r1 }                                             \n"\r
 190                 "       ldr     r0, =ulRegTest2LoopCounter      \n"\r
 191                 "       ldr r1, [r0]                                    \n"\r
 192                 "       add r1, r1, #1                                  \n"\r
 193                 "       str r1, [r0]                                    \n"\r
 194                 "       pop { r1 }                                              \n"\r
 195                 "                                                                       \n"\r
 196                 "       /* Start again. */                              \n"\r
 197                 "       movs r0, #10                                    \n"\r
 198                 "       b reg2_loop                                             \n"\r
 199                 "                                                                       \n"\r
 200                 "reg2_error_loop:                                       \n"\r
 201                 "       /* If this line is hit then there was an error in a core register value.        \n"\r
 202                 "       The loop ensures the loop counter stops incrementing. */                                        \n"\r
 203                 "       b reg2_error_loop                               \n"\r
 204                 "       nop                                                             \n"\r
 205         );\r
 206 }\r
 207 /*-----------------------------------------------------------*/\r
 208 \r
 209 \r
 210 \r
 211 \r