git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c

   1 /*\r
   2     FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
  12 \r
  13     ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18     ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
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  33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
  34      *    tutorial book, reference manual, or both:                          *\r
  35      *    http://www.FreeRTOS.org/Documentation                              *\r
  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41     defined configASSERT()?\r
  42 \r
  43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
  44     embedded software for free we request you assist our global community by\r
  45     participating in the support forum.\r
  46 \r
  47     http://www.FreeRTOS.org/training - Investing in training allows your team to\r
  48     be as productive as possible as early as possible.  Now you can receive\r
  49     FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
  50     Ltd, and the world's leading authority on the world's leading RTOS.\r
  51 \r
  52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  55 \r
  56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
  57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
  58 \r
  59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
  60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  61     licenses offer ticketed support, indemnification and commercial middleware.\r
  62 \r
  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  64     engineered and independently SIL3 certified version for use in safety and\r
  65     mission critical applications that require provable dependability.\r
  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 /* \r
  71  * "Reg test" tasks - These fill the registers with known values, then check\r
  72  * that each register maintains its expected value for the lifetime of the\r
  73  * task.  Each task uses a different set of values.  The reg test tasks execute\r
  74  * with a very low priority, so get preempted very frequently.  A register\r
  75  * containing an unexpected value is indicative of an error in the context\r
  76  * switching mechanism.\r
  77  */\r
  78  \r
  79 void vRegTest1Task( void ) __attribute__((naked));\r
  80 void vRegTest2Task( void ) __attribute__((naked));\r
  81 \r
  82 void vRegTest1Task( void )\r
  83 {\r
  84         __asm volatile\r
  85         (\r
  86                 ".extern ulRegTest1LoopCounter          \n"\r
  87                 "                                                                       \n"\r
  88                 "       /* Fill the core registers with known values. */ \n"\r
  89                 "       movs r1, #101                                   \n"\r
  90                 "       movs r2, #102                                   \n"\r
  91                 "       movs r3, #103                                   \n"\r
  92                 "       movs r4, #104                                   \n"\r
  93                 "       movs r5, #105                                   \n"\r
  94                 "       movs r6, #106                                   \n"\r
  95                 "       movs r7, #107                                   \n"\r
  96                 "       movs r0, #108                                   \n"\r
  97                 "       mov      r8, r0                                         \n"\r
  98                 "       movs r0, #109                                   \n"\r
  99                 "       mov  r9, r0                                             \n"\r
 100                 "       movs r0, #110                                   \n"\r
 101                 "       mov      r10, r0                                        \n"\r
 102                 "       movs r0, #111                                   \n"\r
 103                 "       mov      r11, r0                                        \n"\r
 104                 "       movs r0, #112                                   \n"\r
 105                 "       mov  r12, r0                                    \n"\r
 106                 "       movs r0, #100                                   \n"\r
 107                 "                                                                       \n"\r
 108                 "reg1_loop:                                                     \n"\r
 109                 "                                                                       \n"\r
 110                 "       cmp     r0, #100                                        \n"\r
 111                 "       bne     reg1_error_loop                         \n"\r
 112                 "       cmp     r1, #101                                        \n"\r
 113                 "       bne     reg1_error_loop                         \n"\r
 114                 "       cmp     r2, #102                                        \n"\r
 115                 "       bne     reg1_error_loop                         \n"\r
 116                 "       cmp r3, #103                                    \n"\r
 117                 "       bne     reg1_error_loop                         \n"\r
 118                 "       cmp     r4, #104                                        \n"\r
 119                 "       bne     reg1_error_loop                         \n"\r
 120                 "       cmp     r5, #105                                        \n"\r
 121                 "       bne     reg1_error_loop                         \n"\r
 122                 "       cmp     r6, #106                                        \n"\r
 123                 "       bne     reg1_error_loop                         \n"\r
 124                 "       cmp     r7, #107                                        \n"\r
 125                 "       bne     reg1_error_loop                         \n"\r
 126                 "       movs r0, #108                                   \n"\r
 127                 "       cmp     r8, r0                                          \n"\r
 128                 "       bne     reg1_error_loop                         \n"\r
 129                 "       movs r0, #109                                   \n"\r
 130                 "       cmp     r9, r0                                          \n"\r
 131                 "       bne     reg1_error_loop                         \n"\r
 132                 "       movs r0, #110                                   \n"\r
 133                 "       cmp     r10, r0                                         \n"\r
 134                 "       bne     reg1_error_loop                         \n"\r
 135                 "       movs r0, #111                                   \n"\r
 136                 "       cmp     r11, r0                                         \n"\r
 137                 "       bne     reg1_error_loop                         \n"\r
 138                 "       movs r0, #112                                   \n"\r
 139                 "       cmp     r12, r0                                         \n"\r
 140                 "       bne     reg1_error_loop                         \n"\r
 141                 "                                                                       \n"\r
 142                 "       /* Everything passed, increment the loop counter. */ \n"\r
 143                 "       push { r1 }                                             \n"\r
 144                 "       ldr     r0, =ulRegTest1LoopCounter      \n"\r
 145                 "       ldr r1, [r0]                                    \n"\r
 146                 "       add r1, r1, #1                                  \n"\r
 147                 "       str r1, [r0]                                    \n"\r
 148                 "                                                                       \n"\r
 149                 "       /* Yield to increase test coverage. */ \n"\r
 150                 "       movs r0, #0x01                                  \n"\r
 151                 "       ldr r1, =0xe000ed04                     \n" /*NVIC_INT_CTRL */\r
 152                 "       lsl r0, #28                                     \n" /* Shift to PendSV bit */\r
 153                 "       str r0, [r1]                                    \n"\r
 154                 "       dsb                                                             \n"\r
 155                 "       pop { r1 }                                              \n"\r
 156                 "                                                                       \n"\r
 157                 "       /* Start again. */                              \n"\r
 158                 "       movs r0, #100                                   \n"\r
 159                 "       b reg1_loop                                             \n"\r
 160                 "                                                                       \n"\r
 161                 "reg1_error_loop:                                       \n"\r
 162                 "       /* If this line is hit then there was an error in a core register value.        \n"\r
 163                 "       The loop ensures the loop counter stops incrementing. */                                        \n"\r
 164                 "       b reg1_error_loop                               \n"\r
 165                 "       nop                                                             \n"\r
 166         );\r
 167 }\r
 168 /*-----------------------------------------------------------*/\r
 169 \r
 170 void vRegTest2Task( void )\r
 171 {\r
 172         __asm volatile\r
 173         (\r
 174                 ".extern ulRegTest2LoopCounter          \n"\r
 175                 "                                                                       \n"\r
 176                 "       /* Fill the core registers with known values. */ \n"\r
 177                 "       movs r1, #1                                             \n"\r
 178                 "       movs r2, #2                                             \n"\r
 179                 "       movs r3, #3                                             \n"\r
 180                 "       movs r4, #4                                             \n"\r
 181                 "       movs r5, #5                                             \n"\r
 182                 "       movs r6, #6                                             \n"\r
 183                 "       movs r7, #7                                             \n"\r
 184                 "       movs r0, #8                                             \n"\r
 185                 "       movs r8, r0                                             \n"\r
 186                 "       movs r0, #9                                             \n"\r
 187                 "       mov  r9, r0                                             \n"\r
 188                 "       movs r0, #10                                    \n"\r
 189                 "       mov      r10, r0                                        \n"\r
 190                 "       movs r0, #11                                    \n"\r
 191                 "       mov      r11, r0                                        \n"\r
 192                 "       movs r0, #12                                    \n"\r
 193                 "       mov  r12, r0                                    \n"\r
 194                 "       movs r0, #10                                    \n"\r
 195                 "                                                                       \n"\r
 196                 "reg2_loop:                                                     \n"\r
 197                 "                                                                       \n"\r
 198                 "       cmp     r0, #10                                         \n"\r
 199                 "       bne     reg2_error_loop                         \n"\r
 200                 "       cmp     r1, #1                                          \n"\r
 201                 "       bne     reg2_error_loop                         \n"\r
 202                 "       cmp     r2, #2                                          \n"\r
 203                 "       bne     reg2_error_loop                         \n"\r
 204                 "       cmp r3, #3                                              \n"\r
 205                 "       bne     reg2_error_loop                         \n"\r
 206                 "       cmp     r4, #4                                          \n"\r
 207                 "       bne     reg2_error_loop                         \n"\r
 208                 "       cmp     r5, #5                                          \n"\r
 209                 "       bne     reg2_error_loop                         \n"\r
 210                 "       cmp     r6, #6                                          \n"\r
 211                 "       bne     reg2_error_loop                         \n"\r
 212                 "       cmp     r7, #7                                          \n"\r
 213                 "       bne     reg2_error_loop                         \n"\r
 214                 "       movs r0, #8                                             \n"\r
 215                 "       cmp     r8, r0                                          \n"\r
 216                 "       bne     reg2_error_loop                         \n"\r
 217                 "       movs r0, #9                                             \n"\r
 218                 "       cmp     r9, r0                                          \n"\r
 219                 "       bne     reg2_error_loop                         \n"\r
 220                 "       movs r0, #10                                    \n"\r
 221                 "       cmp     r10, r0                                         \n"\r
 222                 "       bne     reg2_error_loop                         \n"\r
 223                 "       movs r0, #11                                    \n"\r
 224                 "       cmp     r11, r0                                         \n"\r
 225                 "       bne     reg2_error_loop                         \n"\r
 226                 "       movs r0, #12                                    \n"\r
 227                 "       cmp     r12, r0                                         \n"\r
 228                 "       bne     reg2_error_loop                         \n"\r
 229                 "                                                                       \n"\r
 230                 "       /* Everything passed, increment the loop counter. */ \n"\r
 231                 "       push { r1 }                                             \n"\r
 232                 "       ldr     r0, =ulRegTest2LoopCounter      \n"\r
 233                 "       ldr r1, [r0]                                    \n"\r
 234                 "       add r1, r1, #1                                  \n"\r
 235                 "       str r1, [r0]                                    \n"\r
 236                 "       pop { r1 }                                              \n"\r
 237                 "                                                                       \n"\r
 238                 "       /* Start again. */                              \n"\r
 239                 "       movs r0, #10                                    \n"\r
 240                 "       b reg2_loop                                             \n"\r
 241                 "                                                                       \n"\r
 242                 "reg2_error_loop:                                       \n"\r
 243                 "       /* If this line is hit then there was an error in a core register value.        \n"\r
 244                 "       The loop ensures the loop counter stops incrementing. */                                        \n"\r
 245                 "       b reg2_error_loop                               \n"\r
 246                 "       nop                                                             \n"\r
 247         );\r
 248 }\r
 249 /*-----------------------------------------------------------*/\r
 250 \r
 251 \r
 252 \r
 253 \r