2 ******************************************************************************
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3 * @file stm32f0xx_syscfg.h
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4 * @author MCD Application Team
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6 * @date 27-January-2012
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7 * @brief This file contains all the functions prototypes for the SYSCFG firmware
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9 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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19 * FOR MORE INFORMATION PLEASE READ CAREFULLY THE LICENSE AGREEMENT FILE
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20 * LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
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22 * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
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23 ******************************************************************************
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26 /*!< Define to prevent recursive inclusion -------------------------------------*/
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27 #ifndef __STM32F0XX_SYSCFG_H
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28 #define __STM32F0XX_SYSCFG_H
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34 /*!< Includes ------------------------------------------------------------------*/
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35 #include "stm32f0xx.h"
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37 /** @addtogroup STM32F0xx_StdPeriph_Driver
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41 /** @addtogroup SYSCFG
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44 /* Exported types ------------------------------------------------------------*/
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45 /* Exported constants --------------------------------------------------------*/
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47 /** @defgroup SYSCFG_Exported_Constants
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51 /** @defgroup EXTI_Port_Sources
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54 #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
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55 #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
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56 #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
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57 #define EXTI_PortSourceGPIOD ((uint8_t)0x03)
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58 #define EXTI_PortSourceGPIOF ((uint8_t)0x05)
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60 #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
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61 ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
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62 ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
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63 ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
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64 ((PORTSOURCE) == EXTI_PortSourceGPIOF))
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69 /** @defgroup EXTI_Pin_sources
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72 #define EXTI_PinSource0 ((uint8_t)0x00)
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73 #define EXTI_PinSource1 ((uint8_t)0x01)
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74 #define EXTI_PinSource2 ((uint8_t)0x02)
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75 #define EXTI_PinSource3 ((uint8_t)0x03)
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76 #define EXTI_PinSource4 ((uint8_t)0x04)
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77 #define EXTI_PinSource5 ((uint8_t)0x05)
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78 #define EXTI_PinSource6 ((uint8_t)0x06)
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79 #define EXTI_PinSource7 ((uint8_t)0x07)
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80 #define EXTI_PinSource8 ((uint8_t)0x08)
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81 #define EXTI_PinSource9 ((uint8_t)0x09)
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82 #define EXTI_PinSource10 ((uint8_t)0x0A)
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83 #define EXTI_PinSource11 ((uint8_t)0x0B)
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84 #define EXTI_PinSource12 ((uint8_t)0x0C)
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85 #define EXTI_PinSource13 ((uint8_t)0x0D)
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86 #define EXTI_PinSource14 ((uint8_t)0x0E)
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87 #define EXTI_PinSource15 ((uint8_t)0x0F)
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89 #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
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90 ((PINSOURCE) == EXTI_PinSource1) || \
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91 ((PINSOURCE) == EXTI_PinSource2) || \
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92 ((PINSOURCE) == EXTI_PinSource3) || \
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93 ((PINSOURCE) == EXTI_PinSource4) || \
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94 ((PINSOURCE) == EXTI_PinSource5) || \
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95 ((PINSOURCE) == EXTI_PinSource6) || \
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96 ((PINSOURCE) == EXTI_PinSource7) || \
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97 ((PINSOURCE) == EXTI_PinSource8) || \
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98 ((PINSOURCE) == EXTI_PinSource9) || \
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99 ((PINSOURCE) == EXTI_PinSource10) || \
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100 ((PINSOURCE) == EXTI_PinSource11) || \
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101 ((PINSOURCE) == EXTI_PinSource12) || \
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102 ((PINSOURCE) == EXTI_PinSource13) || \
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103 ((PINSOURCE) == EXTI_PinSource14) || \
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104 ((PINSOURCE) == EXTI_PinSource15))
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109 /** @defgroup SYSCFG_Memory_Remap_Config
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112 #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
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113 #define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01)
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114 #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
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117 #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
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118 ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \
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119 ((REMAP) == SYSCFG_MemoryRemap_SRAM))
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125 /** @defgroup SYSCFG_DMA_Remap_Config
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128 #define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /* Remap TIM17 DMA requests from channel1 to channel2 */
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129 #define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /* Remap TIM16 DMA requests from channel3 to channel4 */
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130 #define SYSCFG_DMARemap_USART1Rx SYSCFG_CFGR1_USART1RX_DMA_RMP /* Remap USART1 Rx DMA requests from channel3 to channel5 */
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131 #define SYSCFG_DMARemap_USART1Tx SYSCFG_CFGR1_USART1TX_DMA_RMP /* Remap USART1 Tx DMA requests from channel2 to channel4 */
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132 #define SYSCFG_DMARemap_ADC1 SYSCFG_CFGR1_ADC_DMA_RMP /* Remap ADC1 DMA requests from channel1 to channel2 */
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134 #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \
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135 ((REMAP) == SYSCFG_DMARemap_TIM16) || \
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136 ((REMAP) == SYSCFG_DMARemap_USART1Rx) || \
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137 ((REMAP) == SYSCFG_DMARemap_USART1Tx) || \
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138 ((REMAP) == SYSCFG_DMARemap_ADC1))
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144 /** @defgroup SYSCFG_I2C_FastModePlus_Config
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147 #define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /* Enable Fast Mode Plus on PB6 */
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148 #define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */
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149 #define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */
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150 #define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */
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152 #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \
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153 ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \
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154 ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \
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155 ((PIN) == SYSCFG_I2CFastModePlus_PB9))
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161 /** @defgroup SYSCFG_Lock_Config
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164 #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Connects the PVD event to the Break Input of TIM1 */
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165 #define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Connects the SRAM_PARITY error signal to the Break Input of TIM1 */
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166 #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Connects Lockup output of CortexM0 to the break input of TIM1 */
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168 #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \
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169 ((CONFIG) == SYSCFG_Break_SRAMParity) || \
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170 ((CONFIG) == SYSCFG_Break_Lockup))
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176 /** @defgroup SYSCFG_flags_definition
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180 #define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE
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182 #define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE))
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192 /* Exported macro ------------------------------------------------------------*/
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193 /* Exported functions ------------------------------------------------------- */
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195 /* Function used to set the SYSCFG configuration to the default reset state **/
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196 void SYSCFG_DeInit(void);
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198 /* SYSCFG configuration functions *********************************************/
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199 void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap);
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200 void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState);
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201 void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState);
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202 void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
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203 void SYSCFG_BreakConfig(uint32_t SYSCFG_Break);
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204 FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag);
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205 void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag);
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211 #endif /*__STM32F0XX_SYSCFG_H */
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221 /******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/
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