4 * \brief SAM4E-EK board init.
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6 * Copyright (c) 2012 - 2013 Atmel Corporation. All rights reserved.
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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22 * 3. The name of Atmel may not be used to endorse or promote products derived
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23 * from this software without specific prior written permission.
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25 * 4. This software may only be redistributed and used in connection with an
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26 * Atmel microcontroller product.
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28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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44 #include "compiler.h"
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46 #include "conf_board.h"
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50 * \brief Set peripheral mode for IOPORT pins.
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51 * It will configure port mode and disable pin mode (but enable peripheral).
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52 * \param port IOPORT port to configure
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53 * \param masks IOPORT pin masks to configure
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54 * \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
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56 #define ioport_set_port_peripheral_mode(port, masks, mode) \
\r
58 ioport_set_port_mode(port, masks, mode);\
\r
59 ioport_disable_port(port, masks);\
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63 * \brief Set peripheral mode for one single IOPORT pin.
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64 * It will configure port mode and disable pin mode (but enable peripheral).
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65 * \param pin IOPORT pin to configure
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66 * \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
\r
68 #define ioport_set_pin_peripheral_mode(pin, mode) \
\r
70 ioport_set_pin_mode(pin, mode);\
\r
71 ioport_disable_pin(pin);\
\r
75 * \brief Set input mode for one single IOPORT pin.
\r
76 * It will configure port mode and disable pin mode (but enable peripheral).
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77 * \param pin IOPORT pin to configure
\r
78 * \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
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79 * \param sense Sense for interrupt detection (\ref ioport_sense)
\r
81 #define ioport_set_pin_input_mode(pin, mode, sense) \
\r
83 ioport_set_pin_dir(pin, IOPORT_DIR_INPUT);\
\r
84 ioport_set_pin_mode(pin, mode);\
\r
85 ioport_set_pin_sense_mode(pin, sense);\
\r
88 void board_init(void)
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90 #ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT
\r
91 /* Disable the watchdog */
\r
92 WDT->WDT_MR = WDT_MR_WDDIS;
\r
95 /* Initialize IOPORTs */
\r
98 /* Configure the pins connected to LEDs as output and set their
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99 * default initial state to high (LEDs off).
\r
101 ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT);
\r
102 ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL);
\r
103 ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT);
\r
104 ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL);
\r
105 ioport_set_pin_dir(LED2_GPIO, IOPORT_DIR_OUTPUT);
\r
106 ioport_set_pin_level(LED2_GPIO, LED0_INACTIVE_LEVEL);
\r
108 /* Configure Push Button pins */
\r
109 ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_1, GPIO_PUSH_BUTTON_1_FLAGS,
\r
110 GPIO_PUSH_BUTTON_1_SENSE);
\r
111 ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_2, GPIO_PUSH_BUTTON_2_FLAGS,
\r
112 GPIO_PUSH_BUTTON_2_SENSE);
\r
113 ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_3, GPIO_PUSH_BUTTON_3_FLAGS,
\r
114 GPIO_PUSH_BUTTON_3_SENSE);
\r
115 ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_4, GPIO_PUSH_BUTTON_4_FLAGS,
\r
116 GPIO_PUSH_BUTTON_4_SENSE);
\r
118 #ifdef CONF_BOARD_UART_CONSOLE
\r
119 /* Configure UART pins */
\r
120 ioport_set_port_peripheral_mode(PINS_UART0_PORT, PINS_UART0,
\r
124 #ifdef CONF_BOARD_PWM_LED0
\r
125 /* Configure PWM LED0 pin */
\r
126 ioport_set_pin_peripheral_mode(PIN_PWM_LED0_GPIO, PIN_PWM_LED0_FLAGS);
\r
129 #ifdef CONF_BOARD_PWM_LED1
\r
130 /* Configure PWM LED1 pin */
\r
131 ioport_set_pin_peripheral_mode(PIN_PWM_LED1_GPIO, PIN_PWM_LED1_FLAGS);
\r
134 #ifdef CONF_BOARD_PWM_LED2
\r
135 /* Configure PWM LED2 pin */
\r
136 ioport_set_pin_peripheral_mode(PIN_PWM_LED2_GPIO, PIN_PWM_LED2_FLAGS);
\r
139 #ifdef CONF_BOARD_PWM_LED3
\r
140 /* Configure PWM LED3 pin */
\r
141 ioport_set_pin_peripheral_mode(PIN_PWM_LED3_GPIO, PIN_PWM_LED3_FLAGS);
\r
144 #ifdef CONF_BOARD_USART_RXD
\r
145 /* Configure USART RXD pin */
\r
146 ioport_set_pin_peripheral_mode(PIN_USART1_RXD_IDX,
\r
147 PIN_USART1_RXD_FLAGS);
\r
150 #ifdef CONF_BOARD_USART_TXD
\r
151 /* Configure USART TXD pin */
\r
152 ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX,
\r
153 PIN_USART1_TXD_FLAGS);
\r
156 #ifdef CONF_BOARD_USART_CTS
\r
157 /* Configure USART CTS pin */
\r
158 ioport_set_pin_peripheral_mode(PIN_USART1_CTS_IDX,
\r
159 PIN_USART1_CTS_FLAGS);
\r
162 #ifdef CONF_BOARD_USART_RTS
\r
163 /* Configure USART RTS pin */
\r
164 ioport_set_pin_peripheral_mode(PIN_USART1_RTS_IDX,
\r
165 PIN_USART1_RTS_FLAGS);
\r
168 #ifdef CONF_BOARD_USART_SCK
\r
169 /* Configure USART synchronous communication SCK pin */
\r
170 ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX,
\r
171 PIN_USART1_SCK_FLAGS);
\r
174 #ifdef CONF_BOARD_ADM3312_EN
\r
175 /* Configure ADM3312 enable pin */
\r
176 ioport_set_pin_dir(PIN_USART1_EN_IDX, IOPORT_DIR_OUTPUT);
\r
177 #ifdef CONF_BOARD_ADM3312_EN_DISABLE_AT_INIT
\r
178 ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_INACTIVE_LEVEL);
\r
180 ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_ACTIVE_LEVEL);
\r
184 #ifdef CONF_BOARD_ADS7843
\r
185 /* Configure Touchscreen SPI pins */
\r
186 ioport_set_pin_dir(BOARD_ADS7843_IRQ_GPIO, IOPORT_DIR_INPUT);
\r
187 ioport_set_pin_mode(BOARD_ADS7843_IRQ_GPIO, BOARD_ADS7843_IRQ_FLAGS);
\r
188 ioport_set_pin_dir(BOARD_ADS7843_BUSY_GPIO, IOPORT_DIR_INPUT);
\r
189 ioport_set_pin_mode(BOARD_ADS7843_BUSY_GPIO, BOARD_ADS7843_BUSY_FLAGS);
\r
190 ioport_set_pin_peripheral_mode(SPI_MISO_GPIO, SPI_MISO_FLAGS);
\r
191 ioport_set_pin_peripheral_mode(SPI_MOSI_GPIO, SPI_MOSI_FLAGS);
\r
192 ioport_set_pin_peripheral_mode(SPI_SPCK_GPIO, SPI_SPCK_FLAGS);
\r
193 ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS);
\r
196 #ifdef CONF_BOARD_CAN0
\r
197 /* Configure the CAN0 TX and RX pins. */
\r
198 ioport_set_pin_peripheral_mode(PIN_CAN0_RX_IDX, PIN_CAN0_RX_FLAGS);
\r
199 ioport_set_pin_peripheral_mode(PIN_CAN0_TX_IDX, PIN_CAN0_TX_FLAGS);
\r
200 /* Configure the transiver0 RS & EN pins. */
\r
201 ioport_set_pin_dir(PIN_CAN0_TR_RS_IDX, IOPORT_DIR_OUTPUT);
\r
202 ioport_set_pin_dir(PIN_CAN0_TR_EN_IDX, IOPORT_DIR_OUTPUT);
\r
205 #ifdef CONF_BOARD_CAN1
\r
206 /* Configure the CAN1 TX and RX pin. */
\r
207 ioport_set_pin_peripheral_mode(PIN_CAN1_RX_IDX, PIN_CAN1_RX_FLAGS);
\r
208 ioport_set_pin_peripheral_mode(PIN_CAN1_TX_IDX, PIN_CAN1_TX_FLAGS);
\r
209 /* Configure the transiver1 RS & EN pins. */
\r
210 ioport_set_pin_dir(PIN_CAN1_TR_RS_IDX, IOPORT_DIR_OUTPUT);
\r
211 ioport_set_pin_dir(PIN_CAN1_TR_EN_IDX, IOPORT_DIR_OUTPUT);
\r
214 #if defined(CONF_BOARD_USB_PORT)
\r
215 # if defined(CONF_BOARD_USB_VBUS_DETECT)
\r
216 gpio_configure_pin(USB_VBUS_PIN, USB_VBUS_FLAGS);
\r
220 #ifdef CONF_BOARD_ILI93XX
\r
221 /* Configure LCD EBI pins */
\r
222 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D0,PIN_EBI_DATA_BUS_FLAGS);
\r
223 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D1,PIN_EBI_DATA_BUS_FLAGS);
\r
224 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D2,PIN_EBI_DATA_BUS_FLAGS);
\r
225 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D3,PIN_EBI_DATA_BUS_FLAGS);
\r
226 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D4,PIN_EBI_DATA_BUS_FLAGS);
\r
227 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D5,PIN_EBI_DATA_BUS_FLAGS);
\r
228 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D6,PIN_EBI_DATA_BUS_FLAGS);
\r
229 ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D7,PIN_EBI_DATA_BUS_FLAGS);
\r
231 ioport_set_pin_peripheral_mode(PIN_EBI_NRD,PIN_EBI_NRD_FLAGS);
\r
232 ioport_set_pin_peripheral_mode(PIN_EBI_NWE,PIN_EBI_NWE_FLAGS);
\r
233 ioport_set_pin_peripheral_mode(PIN_EBI_NCS1,PIN_EBI_NCS1_FLAGS);
\r
234 ioport_set_pin_peripheral_mode(PIN_EBI_LCD_RS,PIN_EBI_LCD_RS_FLAGS);
\r
237 #ifdef CONF_BOARD_AAT3155
\r
238 /* Configure Backlight control pin */
\r
239 ioport_set_pin_dir(BOARD_AAT31XX_SET_GPIO, IOPORT_DIR_OUTPUT);
\r
242 #ifdef CONF_BOARD_SPI
\r
243 ioport_set_pin_peripheral_mode(SPI_MISO_GPIO, SPI_MISO_FLAGS);
\r
244 ioport_set_pin_peripheral_mode(SPI_MOSI_GPIO, SPI_MOSI_FLAGS);
\r
245 ioport_set_pin_peripheral_mode(SPI_SPCK_GPIO, SPI_SPCK_FLAGS);
\r
247 #ifdef CONF_BOARD_SPI_NPCS0
\r
248 ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS);
\r
251 #ifdef CONF_BOARD_SPI_NPCS3
\r
252 #if defined(CONF_BOARD_SPI_NPCS3_GPIO) && defined(CONF_BOARD_SPI_NPCS3_FLAGS)
\r
253 ioport_set_pin_peripheral_mode(CONF_BOARD_SPI_NPCS3_GPIO,
\r
254 CONF_BOARD_SPI_NPCS3_FLAGS);
\r
256 ioport_set_pin_peripheral_mode(SPI_NPCS3_PA5_GPIO, SPI_NPCS3_PA5_FLAGS);
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261 #if (defined(CONF_BOARD_TWI0) || defined(CONF_BOARD_QTOUCH))
\r
262 ioport_set_pin_peripheral_mode(TWI0_DATA_GPIO, TWI0_DATA_FLAGS);
\r
263 ioport_set_pin_peripheral_mode(TWI0_CLK_GPIO, TWI0_CLK_FLAGS);
\r
266 #if defined (CONF_BOARD_SD_MMC_HSMCI)
\r
267 /* Configure HSMCI pins */
\r
268 ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCDA_GPIO, PIN_HSMCI_MCCDA_FLAGS);
\r
269 ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCK_GPIO, PIN_HSMCI_MCCK_FLAGS);
\r
270 ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA0_GPIO, PIN_HSMCI_MCDA0_FLAGS);
\r
271 ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA1_GPIO, PIN_HSMCI_MCDA1_FLAGS);
\r
272 ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA2_GPIO, PIN_HSMCI_MCDA2_FLAGS);
\r
273 ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA3_GPIO, PIN_HSMCI_MCDA3_FLAGS);
\r
275 /* Configure SD/MMC card detect pin */
\r
276 ioport_set_pin_peripheral_mode(SD_MMC_0_CD_GPIO, SD_MMC_0_CD_FLAGS);
\r
279 #ifdef CONF_BOARD_TWI1
\r
280 ioport_set_pin_peripheral_mode(TWI1_DATA_GPIO, TWI1_DATA_FLAGS);
\r
281 ioport_set_pin_peripheral_mode(TWI1_CLK_GPIO, TWI1_CLK_FLAGS);
\r
284 #ifdef CONF_BOARD_KSZ8051MNL
\r
285 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXC_IDX,
\r
286 PIN_KSZ8051MNL_RXC_FLAGS);
\r
287 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXC_IDX,
\r
288 PIN_KSZ8051MNL_TXC_FLAGS);
\r
289 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXEN_IDX,
\r
290 PIN_KSZ8051MNL_TXEN_FLAGS);
\r
291 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD3_IDX,
\r
292 PIN_KSZ8051MNL_TXD3_FLAGS);
\r
293 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD2_IDX,
\r
294 PIN_KSZ8051MNL_TXD2_FLAGS);
\r
295 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD1_IDX,
\r
296 PIN_KSZ8051MNL_TXD1_FLAGS);
\r
297 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD0_IDX,
\r
298 PIN_KSZ8051MNL_TXD0_FLAGS);
\r
299 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD3_IDX,
\r
300 PIN_KSZ8051MNL_RXD3_FLAGS);
\r
301 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD2_IDX,
\r
302 PIN_KSZ8051MNL_RXD2_FLAGS);
\r
303 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD1_IDX,
\r
304 PIN_KSZ8051MNL_RXD1_FLAGS);
\r
305 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD0_IDX,
\r
306 PIN_KSZ8051MNL_RXD0_FLAGS);
\r
307 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXER_IDX,
\r
308 PIN_KSZ8051MNL_RXER_FLAGS);
\r
309 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXDV_IDX,
\r
310 PIN_KSZ8051MNL_RXDV_FLAGS);
\r
311 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_CRS_IDX,
\r
312 PIN_KSZ8051MNL_CRS_FLAGS);
\r
313 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_COL_IDX,
\r
314 PIN_KSZ8051MNL_COL_FLAGS);
\r
315 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDC_IDX,
\r
316 PIN_KSZ8051MNL_MDC_FLAGS);
\r
317 ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDIO_IDX,
\r
318 PIN_KSZ8051MNL_MDIO_FLAGS);
\r
319 ioport_set_pin_dir(PIN_KSZ8051MNL_INTRP_IDX, IOPORT_DIR_INPUT);
\r
322 #ifdef CONF_BOARD_TFDU4300_SD
\r
323 /* Configure IrDA transceiver shutdown pin */
\r
324 ioport_set_pin_dir(PIN_IRDA_SD_IDX, IOPORT_DIR_OUTPUT);
\r
325 ioport_set_pin_level(PIN_IRDA_SD_IDX, IOPORT_PIN_LEVEL_HIGH);
\r
328 #ifdef CONF_BOARD_ADM3485_RE
\r
329 /* Configure RS485 transceiver RE pin */
\r
330 ioport_set_pin_dir(PIN_RE_IDX, IOPORT_DIR_OUTPUT);
\r
331 ioport_set_pin_level(PIN_RE_IDX, IOPORT_PIN_LEVEL_LOW);
\r
334 #ifdef CONF_BOARD_ISO7816_RST
\r
335 /* Configure ISO7816 card reset pin */
\r
336 ioport_set_pin_dir(PIN_ISO7816_RST_IDX, IOPORT_DIR_OUTPUT);
\r
337 ioport_set_pin_level(PIN_ISO7816_RST_IDX, IOPORT_PIN_LEVEL_LOW);
\r
340 #ifdef CONF_BOARD_ISO7816
\r
341 /* Configure ISO7816 interface TXD & SCK pin */
\r
342 ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS);
\r
343 ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX, PIN_USART1_SCK_FLAGS);
\r
346 #ifdef CONF_BOARD_NAND
\r
347 ioport_set_pin_peripheral_mode(PIN_EBI_NANDOE, PIN_EBI_NANDOE_FLAGS);
\r
348 ioport_set_pin_peripheral_mode(PIN_EBI_NANDWE, PIN_EBI_NANDWE_FLAGS);
\r
349 ioport_set_pin_peripheral_mode(PIN_EBI_NANDCLE, PIN_EBI_NANDCLE_FLAGS);
\r
350 ioport_set_pin_peripheral_mode(PIN_EBI_NANDALE, PIN_EBI_NANDALE_FLAGS);
\r
351 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_0, PIN_EBI_NANDIO_0_FLAGS);
\r
352 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_1, PIN_EBI_NANDIO_1_FLAGS);
\r
353 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_2, PIN_EBI_NANDIO_2_FLAGS);
\r
354 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_3, PIN_EBI_NANDIO_3_FLAGS);
\r
355 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_4, PIN_EBI_NANDIO_4_FLAGS);
\r
356 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_5, PIN_EBI_NANDIO_5_FLAGS);
\r
357 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_6, PIN_EBI_NANDIO_6_FLAGS);
\r
358 ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_7, PIN_EBI_NANDIO_7_FLAGS);
\r
359 ioport_set_pin_dir(PIN_NF_CE_IDX, IOPORT_DIR_OUTPUT);
\r
360 ioport_set_pin_dir(PIN_NF_RB_IDX, IOPORT_DIR_INPUT);
\r
361 ioport_set_pin_mode(PIN_NF_RB_IDX, IOPORT_MODE_PULLUP);
\r
365 #ifdef CONF_BOARD_QTOUCH
\r
366 /* Configure CHANGE pin for QTouch device */
\r
367 ioport_set_pin_input_mode(BOARD_QT_CHANGE_PIN_IDX, BOARD_QT_CHANGE_PIN_FLAGS,
\r
368 BOARD_QT_CHANGE_PIN_SENSE);
\r