4 * \brief registers definition for ili9325 TFT display component.
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6 * Copyright (c) 2013 Atmel Corporation. All rights reserved.
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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22 * 3. The name of Atmel may not be used to endorse or promote products derived
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23 * from this software without specific prior written permission.
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25 * 4. This software may only be redistributed and used in connection with an
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26 * Atmel microcontroller product.
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28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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44 #ifndef ILI9325_REGS_H_INCLUDED
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45 #define ILI9325_REGS_H_INCLUDED
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55 /** ili9325 LCD Registers */
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57 /** Driver Code Read */
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58 #define ILI9325_DEVICE_CODE_REG (0x00u)
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60 /** ILI9325_START_OSC_CTRL : (Offset: 0x00) Start Oscillator Control*/
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61 #define ILI9325_START_OSC_CTRL (0x00u)
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62 #define ILI9325_START_OSC_CTRL_EN (0x1u << 0)
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64 /** ILI9325_DRIVER_OUTPUT_CTRL1 : (Offset: 0x01) Driver Output Control 1*/
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65 #define ILI9325_DRIVER_OUTPUT_CTRL1 (0x01u)
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66 #define ILI9325_DRIVER_OUTPUT_CTRL1_SS (0x1u << 8)
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67 #define ILI9325_DRIVER_OUTPUT_CTRL1_SM (0x1u << 10)
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69 /** ILI9325_LCD_DRIVING_CTRL : (Offset: 0x02) LCD Driving Control */
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70 #define ILI9325_LCD_DRIVING_CTRL (0x02u)
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71 #define ILI9325_LCD_DRIVING_CTRL_EOR (0x1u << 8)
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72 #define ILI9325_LCD_DRIVING_CTRL_BC0 (0x1u << 9)
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73 #define ILI9325_LCD_DRIVING_CTRL_BIT10 (0x1u << 10)
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75 /** ILI9325_ENTRY_MODE : (Offset: 0x03) Entry Mode*/
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76 #define ILI9325_ENTRY_MODE (0x03u)
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77 #define ILI9325_ENTRY_MODE_AM (0x1u << 3)
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78 #define ILI9325_ENTRY_MODE_ID_POS 4
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79 #define ILI9325_ENTRY_MODE_ID_MSK (0x3u << ILI9325_ENTRY_MODE_ID_POS)
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80 #define ILI9325_ENTRY_MODE_ID(value) ((ILI9325_ENTRY_MODE_ID_MSK & \
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81 ((value) << ILI9325_ENTRY_MODE_ID_POS)))
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82 #define ILI9325_ENTRY_MODE_ORG (0x1u << 7)
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83 #define ILI9325_ENTRY_MODE_HWM (0x1u << 9)
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84 #define ILI9325_ENTRY_MODE_BGR (0x1u << 12)
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85 #define ILI9325_ENTRY_MODE_DFM (0x1u << 14)
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86 #define ILI9325_ENTRY_MODE_TRI (0x1u << 15)
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88 /** ILI9325_RESIZE_CTRL : (Offset: 0x04) Resize Control */
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89 #define ILI9325_RESIZE_CTRL (0x04u)
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90 #define ILI9325_RESIZE_CTRL_RSZ_POS 0
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91 #define ILI9325_RESIZE_CTRL_RSZ_MSK (0x3u << ILI9325_RESIZE_CTRL_RSZ_POS)
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92 #define ILI9325_RESIZE_CTRL_RSZ(value) ((ILI9325_RESIZE_CTRL_RSZ_MSK & \
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93 ((value) << ILI9325_RESIZE_CTRL_RSZ_POS)))
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94 #define ILI9325_RESIZE_CTRL_RCH_POS 4
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95 #define ILI9325_RESIZE_CTRL_RCH_MSK (0x3u << ILI9325_RESIZE_CTRL_RCH_POS)
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96 #define ILI9325_RESIZE_CTRL_RCH(value) ((ILI9325_RESIZE_CTRL_RCH_MSK & \
\r
97 ((value) << ILI9325_RESIZE_CTRL_RCH_POS)))
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98 #define ILI9325_RESIZE_CTRL_RCV_POS 8
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99 #define ILI9325_RESIZE_CTRL_RCV_MSK (0x3u << ILI9325_RESIZE_CTRL_RCV_POS)
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100 #define ILI9325_RESIZE_CTRL_RCV(value) ((ILI9325_RESIZE_CTRL_RCV_MSK & \
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101 ((value) << ILI9325_RESIZE_CTRL_RCV_POS)))
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103 /** ILI9325_DISP_CTRL1 : (Offset: 0x07) Display Control 1 */
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104 #define ILI9325_DISP_CTRL1 (0x07u)
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105 #define ILI9325_DISP_CTRL1_D_POS 0
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106 #define ILI9325_DISP_CTRL1_D_MSK (0x3u << ILI9325_DISP_CTRL1_D_POS)
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107 #define ILI9325_DISP_CTRL1_D(value) ((ILI9325_DISP_CTRL1_D_MSK & \
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108 ((value) << ILI9325_DISP_CTRL1_D_POS)))
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109 #define ILI9325_DISP_CTRL1_CL (0x1u << 3)
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110 #define ILI9325_DISP_CTRL1_DTE (0x1u << 4)
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111 #define ILI9325_DISP_CTRL1_GON (0x1u << 5)
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112 #define ILI9325_DISP_CTRL1_BASEE (0x1u << 8)
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113 #define ILI9325_DISP_CTRL1_PTDE_POS 12
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114 #define ILI9325_DISP_CTRL1_PTDE_MSK (0x3u << ILI9325_DISP_CTRL1_PTDE_POS)
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115 #define ILI9325_DISP_CTRL1_PTDE(value) ((ILI9325_DISP_CTRL1_PTDE_MSK & \
\r
116 ((value) << ILI9325_DISP_CTRL1_PTDE_POS)))
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118 /** ILI9325_DISP_CTRL2 : (Offset: 0x08) Display Control 2 */
\r
119 #define ILI9325_DISP_CTRL2 (0x08u)
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120 #define ILI9325_DISP_CTRL2_BP_POS 0
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121 #define ILI9325_DISP_CTRL2_BP_MSK (0xfu << ILI9325_DISP_CTRL2_BP_POS)
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122 #define ILI9325_DISP_CTRL2_BP(value) ((ILI9325_DISP_CTRL2_BP_MSK & \
\r
123 ((value) << ILI9325_DISP_CTRL2_BP_POS)))
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124 #define ILI9325_DISP_CTRL2_FP_POS 8
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125 #define ILI9325_DISP_CTRL2_FP_MSK (0xfu << ILI9325_DISP_CTRL2_FP_POS)
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126 #define ILI9325_DISP_CTRL2_FP(value) ((ILI9325_DISP_CTRL2_FP_MSK & \
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127 ((value) << ILI9325_DISP_CTRL2_FP_POS)))
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129 /** ILI9325_DISP_CTRL3 : (Offset: 0x09) Display Control 3 */
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130 #define ILI9325_DISP_CTRL3 (0x09u)
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131 #define ILI9325_DISP_CTRL3_ISC_POS 0
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132 #define ILI9325_DISP_CTRL3_ISC_MSK (0xfu << ILI9325_DISP_CTRL3_ISC_POS)
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133 #define ILI9325_DISP_CTRL3_ISC(value) ((ILI9325_DISP_CTRL3_ISC_MSK & \
\r
134 ((value) << ILI9325_DISP_CTRL3_ISC_POS)))
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135 #define ILI9325_DISP_CTRL3_PTG_POS 4
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136 #define ILI9325_DISP_CTRL3_PTG_MSK (0x3u << ILI9325_DISP_CTRL3_PTG_POS)
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137 #define ILI9325_DISP_CTRL3_PTG(value) ((ILI9325_DISP_CTRL3_PTG_MSK & \
\r
138 ((value) << ILI9325_DISP_CTRL3_PTG_POS)))
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139 #define ILI9325_DISP_CTRL3_PTS_POS 8
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140 #define ILI9325_DISP_CTRL3_PTS_MSK (0x7u << ILI9325_DISP_CTRL3_PTS_POS)
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141 #define ILI9325_DISP_CTRL3_PTS(value) ((ILI9325_DISP_CTRL3_PTS_MSK & \
\r
142 ((value) << ILI9325_DISP_CTRL3_PTS_POS)))
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144 /** ILI9325_DISP_CTRL4 : (Offset: 0x0A) Display Control 4 */
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145 #define ILI9325_DISP_CTRL4 (0x0Au)
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146 #define ILI9325_DISP_CTRL4_FMI_POS 0
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147 #define ILI9325_DISP_CTRL4_FMI_MSK (0x7u << ILI9325_DISP_CTRL4_FMI_POS)
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148 #define ILI9325_DISP_CTRL4_FMI(value) ((ILI9325_DISP_CTRL4_FMI_MSK & \
\r
149 ((value) << ILI9325_DISP_CTRL4_FMI_POS)))
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150 #define ILI9325_DISP_CTRL4_FMARKOE (0x1u << 3)
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152 /** ILI9325_RGB_DISP_INTERFACE_CTRL1 : (Offset: 0x0C) RGB Display
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153 *Interface Control 1 */
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154 #define ILI9325_RGB_DISP_INTERFACE_CTRL1 (0x0Cu)
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155 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS 0
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156 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_MSK (0x3u << \
\r
157 ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS)
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158 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM(value) (( \
\r
159 ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_MSK & \
\r
160 ((value) << ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS)))
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161 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM0 (0x1u << 4)
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162 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM1 (0x1u << 5)
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163 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS 4
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164 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_MSK (0x3u << \
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165 ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS)
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166 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM(value) (( \
\r
167 ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_MSK & \
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168 ((value) << ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS)))
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169 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_RM (0x1u << 8)
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170 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS 12
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171 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_MSK (0x7u << \
\r
172 ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS)
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173 #define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC(value) (( \
\r
174 ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_MSK & \
\r
175 ((value) < ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS)))
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177 /** ILI9325_FRAME_MAKER_POS : (Offset: 0x0D) Frame Maker Position */
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178 #define ILI9325_FRAME_MAKER_POS (0x0Du)
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179 #define ILI9325_FRAME_MAKER_POS_FMP_POS 0
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180 #define ILI9325_FRAME_MAKER_POS_FMP_MSK (0x1ffu << \
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181 ILI9325_FRAME_MAKER_POS_FMP_POS)
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182 #define ILI9325_FRAME_MAKER_POS_FMP(value) ((ILI9325_FRAME_MAKER_POS_FMP_MSK & \
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183 ((value) << ILI9325_FRAME_MAKER_POS_FMP_POS)))
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185 /** ILI9325_RGB_DISP_INTERFACE_CTRL2 : (Offset: 0x0F) RGB Display
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186 * Interface Control 2 */
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187 #define ILI9325_RGB_DISP_INTERFACE_CTRL2 (0x0Fu)
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188 #define ILI9325_RGB_DISP_INTERFACE_CTRL2_EPL (0x1u << 0)
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189 #define ILI9325_RGB_DISP_INTERFACE_CTRL2_DPL (0x1u << 1)
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190 #define ILI9325_RGB_DISP_INTERFACE_CTRL2_HSPL (0x1u << 3)
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191 #define ILI9325_RGB_DISP_INTERFACE_CTRL2_VSPL (0x1u << 4)
\r
193 /** ILI9325_POWER_CTRL1 : (Offset: 0x10) Power Control 1 */
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194 #define ILI9325_POWER_CTRL1 (0x10u)
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195 #define ILI9325_POWER_CTRL1_STB (0x1u << 0)
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196 #define ILI9325_POWER_CTRL1_SLP (0x1u << 1)
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197 #define ILI9325_POWER_CTRL1_DSTB (0x1u << 2)
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198 #define ILI9325_POWER_CTRL1_AP_POS 4
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199 #define ILI9325_POWER_CTRL1_AP_MSK (0x7u << ILI9325_POWER_CTRL1_AP_POS)
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200 #define ILI9325_POWER_CTRL1_AP(value) ((ILI9325_POWER_CTRL1_AP_MSK & \
\r
201 ((value) << ILI9325_POWER_CTRL1_AP_POS)))
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202 #define ILI9325_POWER_CTRL1_APE (0x1u << 7)
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203 #define ILI9325_POWER_CTRL1_BT_POS 8
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204 #define ILI9325_POWER_CTRL1_BT_MSK (0x7u << ILI9325_POWER_CTRL1_BT_POS)
\r
205 #define ILI9325_POWER_CTRL1_BT(value) ((ILI9325_POWER_CTRL1_BT_MSK & \
\r
206 ((value) << ILI9325_POWER_CTRL1_BT_POS)))
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207 #define ILI9325_POWER_CTRL1_SAP (0x1u << 12)
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209 /** ILI9325_POWER_CTRL2 : (Offset: 0x11) Power Control 2 */
\r
210 #define ILI9325_POWER_CTRL2 (0x11u)
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211 #define ILI9325_POWER_CTRL2_VC_POS 0
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212 #define ILI9325_POWER_CTRL2_VC_MSK (0x7u << ILI9325_POWER_CTRL2_VC_POS)
\r
213 #define ILI9325_POWER_CTRL2_VC(value) ((ILI9325_POWER_CTRL2_VC_MSK & \
\r
214 ((value) << ILI9325_POWER_CTRL2_VC_POS)))
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215 #define ILI9325_POWER_CTRL2_DC0_POS 4
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216 #define ILI9325_POWER_CTRL2_DC0_MSK (0x7u << ILI9325_POWER_CTRL2_DC0_POS)
\r
217 #define ILI9325_POWER_CTRL2_DC0(value) ((ILI9325_POWER_CTRL2_DC0_MSK & \
\r
218 ((value) << ILI9325_POWER_CTRL2_DC0_POS)))
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219 #define ILI9325_POWER_CTRL2_DC1_POS 8
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220 #define ILI9325_POWER_CTRL2_DC1_MSK (0x7u << ILI9325_POWER_CTRL2_DC1_POS)
\r
221 #define ILI9325_POWER_CTRL2_DC1(value) ((ILI9325_POWER_CTRL2_DC1_MSK & \
\r
222 ((value) << ILI9325_POWER_CTRL2_DC1_POS)))
\r
224 /** ILI9325_POWER_CTRL3 : (Offset: 0x12) Power Control 3 */
\r
225 #define ILI9325_POWER_CTRL3 (0x12u)
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226 #define ILI9325_POWER_CTRL3_VRH_POS 0
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227 #define ILI9325_POWER_CTRL3_VRH_MSK (0xfu << ILI9325_POWER_CTRL3_VRH_POS)
\r
228 #define ILI9325_POWER_CTRL3_VRH(value) ((ILI9325_POWER_CTRL3_VRH_MSK & \
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229 ((value) << ILI9325_POWER_CTRL3_VRH_POS)))
\r
230 #define ILI9325_POWER_CTRL3_PON (0x1u << 4)
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231 #define ILI9325_POWER_CTRL3_VCIRE (0x1u << 7)
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233 /** ILI9325_POWER_CTRL4 : (Offset: 0x13) Power Control 4 */
\r
234 #define ILI9325_POWER_CTRL4 (0x13u)
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235 #define ILI9325_POWER_CTRL4_VDV_POS 8
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236 #define ILI9325_POWER_CTRL4_VDV_MSK (0x1fu << ILI9325_POWER_CTRL4_VDV_POS)
\r
237 #define ILI9325_POWER_CTRL4_VDV(value) ((ILI9325_POWER_CTRL4_VDV_MSK & \
\r
238 ((value) << ILI9325_POWER_CTRL4_VDV_POS)))
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240 /** ILI9325_HORIZONTAL_GRAM_ADDR_SET : (Offset: 0x20) Horizontal GRAM
\r
242 #define ILI9325_HORIZONTAL_GRAM_ADDR_SET (0x20u)
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243 #define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS 0
\r
244 #define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_MSK (0xffu << \
\r
245 ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS)
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246 #define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD(value) (( \
\r
247 ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_MSK & \
\r
248 ((value) << ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS)))
\r
250 /** ILI9325_VERTICAL_GRAM_ADDR_SET : (Offset: 0x21) Vertical GRAM
\r
252 #define ILI9325_VERTICAL_GRAM_ADDR_SET (0x21u)
\r
253 #define ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS 0
\r
254 #define ILI9325_VERTICAL_GRAM_ADDR_SET_AD_MSK (0xffu << \
\r
255 ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS)
\r
256 #define ILI9325_VERTICAL_GRAM_ADDR_SET_AD(value) (( \
\r
257 ILI9325_VERTICAL_GRAM_ADDR_SET_AD_MSK & \
\r
258 ((value) << ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS)))
\r
260 /** ILI9325_GRAM_DATA_REG : (Offset: 0x22) GRAM Data Register */
\r
261 #define ILI9325_GRAM_DATA_REG (0x22u)
\r
263 /** ILI9325_POWER_CTRL7 : (Offset: 0x29) Power Control 7 */
\r
264 #define ILI9325_POWER_CTRL7 (0x29u)
\r
265 #define ILI9325_POWER_CTRL7_VCM_POS 0
\r
266 #define ILI9325_POWER_CTRL7_VCM_MSK (0x3fu << ILI9325_POWER_CTRL7_VCM_POS)
\r
267 #define ILI9325_POWER_CTRL7_VCM(value) ((ILI9325_POWER_CTRL7_VCM_MSK & \
\r
268 ((value) << ILI9325_POWER_CTRL7_VCM_POS)))
\r
270 /** ILI9325_FRAME_RATE_AND_COLOR_CTRL : (Offset: 0x2B) Frame Rate and
\r
272 #define ILI9325_FRAME_RATE_AND_COLOR_CTRL (0x2Bu)
\r
273 #define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS 0
\r
274 #define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_MSK (0xfu << \
\r
275 ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS)
\r
276 #define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS(value) (( \
\r
277 ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_MSK & \
\r
278 ((value) << ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS)))
\r
280 /** ILI9325_GAMMA_CTL1 : (Offset: 0x30) Gamma Control 1 */
\r
281 #define ILI9325_GAMMA_CTL1 (0x30u)
\r
282 #define ILI9325_GAMMA_CTL1_KP0_POS 0
\r
283 #define ILI9325_GAMMA_CTL1_KP0_MSK (0x7u << ILI9325_GAMMA_CTL1_KP0_POS)
\r
284 #define ILI9325_GAMMA_CTL1_KP0(value) ((ILI9325_GAMMA_CTL1_KP0_MSK & \
\r
285 ((value) << ILI9325_GAMMA_CTL1_KP0_POS)))
\r
286 #define ILI9325_GAMMA_CTL1_KP1_POS 8
\r
287 #define ILI9325_GAMMA_CTL1_KP1_MSK (0x7u << ILI9325_GAMMA_CTL1_KP1_POS)
\r
288 #define ILI9325_GAMMA_CTL1_KP1(value) ((ILI9325_GAMMA_CTL1_KP1_MSK & \
\r
289 ((value) << ILI9325_GAMMA_CTL1_KP1_POS)))
\r
291 /** ILI9325_GAMMA_CTL2 : (Offset: 0x31) Gamma Control 2 */
\r
292 #define ILI9325_GAMMA_CTL2 (0x31u)
\r
293 #define ILI9325_GAMMA_CTL2_KP2_POS 0
\r
294 #define ILI9325_GAMMA_CTL2_KP2_MSK (0x7u << ILI9325_GAMMA_CTL2_KP2_POS)
\r
295 #define ILI9325_GAMMA_CTL2_KP2(value) ((ILI9325_GAMMA_CTL2_KP2_MSK & \
\r
296 ((value) << ILI9325_GAMMA_CTL2_KP2_POS)))
\r
297 #define ILI9325_GAMMA_CTL2_KP3_POS 8
\r
298 #define ILI9325_GAMMA_CTL2_KP3_MSK (0x7u << ILI9325_GAMMA_CTL2_KP3_POS)
\r
299 #define ILI9325_GAMMA_CTL2_KP3(value) ((ILI9325_GAMMA_CTL2_KP3_MSK & \
\r
300 ((value) << ILI9325_GAMMA_CTL2_KP3_POS)))
\r
302 /** ILI9325_GAMMA_CTL3 : (Offset: 0x32) Gamma Control 3 */
\r
303 #define ILI9325_GAMMA_CTL3 (0x32u)
\r
304 #define ILI9325_GAMMA_CTL3_KP4_POS 0
\r
305 #define ILI9325_GAMMA_CTL3_KP4_MSK (0x7u << ILI9325_GAMMA_CTL3_KP4_POS)
\r
306 #define ILI9325_GAMMA_CTL3_KP4(value) ((ILI9325_GAMMA_CTL3_KP4_MSK & \
\r
307 ((value) << ILI9325_GAMMA_CTL3_KP4_POS)))
\r
308 #define ILI9325_GAMMA_CTL3_KP5_POS 8
\r
309 #define ILI9325_GAMMA_CTL3_KP5_MSK (0x7u << ILI9325_GAMMA_CTL3_KP5_POS)
\r
310 #define ILI9325_GAMMA_CTL3_KP5(value) ((ILI9325_GAMMA_CTL3_KP5_MSK & \
\r
311 ((value) << ILI9325_GAMMA_CTL3_KP5_POS)))
\r
313 /** ILI9325_GAMMA_CTL4 : (Offset: 0x35) Gamma Control 4 */
\r
314 #define ILI9325_GAMMA_CTL4 (0x35u)
\r
315 #define ILI9325_GAMMA_CTL4_RP0_POS 0
\r
316 #define ILI9325_GAMMA_CTL4_RP0_MSK (0x7u << ILI9325_GAMMA_CTL4_RP0_POS)
\r
317 #define ILI9325_GAMMA_CTL4_RP0(value) ((ILI9325_GAMMA_CTL4_RP0_MSK & \
\r
318 ((value) << ILI9325_GAMMA_CTL4_RP0_POS)))
\r
319 #define ILI9325_GAMMA_CTL4_RP1_POS 8
\r
320 #define ILI9325_GAMMA_CTL4_RP1_MSK (0x7u << ILI9325_GAMMA_CTL4_RP1_POS)
\r
321 #define ILI9325_GAMMA_CTL4_RP1(value) ((ILI9325_GAMMA_CTL4_RP1_MSK & \
\r
322 ((value) << ILI9325_GAMMA_CTL4_RP1_POS)))
\r
324 /** ILI9325_GAMMA_CTL5 : (Offset: 0x36) Gamma Control 5 */
\r
325 #define ILI9325_GAMMA_CTL5 (0x36u)
\r
326 #define ILI9325_GAMMA_CTL5_VRP0_POS 0
\r
327 #define ILI9325_GAMMA_CTL5_VRP0_MSK (0xfu << ILI9325_GAMMA_CTL5_VRP0_POS)
\r
328 #define ILI9325_GAMMA_CTL5_VRP0(value) ((ILI9325_GAMMA_CTL5_VRP0_MSK & \
\r
329 ((value) << ILI9325_GAMMA_CTL5_VRP0_POS)))
\r
330 #define ILI9325_GAMMA_CTL5_VRP1_POS 8
\r
331 #define ILI9325_GAMMA_CTL5_VRP1_MSK (0x1fu << ILI9325_GAMMA_CTL5_VRP1_POS)
\r
332 #define ILI9325_GAMMA_CTL5_VRP1(value) ((ILI9325_GAMMA_CTL5_VRP1_MSK & \
\r
333 ((value) << ILI9325_GAMMA_CTL5_VRP1_POS)))
\r
335 /** ILI9325_GAMMA_CTL6 : (Offset: 0x37) Gamma Control 6*/
\r
336 #define ILI9325_GAMMA_CTL6 (0x37u)
\r
337 #define ILI9325_GAMMA_CTL6_KN0_POS 0
\r
338 #define ILI9325_GAMMA_CTL6_KN0_MSK (0x7u << ILI9325_GAMMA_CTL6_KN0_POS)
\r
339 #define ILI9325_GAMMA_CTL6_KN0(value) ((ILI9325_GAMMA_CTL6_KN0_MSK & \
\r
340 ((value) << ILI9325_GAMMA_CTL6_KN0_POS)))
\r
341 #define ILI9325_GAMMA_CTL6_KN1_POS 8
\r
342 #define ILI9325_GAMMA_CTL6_KN1_MSK (0x7u << ILI9325_GAMMA_CTL6_KN1_POS)
\r
343 #define ILI9325_GAMMA_CTL6_KN1(value) ((ILI9325_GAMMA_CTL6_KN1_MSK \
\r
344 & ((value) << ILI9325_GAMMA_CTL6_KN1_POS)))
\r
346 /** ILI9325_GAMMA_CTL7 : (Offset: 0x38) Gamma Control 7*/
\r
347 #define ILI9325_GAMMA_CTL7 (0x38u)
\r
348 #define ILI9325_GAMMA_CTL7_KN2_POS 0
\r
349 #define ILI9325_GAMMA_CTL7_KN2_MSK (0x7u << ILI9325_GAMMA_CTL7_KN2_POS)
\r
350 #define ILI9325_GAMMA_CTL7_KN2(value) ((ILI9325_GAMMA_CTL7_KN2_MSK & \
\r
351 ((value) << ILI9325_GAMMA_CTL7_KN2_POS)))
\r
352 #define ILI9325_GAMMA_CTL7_KN3_POS 8
\r
353 #define ILI9325_GAMMA_CTL7_KN3_MSK (0x7u << ILI9325_GAMMA_CTL7_KN3_POS)
\r
354 #define ILI9325_GAMMA_CTL7_KN3(value) ((ILI9325_GAMMA_CTL7_KN3_MSK & \
\r
355 ((value) << ILI9325_GAMMA_CTL7_KN3_POS)))
\r
357 /** ILI9325_GAMMA_CTL8 : (Offset: 0x39) Gamma Control 8*/
\r
358 #define ILI9325_GAMMA_CTL8 (0x39u)
\r
359 #define ILI9325_GAMMA_CTL8_KN4_POS 0
\r
360 #define ILI9325_GAMMA_CTL8_KN4_MSK (0x7u << ILI9325_GAMMA_CTL8_KN4_POS)
\r
361 #define ILI9325_GAMMA_CTL8_KN4(value) ((ILI9325_GAMMA_CTL8_KN4_MSK & \
\r
362 ((value) << ILI9325_GAMMA_CTL8_KN4_POS)))
\r
363 #define ILI9325_GAMMA_CTL8_KN5_POS 8
\r
364 #define ILI9325_GAMMA_CTL8_KN5_MSK (0x7u << ILI9325_GAMMA_CTL8_KN5_POS)
\r
365 #define ILI9325_GAMMA_CTL8_KN5(value) ((ILI9325_GAMMA_CTL8_KN5_MSK & \
\r
366 ((value) << ILI9325_GAMMA_CTL8_KN5_POS)))
\r
368 /** ILI9325_GAMMA_CTL9 : (Offset: 0x3C) Gamma Control 9*/
\r
369 #define ILI9325_GAMMA_CTL9 (0x3Cu)
\r
370 #define ILI9325_GAMMA_CTL9_RN0_POS 0
\r
371 #define ILI9325_GAMMA_CTL9_RN0_MSK (0x7u << ILI9325_GAMMA_CTL9_RN0_POS)
\r
372 #define ILI9325_GAMMA_CTL9_RN0(value) ((ILI9325_GAMMA_CTL9_RN0_MSK & \
\r
373 ((value) << ILI9325_GAMMA_CTL9_RN0_POS)))
\r
374 #define ILI9325_GAMMA_CTL9_RN1_POS 8
\r
375 #define ILI9325_GAMMA_CTL9_RN1_MSK (0x7u << ILI9325_GAMMA_CTL9_RN1_POS)
\r
376 #define ILI9325_GAMMA_CTL9_RN1(value) ((ILI9325_GAMMA_CTL9_RN1_MSK & \
\r
377 ((value) << ILI9325_GAMMA_CTL9_RN1_POS)))
\r
379 /** ILI9325_GAMMA_CTL10 : (Offset: 0x3D) Gamma Control 10*/
\r
380 #define ILI9325_GAMMA_CTL10 (0x3Du)
\r
381 #define ILI9325_GAMMA_CTL10_VRN0_POS 0
\r
382 #define ILI9325_GAMMA_CTL10_VRN0_MSK (0xfu << ILI9325_GAMMA_CTL10_VRN0_POS)
\r
383 #define ILI9325_GAMMA_CTL10_VRN0(value) ((ILI9325_GAMMA_CTL10_VRN0_MSK & \
\r
384 ((value) << ILI9325_GAMMA_CTL10_VRN0_POS)))
\r
385 #define ILI9325_GAMMA_CTL10_VRN1_POS 8
\r
386 #define ILI9325_GAMMA_CTL10_VRN1_MSK (0x1fu << \
\r
387 ILI9325_GAMMA_CTL10_VRN1_POS)
\r
388 #define ILI9325_GAMMA_CTL10_VRN1(value) ((ILI9325_GAMMA_CTL10_VRN1_MSK & \
\r
389 ((value) << ILI9325_GAMMA_CTL10_VRN1_POS)))
\r
392 * ILI9325_HORIZONTAL_ADDR_START : (Offset: 0x50) Horizontal Address
\r
395 #define ILI9325_HORIZONTAL_ADDR_START (0x50u)
\r
396 #define ILI9325_HORIZONTAL_ADDR_START_HSA_POS 0
\r
397 #define ILI9325_HORIZONTAL_ADDR_START_HSA_MSK (0xffu << \
\r
398 ILI9325_HORIZONTAL_ADDR_START_HSA_POS)
\r
399 #define ILI9325_HORIZONTAL_ADDR_START_HSA(value) (( \
\r
400 ILI9325_HORIZONTAL_ADDR_START_HSA_MSK & \
\r
401 ((value) << ILI9325_HORIZONTAL_ADDR_START_HSA_POS)))
\r
404 * ILI9325_HORIZONTAL_ADDR_END : (Offset: 0x51) Horizontal Address End
\r
407 #define ILI9325_HORIZONTAL_ADDR_END (0x51u)
\r
408 #define ILI9325_HORIZONTAL_ADDR_END_HEA_POS 0
\r
409 #define ILI9325_HORIZONTAL_ADDR_END_HEA_MSK (0xffu << \
\r
410 ILI9325_HORIZONTAL_ADDR_END_HEA_POS)
\r
411 #define ILI9325_HORIZONTAL_ADDR_END_HEA(value) (( \
\r
412 ILI9325_HORIZONTAL_ADDR_END_HEA_MSK & \
\r
413 ((value) << ILI9325_HORIZONTAL_ADDR_END_HEA_POS)))
\r
416 * ILI9325_VERTICAL_ADDR_START : (Offset: 0x52) Vertical Address Start
\r
419 #define ILI9325_VERTICAL_ADDR_START (0x52u)
\r
420 #define ILI9325_VERTICAL_ADDR_START_VSA_POS 0
\r
421 #define ILI9325_VERTICAL_ADDR_START_VSA_MSK (0x1ffu << \
\r
422 ILI9325_VERTICAL_ADDR_START_VSA_POS)
\r
423 #define ILI9325_VERTICAL_ADDR_START_VSA(value) (( \
\r
424 ILI9325_VERTICAL_ADDR_START_VSA_MSK & \
\r
425 ((value) << ILI9325_VERTICAL_ADDR_START_VSA_POS)))
\r
428 * ILI9325_VERTICAL_ADDR_END : (Offset: 0x53) Vertical Address End
\r
431 #define ILI9325_VERTICAL_ADDR_END (0x53u)
\r
432 #define ILI9325_VERTICAL_ADDR_END_VEA_POS 0
\r
433 #define ILI9325_VERTICAL_ADDR_END_VEA_MSK (0x1ffu << \
\r
434 ILI9325_VERTICAL_ADDR_END_VEA_POS)
\r
435 #define ILI9325_VERTICAL_ADDR_END_VEA(value) ((ILI9325_VERTICAL_ADDR_END_VEA_MSK \
\r
436 & ((value) << ILI9325_VERTICAL_ADDR_END_VEA_POS)))
\r
439 * ILI9325_DRIVER_OUTPUT_CTRL2 : (Offset: 0x60) Driver Output
\r
442 #define ILI9325_DRIVER_OUTPUT_CTRL2 (0x60u)
\r
443 #define ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS 0
\r
444 #define ILI9325_DRIVER_OUTPUT_CTRL2_SCN_MSK (0x3fu << \
\r
445 ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS)
\r
446 #define ILI9325_DRIVER_OUTPUT_CTRL2_SCN(value) (( \
\r
447 ILI9325_DRIVER_OUTPUT_CTRL2_SCN_MSK & \
\r
448 ((value) << ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS)))
\r
449 #define ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS 8
\r
450 #define ILI9325_DRIVER_OUTPUT_CTRL2_NL_MSK (0x3fu << \
\r
451 ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS)
\r
452 #define ILI9325_DRIVER_OUTPUT_CTRL2_NL(value) (( \
\r
453 ILI9325_DRIVER_OUTPUT_CTRL2_NL_MSK & \
\r
454 ((value) << ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS)))
\r
455 #define ILI9325_DRIVER_OUTPUT_CTRL2_GS (0x1u << 15)
\r
458 * ILI9325_BASE_IMG_DISP_CTRL : (Offset: 0x61) Base Image Display
\r
461 #define ILI9325_BASE_IMG_DISP_CTRL (0x61u)
\r
462 #define ILI9325_BASE_IMG_DISP_CTRL_REV (0x1u << 0)
\r
463 #define ILI9325_BASE_IMG_DISP_CTRL_VLE (0x1u << 1)
\r
464 #define ILI9325_BASE_IMG_DISP_CTRL_NDL (0x1u << 2)
\r
467 * ILI9325_VERTICAL_SCROLL_CTRL : (Offset: 0x6A) Vertical Scroll
\r
470 #define ILI9325_VERTICAL_SCROLL_CTRL (0x6Au)
\r
471 #define ILI9325_VERTICAL_SCROLL_CTRL_VL_POS 0
\r
472 #define ILI9325_VERTICAL_SCROLL_CTRL_VL_MSK (0x1ffu << \
\r
473 ILI9325_VERTICAL_SCROLL_CTRL_VL_POS)
\r
474 #define ILI9325_VERTICAL_SCROLL_CTRL_VL(value) (( \
\r
475 ILI9325_VERTICAL_SCROLL_CTRL_VL_MSK & \
\r
476 ((value) << ILI9325_VERTICAL_SCROLL_CTRL_VL_POS)))
\r
479 * ILI9325_PARTIAL_IMG1_DISP_POS : (Offset: 0x80) Partial Image 1
\r
482 #define ILI9325_PARTIAL_IMG1_DISP_POS (0x80u)
\r
483 #define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS 0
\r
484 #define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_MSK (0x1ffu << \
\r
485 ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS)
\r
486 #define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0(value) (( \
\r
487 ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_MSK & \
\r
488 ((value) << ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS)))
\r
491 * ILI9325_PARTIAL_IMG1_AREA_START_LINE : (Offset: 0x81) Partial Image
\r
492 * 1 Area (Start Line)
\r
494 #define ILI9325_PARTIAL_IMG1_AREA_START_LINE (0x81u)
\r
495 #define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS 0
\r
496 #define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_MSK (0x1ffu << \
\r
497 ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS)
\r
498 #define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0(value) (( \
\r
499 ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_MSK & \
\r
501 ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS)))
\r
504 * ILI9325_PARTIAL_IMG1_AREA_END_LINE : (Offset: 0x82) Partial Image 1
\r
507 #define ILI9325_PARTIAL_IMG1_AREA_END_LINE (0x82u)
\r
508 #define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS 0
\r
509 #define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_MSK (0x1ffu << \
\r
510 ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS)
\r
511 #define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0(value) (( \
\r
512 ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_MSK & \
\r
514 ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS)))
\r
517 * ILI9325_PARTIAL_IMG2_DISP_POS : (Offset: 0x83) Partial Image 2
\r
520 #define ILI9325_PARTIAL_IMG2_DISP_POS (0x83u)
\r
521 #define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS 0
\r
522 #define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_MSK (0x1ffu << \
\r
523 ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS)
\r
524 #define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1(value) (( \
\r
525 ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_MSK & \
\r
526 ((value) << ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS)))
\r
529 * ILI9325_PARTIAL_IMG2_AREA_START_LINE : (Offset: 0x84) Partial Image
\r
530 * 2 Area (Start Line)
\r
532 #define ILI9325_PARTIAL_IMG2_AREA_START_LINE (0x84u)
\r
533 #define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS 0
\r
534 #define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_MSK (0x1ffu << \
\r
535 ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS)
\r
536 #define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1(value) (( \
\r
537 ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_MSK & \
\r
539 ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS)))
\r
542 * ILI9325_PARTIAL_IMG2_AREA_END_LINE : (Offset: 0x85) Partial Image 2
\r
545 #define ILI9325_PARTIAL_IMG2_AREA_END_LINE (0x85u)
\r
546 #define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS 0
\r
547 #define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_MSK (0x1ffu << \
\r
548 ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS)
\r
549 #define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1(value) (( \
\r
550 ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_MSK & \
\r
552 ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS)))
\r
555 * ILI9325_PANEL_INTERFACE_CTRL1 : (Offset: 0x90) Panel Interface
\r
558 #define ILI9325_PANEL_INTERFACE_CTRL1 (0x90u)
\r
559 #define ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS 0
\r
560 #define ILI9325_PANEL_INTERFACE_CTRL1_RTNI_MSK (0x1fu << \
\r
561 ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS)
\r
562 #define ILI9325_PANEL_INTERFACE_CTRL1_RTNI(value) (( \
\r
563 ILI9325_PANEL_INTERFACE_CTRL1_RTNI_MSK & \
\r
564 ((value) << ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS)))
\r
565 #define ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS 8
\r
566 #define ILI9325_PANEL_INTERFACE_CTRL1_DIVI_MSK (0x3u << \
\r
567 ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS)
\r
568 #define ILI9325_PANEL_INTERFACE_CTRL1_DIVI(value) (( \
\r
569 ILI9325_PANEL_INTERFACE_CTRL1_DIVI_MSK & \
\r
570 ((value) << ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS)))
\r
573 * ILI9325_PANEL_INTERFACE_CTRL2 : (Offset: 0x92) Panel Interface
\r
576 #define ILI9325_PANEL_INTERFACE_CTRL2 (0x92u)
\r
577 #define ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS 8
\r
578 #define ILI9325_PANEL_INTERFACE_CTRL2_NOWI_MSK (0x7u << \
\r
579 ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS)
\r
580 #define ILI9325_PANEL_INTERFACE_CTRL2_NOWI(value) (( \
\r
581 ILI9325_PANEL_INTERFACE_CTRL2_NOWI_MSK & \
\r
582 ((value) << ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS)))
\r
585 * ILI9325_PANEL_INTERFACE_CTRL4 : (Offset: 0x95) Panel Interface
\r
588 #define ILI9325_PANEL_INTERFACE_CTRL4 (0x95u)
\r
589 #define ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS 0
\r
590 #define ILI9325_PANEL_INTERFACE_CTRL4_RTNE_MSK (0x3fu << \
\r
591 ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS)
\r
592 #define ILI9325_PANEL_INTERFACE_CTRL4_RTNE(value) (( \
\r
593 ILI9325_PANEL_INTERFACE_CTRL4_RTNE_MSK & \
\r
594 ((value) << ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS)))
\r
595 #define ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS 8
\r
596 #define ILI9325_PANEL_INTERFACE_CTRL4_DIVE_MSK (0x3u << \
\r
597 ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS)
\r
598 #define ILI9325_PANEL_INTERFACE_CTRL4_DIVE(value) (( \
\r
599 ILI9325_PANEL_INTERFACE_CTRL4_DIVE_MSK & \
\r
600 ((value) << ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS)))
\r
602 /** ILI9325_OTP_VCM_PROG_CTRL : (Offset: 0xA1) OTP VCM Programming Control */
\r
603 #define ILI9325_OTP_VCM_PROG_CTRL (0xA1u)
\r
604 #define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS 0
\r
605 #define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_MSK (0x3fu << \
\r
606 ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS)
\r
607 #define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP(value) (( \
\r
608 ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_MSK & \
\r
609 ((value) << ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS)))
\r
610 #define ILI9325_OTP_VCM_PROG_CTRL_OTP_PGM_EN (0x1u << 11)
\r
612 /** ILI9325_OTP_VCM_STATUS_AND_ENABLE : (Offset: 0xA2) OTP VCM Status
\r
614 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE (0xA2u)
\r
615 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_EN (0x1u << 0)
\r
616 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS 8
\r
617 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_MSK (0x3fu << \
\r
618 ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS)
\r
619 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D(value) (( \
\r
620 ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_MSK & ((value) << \
\r
621 ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS)))
\r
622 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS 14
\r
623 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_MSK (0x3u << \
\r
624 ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS)
\r
625 #define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT(value) (( \
\r
626 ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_MSK & \
\r
628 IILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS)))
\r
630 /** ILI9325_OTP_PROG_ID_KEY : (Offset: 0xA5) OTP Programming ID Key */
\r
631 #define ILI9325_OTP_PROG_ID_KEY (0xA5u)
\r
632 #define ILI9325_OTP_PROG_ID_KEY_KEY_POS 0
\r
633 #define ILI9325_OTP_PROG_ID_KEY_KEY_MSK (0xffffu << \
\r
634 ILI9325_OTP_PROG_ID_KEY_KEY_POS)
\r
635 #define ILI9325_OTP_PROG_ID_KEY_KEY(value) ((ILI9325_OTP_PROG_ID_KEY_KEY_MSK & \
\r
636 ((value) << ILI9325_OTP_PROG_ID_KEY_KEY_POS)))
\r
646 #endif /* ILI9325_REGS_H_INCLUDED */
\r
projects / freertos / blob