2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /* Standard includes. */
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32 /* FreeRTOS includes. */
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33 #include "FreeRTOS.h"
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36 /* Library includes. */
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37 #include "common_lib.h"
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38 #include "peripheral_library/interrupt/interrupt.h"
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39 #include "peripheral_library/basic_timer/btimer.h"
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41 /* This file contains functions that will override the default implementations
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42 in the RTOS port layer. Therefore only build this file if the low power demo
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44 #if( configCREATE_LOW_POWER_DEMO == 1 )
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46 /* ID of the hibernation timer used to generate the tick. */
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47 #define mainTICK_HTIMER_ID 0
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49 /* Written to the hibernation timer control register to configure the timer for
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50 its higher resolution. */
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51 #define mainHTIMER_HIGH_RESOLUTION 0
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53 /* The frequency of the hibernation timer when it is running at its higher
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54 resolution and low resolution respectively. */
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55 #define mainHIGHER_RESOLUTION_TIMER_HZ ( 32787UL ) /* (1000000us / 30.5us) as each LSB is 30.5us. */
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56 #define mainLOW_RESOLUTION_TIMER_HZ ( 8UL ) /* ( 1000ms / 125ms ) as each LSB is 0.125s. */
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58 /* When lpINCLUDE_TEST_TIMER is set to 1 a basic timer is used to generate
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59 interrupts at a low frequency. The purpose being to bring the CPU out of its
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60 sleep mode by an interrupt other than the tick interrupt, and therefore
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61 allowing an additional paths through the code to be tested. */
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62 #define lpINCLUDE_TEST_TIMER 0
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64 /* Registers and bits required to use the htimer in aggregated mode. */
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65 #define lpHTIMER_PRELOAD_REGISTER ( * ( volatile uint16_t * ) 0x40009800 )
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66 #define lpHTIMER_CONTROL_REGISTER ( * ( volatile uint16_t * ) 0x40009804 )
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67 #define lpHTIMER_COUNT_REGISTER ( * ( volatile uint16_t * ) 0x40009808 )
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68 #define lpEC_GIRQ17_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000C0B8 )
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69 #define lpEC_GIRQ17_SOURCE ( * ( volatile uint32_t * ) 0x4000C0B4 )
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70 #define lpEC_GIRQ17_ENABLE_CLEAR ( * ( volatile uint32_t * ) 0x4000C0C0 )
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71 #define lpBLOCK_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000c200 )
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72 #define lpGIRQ17_BIT_HTIMER ( 1UL << 20UL )
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73 #define lpHTIMER_GIRQ_BLOCK ( 1Ul << 17UL )
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75 /* Registers and bits required to use btimer 0 in aggregated mode. */
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76 #define lpGIRQ23_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000C130 )
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77 #define lpEC_GIRQ23_SOURCE ( * ( volatile uint32_t * ) 0x4000C12C )
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78 #define lpEC_GIRQ23_ENABLE_CLEAR ( * ( volatile uint32_t * ) 0x4000C138 )
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79 #define lpGIRQ23_BIT_TIMER0 ( 1UL << 0UL )
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80 #define lpBTIMER_GIRQ_BLOCK ( 1UL << 23UL )
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83 * The low power demo does not use the SysTick, so override the
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84 * vPortSetupTickInterrupt() function with an implementation that configures
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85 * the low power clock. NOTE: This function name must not be changed as it
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86 * is called from the RTOS portable layer.
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88 void vPortSetupTimerInterrupt( void );
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91 * To fully test the low power tick processing it is necessary to sometimes
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92 * bring the MCU out of its sleep state by a method other than the tick
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93 * interrupt. Interrupts generated from a basic timer are used for this
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96 #if( lpINCLUDE_TEST_TIMER == 1 )
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97 static void prvSetupBasicTimer( void );
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100 /*-----------------------------------------------------------*/
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102 /* The reload value to use in the timer to generate the tick interrupt -
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103 assumes the timer is running at its higher resolution. */
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104 static const uint32_t ulHighResolutionReloadValue = ( mainHIGHER_RESOLUTION_TIMER_HZ / configTICK_RATE_HZ );
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106 /* Calculate how many clock increments make up a single tick period. */
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107 static const uint32_t ulReloadValueForOneHighResolutionTick = ( mainHIGHER_RESOLUTION_TIMER_HZ / configTICK_RATE_HZ );
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109 /* Calculate the maximum number of ticks that can be suppressed when using the
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110 high resolution clock and low resolution clock respectively. */
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111 static uint32_t ulMaximumPossibleSuppressedHighResolutionTicks = 0;
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113 /* As the clock is only 2KHz, it is likely a value of 1 will be too much, so
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114 use zero - but leave the value here to assist porting to different clock
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116 static const uint32_t ulStoppedTimerCompensation = 0UL;
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118 /* Flag set from the tick interrupt to allow the sleep processing to know if
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119 sleep mode was exited because of an timer interrupt or a different interrupt. */
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120 static volatile uint32_t ulTickFlag = pdFALSE;
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122 /*-----------------------------------------------------------*/
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124 void NVIC_Handler_GIRQ17( void )
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126 /* The low power demo is using aggregated interrupts, so although in the
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127 demo the htimer is the only peripheral that will generate interrupts on
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128 this vector, in a real application it would be necessary to first check the
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129 interrupt source. */
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130 if( ( lpEC_GIRQ17_SOURCE & lpGIRQ17_BIT_HTIMER ) != 0 )
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132 /* The htimer interrupted. Clear the interrupt. */
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133 lpEC_GIRQ17_SOURCE = lpGIRQ17_BIT_HTIMER;
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134 lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulHighResolutionReloadValue;
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136 /* Increment the RTOS tick. */
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137 if( xTaskIncrementTick() != pdFALSE )
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139 /* A context switch is required. Context switching is performed in
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140 the PendSV interrupt. Pend the PendSV interrupt. */
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141 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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144 /* The CPU woke because of a tick. */
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145 ulTickFlag = pdTRUE;
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149 /* Don't expect any other interrupts to use this vector in this
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150 demo. Force an assert. */
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151 configASSERT( lpEC_GIRQ17_SOURCE == 0 );
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154 /*-----------------------------------------------------------*/
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156 #if( lpINCLUDE_TEST_TIMER == 1 )
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158 static void prvSetupBasicTimer( void )
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160 const uint8_t ucTimerChannel = 0;
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161 const uint32_t ulTimer0Count = configCPU_CLOCK_HZ / 10;
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163 /* Enable btimer 0 interrupt in the aggregated GIRQ23 block. */
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164 lpEC_GIRQ23_SOURCE = lpGIRQ23_BIT_TIMER0;
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165 lpEC_GIRQ23_ENABLE_CLEAR = lpGIRQ23_BIT_TIMER0;
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166 lpBLOCK_ENABLE_SET = lpBTIMER_GIRQ_BLOCK;
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167 lpGIRQ23_ENABLE_SET = lpGIRQ23_BIT_TIMER0;
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169 /* To fully test the low power tick processing it is necessary to sometimes
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170 bring the MCU out of its sleep state by a method other than the tick
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171 interrupt. Interrupts generated from a basic timer are used for this
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173 btimer_init( ucTimerChannel, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer0Count, ulTimer0Count );
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174 btimer_interrupt_status_get_clr( ucTimerChannel );
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175 NVIC_SetPriority( GIRQ23_IRQn, ucTimerChannel );
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176 NVIC_ClearPendingIRQ( GIRQ23_IRQn );
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177 NVIC_EnableIRQ( GIRQ23_IRQn );
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178 btimer_start( ucTimerChannel );
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181 #endif /* lpINCLUDE_TEST_TIMER */
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182 /*-----------------------------------------------------------*/
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184 void vPortSetupTimerInterrupt( void )
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186 ulMaximumPossibleSuppressedHighResolutionTicks = ( ( uint32_t ) USHRT_MAX ) / ulReloadValueForOneHighResolutionTick;
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188 /* Set up the hibernation timer to start at the value required by the
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190 lpHTIMER_PRELOAD_REGISTER = ulHighResolutionReloadValue;
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191 lpHTIMER_CONTROL_REGISTER = mainHTIMER_HIGH_RESOLUTION;
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193 /* Enable the HTIMER interrupt in the aggregated GIR17 block. */
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194 lpEC_GIRQ17_SOURCE = lpGIRQ17_BIT_HTIMER;
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195 lpEC_GIRQ17_ENABLE_CLEAR = lpGIRQ17_BIT_HTIMER;
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196 lpBLOCK_ENABLE_SET = lpHTIMER_GIRQ_BLOCK;
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197 lpEC_GIRQ17_ENABLE_SET = lpGIRQ17_BIT_HTIMER;
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199 /* The hibernation timer is not an auto-reload timer, so gets reset
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200 from within the ISR itself. For that reason it's interrupt is set
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201 to the highest possible priority to ensure clock slippage is minimised. */
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202 NVIC_SetPriority( GIRQ17_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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203 NVIC_ClearPendingIRQ( GIRQ17_IRQn );
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204 NVIC_EnableIRQ( GIRQ17_IRQn );
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206 /* A basic timer is also started, purely for test purposes. Its only
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207 purpose is to bring the CPU out of its sleep mode by an interrupt other
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208 than the tick interrupt in order to get more code test coverage. */
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209 #if( lpINCLUDE_TEST_TIMER == 1 )
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211 prvSetupBasicTimer();
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215 /*-----------------------------------------------------------*/
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217 /* Override the default definition of vPortSuppressTicksAndSleep() that is
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218 weakly defined in the FreeRTOS Cortex-M port layer with a version that manages
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219 the hibernation timer, as the tick is generated from the low power hibernation
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220 timer and not the SysTick as would normally be the case on a Cortex-M. */
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221 void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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223 uint32_t ulCompleteTickPeriods, ulReloadValue, ulCompletedTimerDecrements, ulCountAfterSleep, ulCountBeforeSleep;
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224 eSleepModeStatus eSleepAction;
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225 TickType_t xModifiableIdleTime;
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227 /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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229 /* Make sure the hibernation timer reload value does not overflow the
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231 if( xExpectedIdleTime > ( TickType_t ) ulMaximumPossibleSuppressedHighResolutionTicks )
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233 xExpectedIdleTime = ( TickType_t ) ulMaximumPossibleSuppressedHighResolutionTicks;
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236 /* Stop the timer momentarily. The time the timer is stopped for is
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237 accounted for as best it can be, but using the tickless mode will
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238 inevitably result in some tiny drift of the time maintained by the kernel
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239 with respect to calendar time. Take the count value first as clearing
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240 the preload value also seems to clear the count. */
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241 ulCountBeforeSleep = ( uint32_t ) lpHTIMER_COUNT_REGISTER;
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242 lpHTIMER_PRELOAD_REGISTER = 0;
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244 /* Calculate the reload value required to wait xExpectedIdleTime tick
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245 periods. -1 is used as the current time slice will already be part way
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246 through, the part value coming from the current timer count value. */
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247 ulReloadValue = ulCountBeforeSleep + ( ulReloadValueForOneHighResolutionTick * ( xExpectedIdleTime - 1UL ) );
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249 if( ulReloadValue > ulStoppedTimerCompensation )
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251 /* Compensate for the fact that the timer is going to be stopped
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253 ulReloadValue -= ulStoppedTimerCompensation;
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256 /* Enter a critical section but don't use the taskENTER_CRITICAL() method as
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257 that will mask interrupts that should exit sleep mode. */
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258 __asm volatile( "cpsid i" );
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259 __asm volatile( "dsb" );
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260 __asm volatile( "isb" );
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262 /* The tick flag is set to false before sleeping. If it is true when sleep
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263 mode is exited then sleep mode was probably exited because the tick was
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264 suppressed for the entire xExpectedIdleTime period. */
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265 ulTickFlag = pdFALSE;
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267 /* If a context switch is pending then abandon the low power entry as
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268 the context switch might have been pended by an external interrupt that
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269 requires processing. */
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270 eSleepAction = eTaskConfirmSleepModeStatus();
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271 if( eSleepAction == eAbortSleep )
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273 /* Restart the timer from whatever remains in the counter register,
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274 but 0 is not a valid value. */
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275 ulReloadValue = ulCountBeforeSleep - ulStoppedTimerCompensation;
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277 if( ulReloadValue == 0 )
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279 ulReloadValue = ulReloadValueForOneHighResolutionTick;
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280 ulCompleteTickPeriods = 1UL;
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284 ulCompleteTickPeriods = 0UL;
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287 lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulReloadValue;
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289 /* Re-enable interrupts - see comments above the cpsid instruction()
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291 __asm volatile( "cpsie i" );
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292 __asm volatile( "dsb" );
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293 __asm volatile( "isb" );
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297 /* Write the calculated reload value, which will also start the
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299 lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulReloadValue;
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301 /* Allow the application to define some pre-sleep processing. */
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302 xModifiableIdleTime = xExpectedIdleTime;
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303 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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305 /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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306 means the application defined code has already executed the sleep
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308 if( xModifiableIdleTime > 0 )
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310 __asm volatile( "dsb" );
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311 __asm volatile( "wfi" );
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312 __asm volatile( "isb" );
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315 /* Allow the application to define some post sleep processing. */
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316 configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
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318 /* Stop the hibernation timer. Again, the time the timer is stopped
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319 for is accounted for as best it can be, but using the tickless mode
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320 will inevitably result in some tiny drift of the time maintained by the
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321 kernel with respect to calendar time. Take the count value first as
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322 setting the preload to zero also seems to clear the count. */
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323 ulCountAfterSleep = lpHTIMER_COUNT_REGISTER;
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324 lpHTIMER_PRELOAD_REGISTER = 0;
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326 /* Re-enable interrupts - see comments above the cpsid instruction()
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328 __asm volatile( "cpsie i" );
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329 __asm volatile( "dsb" );
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330 __asm volatile( "isb" );
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332 if( ulTickFlag != pdFALSE )
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334 /* The tick interrupt has already executed, although because this
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335 function is called with the scheduler suspended the actual tick
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336 processing will not occur until after this function has exited.
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337 The timer has already been reloaded to count in ticks, and can just
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338 continue counting down from its current value. */
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339 ulReloadValue = ulCountAfterSleep;
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341 /* Sanity check that the timer's reload value has indeed been
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343 configASSERT( ( uint32_t ) lpHTIMER_PRELOAD_REGISTER == ulReloadValueForOneHighResolutionTick );
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345 /* The tick interrupt handler will already have pended the tick
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346 processing in the kernel. As the pending tick will be processed as
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347 soon as this function exits, the tick value maintained by the tick
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348 is stepped forward by one less than the time spent sleeping. The
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349 actual stepping of the tick appears later in this function. */
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350 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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354 /* Something other than the tick interrupt ended the sleep. How
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355 many complete tick periods passed while the processor was
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357 ulCompletedTimerDecrements = ulReloadValue - ulCountAfterSleep;
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359 /* Undo the adjustment that was made to the reload value to account
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360 for the fact that a time slice was part way through when this
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361 function was called before working out how many complete tick
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362 periods this represents. (could have used [ulExpectedIdleTime *
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363 ulReloadValueForOneHighResolutionTick] instead of ulReloadValue on
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364 the previous line, but this way avoids the multiplication). */
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365 ulCompletedTimerDecrements += ( ulReloadValueForOneHighResolutionTick - ulCountBeforeSleep );
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366 ulCompleteTickPeriods = ulCompletedTimerDecrements / ulReloadValueForOneHighResolutionTick;
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368 /* The reload value is set to whatever fraction of a single tick
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370 ulReloadValue = ( ( ulCompleteTickPeriods + 1UL ) * ulReloadValueForOneHighResolutionTick ) - ulCompletedTimerDecrements;
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373 /* Cannot use a reload value of 0 - it will not start the timer. */
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374 if( ulReloadValue == 0 )
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376 /* There is no fraction remaining. */
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377 ulReloadValue = ulReloadValueForOneHighResolutionTick;
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378 ulCompleteTickPeriods++;
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381 /* Restart the timer so it runs down from the reload value. The reload
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382 value will get set to the value required to generate exactly one tick
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383 period the next time the tick interrupt executes. */
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384 lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulReloadValue;
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387 /* Wind the tick forward by the number of tick periods that the CPU
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388 remained in a low power state. */
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389 vTaskStepTick( ulCompleteTickPeriods );
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391 /*-----------------------------------------------------------*/
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393 void NVIC_Handler_GIRQ23( void )
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395 static volatile uint32_t ulTimerCounts = 0;
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397 /* The low power demo is using aggregated interrupts, so although in the
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398 demo btimer 0 is the only peripheral that will generate interrupts on
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399 this vector, in a real application it would be necessary to first check the
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400 interrupt source. */
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401 if( ( lpEC_GIRQ23_SOURCE & lpGIRQ23_BIT_TIMER0 ) != 0 )
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403 /* Btimer0 interrupted. Clear the interrupt. */
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404 lpEC_GIRQ23_SOURCE = lpGIRQ23_BIT_TIMER0;
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406 /* This timer is used for test purposes. Its only function is to
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407 generate interrupts while the MCU is sleeping, so the MCU is sometimes
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408 brought out of sleep by a means other than the tick interrupt. */
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413 /* Don't expect any other interrupts to use this vector in this
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414 demo. Force an assert. */
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415 configASSERT( lpEC_GIRQ23_SOURCE == 0 );
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418 /*-----------------------------------------------------------*/
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420 #endif /* configCREATE_LOW_POWER_DEMO == 1 */
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