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[freertos] / FreeRTOS / Demo / CORTEX_M4F_Infineon_XMC4000_GCC_Dave / main_full.c
1 /*\r
2     FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     This file is part of the FreeRTOS distribution.\r
8 \r
9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
10     the terms of the GNU General Public License (version 2) as published by the\r
11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
12 \r
13     ***************************************************************************\r
14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
16     >>!   obliged to provide the source code for proprietary components     !<<\r
17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
18     ***************************************************************************\r
19 \r
20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
23     link: http://www.freertos.org/a00114.html\r
24 \r
25     ***************************************************************************\r
26      *                                                                       *\r
27      *    FreeRTOS provides completely free yet professionally developed,    *\r
28      *    robust, strictly quality controlled, supported, and cross          *\r
29      *    platform software that is more than just the market leader, it     *\r
30      *    is the industry's de facto standard.                               *\r
31      *                                                                       *\r
32      *    Help yourself get started quickly while simultaneously helping     *\r
33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
34      *    tutorial book, reference manual, or both:                          *\r
35      *    http://www.FreeRTOS.org/Documentation                              *\r
36      *                                                                       *\r
37     ***************************************************************************\r
38 \r
39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
41     defined configASSERT()?\r
42 \r
43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
44     embedded software for free we request you assist our global community by\r
45     participating in the support forum.\r
46 \r
47     http://www.FreeRTOS.org/training - Investing in training allows your team to\r
48     be as productive as possible as early as possible.  Now you can receive\r
49     FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
50     Ltd, and the world's leading authority on the world's leading RTOS.\r
51 \r
52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
55 \r
56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
58 \r
59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
61     licenses offer ticketed support, indemnification and commercial middleware.\r
62 \r
63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
64     engineered and independently SIL3 certified version for use in safety and\r
65     mission critical applications that require provable dependability.\r
66 \r
67     1 tab == 4 spaces!\r
68 */\r
69 \r
70 /******************************************************************************\r
71  * NOTE 1:  This project provides two demo applications.  A simple blinky style\r
72  * project, and a more comprehensive test and demo application.  The\r
73  * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
74  * between the two.  See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
75  * in main.c.  This file implements the comprehensive test and demo version.\r
76  *\r
77  * NOTE 2:  This file only contains the source code that is specific to the\r
78  * full demo.  Generic functions, such FreeRTOS hook functions, and functions\r
79  * required to configure the hardware, are defined in main.c.\r
80  ******************************************************************************\r
81  *\r
82  * main_full() creates all the demo application tasks and a software timer, then\r
83  * starts the scheduler.  The web documentation provides more details of the\r
84  * standard demo application tasks, which provide no particular functionality,\r
85  * but do provide a good example of how to use the FreeRTOS API.\r
86  *\r
87  * In addition to the standard demo tasks, the following tasks and tests are\r
88  * defined and/or created within this file:\r
89  *\r
90  * "Reg test" tasks - These fill both the core and floating point registers with\r
91  * known values, then check that each register maintains its expected value for\r
92  * the lifetime of the task.  Each task uses a different set of values.  The reg\r
93  * test tasks execute with a very low priority, so get preempted very\r
94  * frequently.  A register containing an unexpected value is indicative of an\r
95  * error in the context switching mechanism.\r
96  *\r
97  * "Check" timer - The check software timer period is initially set to three\r
98  * seconds.  The callback function associated with the check software timer\r
99  * checks that all the standard demo tasks, and the register check tasks, are\r
100  * not only still executing, but are executing without reporting any errors.  If\r
101  * the check software timer discovers that a task has either stalled, or\r
102  * reported an error, then it changes its own execution period from the initial\r
103  * three seconds, to just 200ms.  The check software timer callback function\r
104  * also toggles the single LED each time it is called.  This provides a visual\r
105  * indication of the system status:  If the LED toggles every three seconds,\r
106  * then no issues have been discovered.  If the LED toggles every 200ms, then\r
107  * an issue has been discovered with at least one task.\r
108  */\r
109 \r
110 /* Standard includes. */\r
111 #include <stdio.h>\r
112 \r
113 /* Kernel includes. */\r
114 #include "FreeRTOS.h"\r
115 #include "task.h"\r
116 #include "timers.h"\r
117 #include "semphr.h"\r
118 \r
119 /* Standard demo application includes. */\r
120 #include "flop.h"\r
121 #include "semtest.h"\r
122 #include "dynamic.h"\r
123 #include "blocktim.h"\r
124 #include "countsem.h"\r
125 #include "GenQTest.h"\r
126 #include "recmutex.h"\r
127 \r
128 /* Priorities for the demo application tasks. */\r
129 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2UL )\r
130 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1UL )\r
131 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2UL )\r
132 #define mainCREATOR_TASK_PRIORITY                       ( tskIDLE_PRIORITY + 3UL )\r
133 #define mainFLOP_TASK_PRIORITY                          ( tskIDLE_PRIORITY )\r
134 \r
135 /* A block time of zero simply means "don't block". */\r
136 #define mainDONT_BLOCK                                          ( 0UL )\r
137 \r
138 /* The period after which the check timer will expire, in ms, provided no errors\r
139 have been reported by any of the standard demo tasks.  ms are converted to the\r
140 equivalent in ticks using the portTICK_PERIOD_MS constant. */\r
141 #define mainCHECK_TIMER_PERIOD_MS                       ( 3000UL / portTICK_PERIOD_MS )\r
142 \r
143 /* The period at which the check timer will expire, in ms, if an error has been\r
144 reported in one of the standard demo tasks.  ms are converted to the equivalent\r
145 in ticks using the portTICK_PERIOD_MS constant. */\r
146 #define mainERROR_CHECK_TIMER_PERIOD_MS         ( 200UL / portTICK_PERIOD_MS )\r
147 \r
148 /*-----------------------------------------------------------*/\r
149 \r
150 /*\r
151  * The check timer callback function, as described at the top of this file.\r
152  */\r
153 static void prvCheckTimerCallback( TimerHandle_t xTimer );\r
154 \r
155 /*\r
156  * Register check tasks, and the tasks used to write over and check the contents\r
157  * of the FPU registers, as described at the top of this file.  The nature of\r
158  * these files necessitates that they are written in an assembly file.\r
159  */\r
160 static void prvRegTest1Task( void *pvParameters ) __attribute__((naked));\r
161 static void prvRegTest2Task( void *pvParameters ) __attribute__((naked));\r
162 \r
163 /*-----------------------------------------------------------*/\r
164 \r
165 /* The following two variables are used to communicate the status of the\r
166 register check tasks to the check software timer.  If the variables keep\r
167 incrementing, then the register check tasks have not discovered any errors.  If\r
168 a variable stops incrementing, then an error has been found. */\r
169 volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
170 \r
171 /*-----------------------------------------------------------*/\r
172 \r
173 void main_full( void )\r
174 {\r
175 TimerHandle_t xCheckTimer = NULL;\r
176 \r
177         /* Start all the other standard demo/test tasks.  The have not particular\r
178         functionality, but do demonstrate how to use the FreeRTOS API and test the\r
179         kernel port. */\r
180         vStartDynamicPriorityTasks();\r
181         vCreateBlockTimeTasks();\r
182         vStartCountingSemaphoreTasks();\r
183         vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
184         vStartRecursiveMutexTasks();\r
185         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
186         vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
187 \r
188         /* Create the register check tasks, as described at the top of this\r
189         file */\r
190         xTaskCreate( prvRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
191         xTaskCreate( prvRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
192 \r
193         /* Create the software timer that performs the 'check' functionality,\r
194         as described at the top of this file. */\r
195         xCheckTimer = xTimerCreate( "CheckTimer",                                       /* A text name, purely to help debugging. */\r
196                                                                 ( mainCHECK_TIMER_PERIOD_MS ),  /* The timer period, in this case 3000ms (3s). */\r
197                                                                 pdTRUE,                                                 /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
198                                                                 ( void * ) 0,                                   /* The ID is not used, so can be set to anything. */\r
199                                                                 prvCheckTimerCallback                   /* The callback function that inspects the status of all the other tasks. */\r
200                                                           );\r
201 \r
202         if( xCheckTimer != NULL )\r
203         {\r
204                 xTimerStart( xCheckTimer, mainDONT_BLOCK );\r
205         }\r
206 \r
207         /* Start the scheduler. */\r
208         vTaskStartScheduler();\r
209 \r
210         /* If all is well, the scheduler will now be running, and the following line\r
211         will never be reached.  If the following line does execute, then there was\r
212         insufficient FreeRTOS heap memory available for the idle and/or timer tasks\r
213         to be created.  See the memory management section on the FreeRTOS web site\r
214         for more details. */\r
215         for( ;; );\r
216 }\r
217 /*-----------------------------------------------------------*/\r
218 \r
219 static void prvCheckTimerCallback( TimerHandle_t xTimer )\r
220 {\r
221 static long lChangedTimerPeriodAlready = pdFALSE;\r
222 static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
223 unsigned long ulErrorFound = pdFALSE;\r
224 \r
225         /* Check all the demo tasks (other than the flash tasks) to ensure\r
226         that they are all still running, and that none have detected an error. */\r
227 \r
228         if( xAreMathsTaskStillRunning() != pdTRUE )\r
229         {\r
230                 ulErrorFound = pdTRUE;\r
231         }\r
232 \r
233         if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
234         {\r
235                 ulErrorFound = pdTRUE;\r
236         }\r
237 \r
238         if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
239         {\r
240                 ulErrorFound = pdTRUE;\r
241         }\r
242 \r
243         if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
244         {\r
245                 ulErrorFound = pdTRUE;\r
246         }\r
247 \r
248         if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
249         {\r
250                 ulErrorFound = pdTRUE;\r
251         }\r
252 \r
253         if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
254         {\r
255                 ulErrorFound = pdTRUE;\r
256         }\r
257 \r
258         /* Check that the register test 1 task is still running. */\r
259         if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
260         {\r
261                 ulErrorFound = pdTRUE;\r
262         }\r
263         ulLastRegTest1Value = ulRegTest1LoopCounter;\r
264 \r
265         /* Check that the register test 2 task is still running. */\r
266         if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
267         {\r
268                 ulErrorFound = pdTRUE;\r
269         }\r
270         ulLastRegTest2Value = ulRegTest2LoopCounter;\r
271 \r
272         /* Toggle the check LED to give an indication of the system status.  If\r
273         the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then\r
274         everything is ok.  A faster toggle indicates an error. */\r
275         configTOGGLE_LED();\r
276 \r
277         /* Have any errors been latch in ulErrorFound?  If so, shorten the\r
278         period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.\r
279         This will result in an increase in the rate at which mainCHECK_LED\r
280         toggles. */\r
281         if( ulErrorFound != pdFALSE )\r
282         {\r
283                 if( lChangedTimerPeriodAlready == pdFALSE )\r
284                 {\r
285                         lChangedTimerPeriodAlready = pdTRUE;\r
286 \r
287                         /* This call to xTimerChangePeriod() uses a zero block time.\r
288                         Functions called from inside of a timer callback function must\r
289                         *never* attempt to block. */\r
290                         xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );\r
291                 }\r
292         }\r
293 }\r
294 /*-----------------------------------------------------------*/\r
295 \r
296 /* This is a naked function. */\r
297 static void prvRegTest1Task( void *pvParameters )\r
298 {\r
299         __asm volatile\r
300         (\r
301                 "       /* Fill the core registers with known values. */                \n"\r
302                 "       mov r0, #100                                                                                    \n"\r
303                 "       mov r1, #101                                                                                    \n"\r
304                 "       mov r2, #102                                                                                    \n"\r
305                 "       mov r3, #103                                                                                    \n"\r
306                 "       mov     r4, #104                                                                                        \n"\r
307                 "       mov     r5, #105                                                                                        \n"\r
308                 "       mov     r6, #106                                                                                        \n"\r
309                 "       mov r7, #107                                                                                    \n"\r
310                 "       mov     r8, #108                                                                                        \n"\r
311                 "       mov     r9, #109                                                                                        \n"\r
312                 "       mov     r10, #110                                                                                       \n"\r
313                 "       mov     r11, #111                                                                                       \n"\r
314                 "       mov r12, #112                                                                                   \n"\r
315                 "                                                                                                                       \n"\r
316                 "       /* Fill the VFP registers with known values. */                 \n"\r
317                 "       vmov d0, r0, r1                                                                                 \n"\r
318                 "       vmov d1, r2, r3                                                                                 \n"\r
319                 "       vmov d2, r4, r5                                                                                 \n"\r
320                 "       vmov d3, r6, r7                                                                                 \n"\r
321                 "       vmov d4, r8, r9                                                                                 \n"\r
322                 "       vmov d5, r10, r11                                                                               \n"\r
323                 "       vmov d6, r0, r1                                                                                 \n"\r
324                 "       vmov d7, r2, r3                                                                                 \n"\r
325                 "       vmov d8, r4, r5                                                                                 \n"\r
326                 "       vmov d9, r6, r7                                                                                 \n"\r
327                 "       vmov d10, r8, r9                                                                                \n"\r
328                 "       vmov d11, r10, r11                                                                              \n"\r
329                 "       vmov d12, r0, r1                                                                                \n"\r
330                 "       vmov d13, r2, r3                                                                                \n"\r
331                 "       vmov d14, r4, r5                                                                                \n"\r
332                 "       vmov d15, r6, r7                                                                                \n"\r
333                 "                                                                                                                       \n"\r
334                 "reg1_loop:                                                                                                     \n"\r
335                 "       /* Check all the VFP registers still contain the values set above.\n"\r
336                 "       First save registers that are clobbered by the test. */ \n"\r
337                 "       push { r0-r1 }                                                                                  \n"\r
338                 "                                                                                                                       \n"\r
339                 "       vmov r0, r1, d0                                                                                 \n"\r
340                 "       cmp r0, #100                                                                                    \n"\r
341                 "       bne reg1_error_loopf                                                                    \n"\r
342                 "       cmp r1, #101                                                                                    \n"\r
343                 "       bne reg1_error_loopf                                                                    \n"\r
344                 "       vmov r0, r1, d1                                                                                 \n"\r
345                 "       cmp r0, #102                                                                                    \n"\r
346                 "       bne reg1_error_loopf                                                                    \n"\r
347                 "       cmp r1, #103                                                                                    \n"\r
348                 "       bne reg1_error_loopf                                                                    \n"\r
349                 "       vmov r0, r1, d2                                                                                 \n"\r
350                 "       cmp r0, #104                                                                                    \n"\r
351                 "       bne reg1_error_loopf                                                                    \n"\r
352                 "       cmp r1, #105                                                                                    \n"\r
353                 "       bne reg1_error_loopf                                                                    \n"\r
354                 "       vmov r0, r1, d3                                                                                 \n"\r
355                 "       cmp r0, #106                                                                                    \n"\r
356                 "       bne reg1_error_loopf                                                                    \n"\r
357                 "       cmp r1, #107                                                                                    \n"\r
358                 "       bne reg1_error_loopf                                                                    \n"\r
359                 "       vmov r0, r1, d4                                                                                 \n"\r
360                 "       cmp r0, #108                                                                                    \n"\r
361                 "       bne reg1_error_loopf                                                                    \n"\r
362                 "       cmp r1, #109                                                                                    \n"\r
363                 "       bne reg1_error_loopf                                                                    \n"\r
364                 "       vmov r0, r1, d5                                                                                 \n"\r
365                 "       cmp r0, #110                                                                                    \n"\r
366                 "       bne reg1_error_loopf                                                                    \n"\r
367                 "       cmp r1, #111                                                                                    \n"\r
368                 "       bne reg1_error_loopf                                                                    \n"\r
369                 "       vmov r0, r1, d6                                                                                 \n"\r
370                 "       cmp r0, #100                                                                                    \n"\r
371                 "       bne reg1_error_loopf                                                                    \n"\r
372                 "       cmp r1, #101                                                                                    \n"\r
373                 "       bne reg1_error_loopf                                                                    \n"\r
374                 "       vmov r0, r1, d7                                                                                 \n"\r
375                 "       cmp r0, #102                                                                                    \n"\r
376                 "       bne reg1_error_loopf                                                                    \n"\r
377                 "       cmp r1, #103                                                                                    \n"\r
378                 "       bne reg1_error_loopf                                                                    \n"\r
379                 "       vmov r0, r1, d8                                                                                 \n"\r
380                 "       cmp r0, #104                                                                                    \n"\r
381                 "       bne reg1_error_loopf                                                                    \n"\r
382                 "       cmp r1, #105                                                                                    \n"\r
383                 "       bne reg1_error_loopf                                                                    \n"\r
384                 "       vmov r0, r1, d9                                                                                 \n"\r
385                 "       cmp r0, #106                                                                                    \n"\r
386                 "       bne reg1_error_loopf                                                                    \n"\r
387                 "       cmp r1, #107                                                                                    \n"\r
388                 "       bne reg1_error_loopf                                                                    \n"\r
389                 "       vmov r0, r1, d10                                                                                \n"\r
390                 "       cmp r0, #108                                                                                    \n"\r
391                 "       bne reg1_error_loopf                                                                    \n"\r
392                 "       cmp r1, #109                                                                                    \n"\r
393                 "       bne reg1_error_loopf                                                                    \n"\r
394                 "       vmov r0, r1, d11                                                                                \n"\r
395                 "       cmp r0, #110                                                                                    \n"\r
396                 "       bne reg1_error_loopf                                                                    \n"\r
397                 "       cmp r1, #111                                                                                    \n"\r
398                 "       bne reg1_error_loopf                                                                    \n"\r
399                 "       vmov r0, r1, d12                                                                                \n"\r
400                 "       cmp r0, #100                                                                                    \n"\r
401                 "       bne reg1_error_loopf                                                                    \n"\r
402                 "       cmp r1, #101                                                                                    \n"\r
403                 "       bne reg1_error_loopf                                                                    \n"\r
404                 "       vmov r0, r1, d13                                                                                \n"\r
405                 "       cmp r0, #102                                                                                    \n"\r
406                 "       bne reg1_error_loopf                                                                    \n"\r
407                 "       cmp r1, #103                                                                                    \n"\r
408                 "       bne reg1_error_loopf                                                                    \n"\r
409                 "       vmov r0, r1, d14                                                                                \n"\r
410                 "       cmp r0, #104                                                                                    \n"\r
411                 "       bne reg1_error_loopf                                                                    \n"\r
412                 "       cmp r1, #105                                                                                    \n"\r
413                 "       bne reg1_error_loopf                                                                    \n"\r
414                 "       vmov r0, r1, d15                                                                                \n"\r
415                 "       cmp r0, #106                                                                                    \n"\r
416                 "       bne reg1_error_loopf                                                                    \n"\r
417                 "       cmp r1, #107                                                                                    \n"\r
418                 "       bne reg1_error_loopf                                                                    \n"\r
419                 "                                                                                                                       \n"\r
420                 "       /* Restore the registers that were clobbered by the test. */\n"\r
421                 "       pop {r0-r1}                                                                                             \n"\r
422                 "                                                                                                                       \n"\r
423                 "       /* VFP register test passed.  Jump to the core register test. */\n"\r
424                 "       b reg1_loopf_pass                                                                               \n"\r
425                 "                                                                                                                       \n"\r
426                 "reg1_error_loopf:                                                                                      \n"\r
427                 "       /* If this line is hit then a VFP register value was found to be\n"\r
428                 "       incorrect. */                                                                                   \n"\r
429                 "       b reg1_error_loopf                                                                              \n"\r
430                 "                                                                                                                       \n"\r
431                 "reg1_loopf_pass:                                                                                       \n"\r
432                 "                                                                                                                       \n"\r
433                 "       cmp     r0, #100                                                                                        \n"\r
434                 "       bne     reg1_error_loop                                                                         \n"\r
435                 "       cmp     r1, #101                                                                                        \n"\r
436                 "       bne     reg1_error_loop                                                                         \n"\r
437                 "       cmp     r2, #102                                                                                        \n"\r
438                 "       bne     reg1_error_loop                                                                         \n"\r
439                 "       cmp r3, #103                                                                                    \n"\r
440                 "       bne     reg1_error_loop                                                                         \n"\r
441                 "       cmp     r4, #104                                                                                        \n"\r
442                 "       bne     reg1_error_loop                                                                         \n"\r
443                 "       cmp     r5, #105                                                                                        \n"\r
444                 "       bne     reg1_error_loop                                                                         \n"\r
445                 "       cmp     r6, #106                                                                                        \n"\r
446                 "       bne     reg1_error_loop                                                                         \n"\r
447                 "       cmp     r7, #107                                                                                        \n"\r
448                 "       bne     reg1_error_loop                                                                         \n"\r
449                 "       cmp     r8, #108                                                                                        \n"\r
450                 "       bne     reg1_error_loop                                                                         \n"\r
451                 "       cmp     r9, #109                                                                                        \n"\r
452                 "       bne     reg1_error_loop                                                                         \n"\r
453                 "       cmp     r10, #110                                                                                       \n"\r
454                 "       bne     reg1_error_loop                                                                         \n"\r
455                 "       cmp     r11, #111                                                                                       \n"\r
456                 "       bne     reg1_error_loop                                                                         \n"\r
457                 "       cmp     r12, #112                                                                                       \n"\r
458                 "       bne     reg1_error_loop                                                                         \n"\r
459                 "                                                                                                                       \n"\r
460                 "       /* Everything passed, increment the loop counter. */    \n"\r
461                 "       push { r0-r1 }                                                                                  \n"\r
462                 "       ldr     r0, =ulRegTest1LoopCounter                                                      \n"\r
463                 "       ldr r1, [r0]                                                                                    \n"\r
464                 "       adds r1, r1, #1                                                                                 \n"\r
465                 "       str r1, [r0]                                                                                    \n"\r
466                 "       pop { r0-r1 }                                                                                   \n"\r
467                 "                                                                                                                       \n"\r
468                 "       /* Start again. */                                                                              \n"\r
469                 "       b reg1_loop                                                                                             \n"\r
470                 "                                                                                                                       \n"\r
471                 "reg1_error_loop:                                                                                       \n"\r
472                 "       /* If this line is hit then there was an error in a core register value.\n"\r
473                 "       The loop ensures the loop counter stops incrementing. */\n"\r
474                 "       b reg1_error_loop                                                                               \n"\r
475                 "       nop                                                                                                             "\r
476         );\r
477 }\r
478 /*-----------------------------------------------------------*/\r
479 \r
480 /* This is a naked function. */\r
481 static void prvRegTest2Task( void *pvParameters )\r
482 {\r
483         __asm volatile\r
484         (\r
485                 "       /* Set all the core registers to known values. */               \n"\r
486                 "       mov r0, #-1                                                                                             \n"\r
487                 "       mov r1, #1                                                                                              \n"\r
488                 "       mov r2, #2                                                                                              \n"\r
489                 "       mov r3, #3                                                                                              \n"\r
490                 "       mov     r4, #4                                                                                          \n"\r
491                 "       mov     r5, #5                                                                                          \n"\r
492                 "       mov     r6, #6                                                                                          \n"\r
493                 "       mov r7, #7                                                                                              \n"\r
494                 "       mov     r8, #8                                                                                          \n"\r
495                 "       mov     r9, #9                                                                                          \n"\r
496                 "       mov     r10, #10                                                                                        \n"\r
497                 "       mov     r11, #11                                                                                        \n"\r
498                 "       mov r12, #12                                                                                    \n"\r
499                 "                                                                                                                       \n"\r
500                 "       /* Set all the VFP to known values. */                                  \n"\r
501                 "       vmov d0, r0, r1                                                                                 \n"\r
502                 "       vmov d1, r2, r3                                                                                 \n"\r
503                 "       vmov d2, r4, r5                                                                                 \n"\r
504                 "       vmov d3, r6, r7                                                                                 \n"\r
505                 "       vmov d4, r8, r9                                                                                 \n"\r
506                 "       vmov d5, r10, r11                                                                               \n"\r
507                 "       vmov d6, r0, r1                                                                                 \n"\r
508                 "       vmov d7, r2, r3                                                                                 \n"\r
509                 "       vmov d8, r4, r5                                                                                 \n"\r
510                 "       vmov d9, r6, r7                                                                                 \n"\r
511                 "       vmov d10, r8, r9                                                                                \n"\r
512                 "       vmov d11, r10, r11                                                                              \n"\r
513                 "       vmov d12, r0, r1                                                                                \n"\r
514                 "       vmov d13, r2, r3                                                                                \n"\r
515                 "       vmov d14, r4, r5                                                                                \n"\r
516                 "       vmov d15, r6, r7                                                                                \n"\r
517                 "                                                                                                                       \n"\r
518                 "reg2_loop:                                                                                                     \n"\r
519                 "                                                                                                                       \n"\r
520                 "       /* Check all the VFP registers still contain the values set above.\n"\r
521                 "       First save registers that are clobbered by the test. */ \n"\r
522                 "       push { r0-r1 }                                                                                  \n"\r
523                 "                                                                                                                       \n"\r
524                 "       vmov r0, r1, d0                                                                                 \n"\r
525                 "       cmp r0, #-1                                                                                             \n"\r
526                 "       bne reg2_error_loopf                                                                    \n"\r
527                 "       cmp r1, #1                                                                                              \n"\r
528                 "       bne reg2_error_loopf                                                                    \n"\r
529                 "       vmov r0, r1, d1                                                                                 \n"\r
530                 "       cmp r0, #2                                                                                              \n"\r
531                 "       bne reg2_error_loopf                                                                    \n"\r
532                 "       cmp r1, #3                                                                                              \n"\r
533                 "       bne reg2_error_loopf                                                                    \n"\r
534                 "       vmov r0, r1, d2                                                                                 \n"\r
535                 "       cmp r0, #4                                                                                              \n"\r
536                 "       bne reg2_error_loopf                                                                    \n"\r
537                 "       cmp r1, #5                                                                                              \n"\r
538                 "       bne reg2_error_loopf                                                                    \n"\r
539                 "       vmov r0, r1, d3                                                                                 \n"\r
540                 "       cmp r0, #6                                                                                              \n"\r
541                 "       bne reg2_error_loopf                                                                    \n"\r
542                 "       cmp r1, #7                                                                                              \n"\r
543                 "       bne reg2_error_loopf                                                                    \n"\r
544                 "       vmov r0, r1, d4                                                                                 \n"\r
545                 "       cmp r0, #8                                                                                              \n"\r
546                 "       bne reg2_error_loopf                                                                    \n"\r
547                 "       cmp r1, #9                                                                                              \n"\r
548                 "       bne reg2_error_loopf                                                                    \n"\r
549                 "       vmov r0, r1, d5                                                                                 \n"\r
550                 "       cmp r0, #10                                                                                             \n"\r
551                 "       bne reg2_error_loopf                                                                    \n"\r
552                 "       cmp r1, #11                                                                                             \n"\r
553                 "       bne reg2_error_loopf                                                                    \n"\r
554                 "       vmov r0, r1, d6                                                                                 \n"\r
555                 "       cmp r0, #-1                                                                                             \n"\r
556                 "       bne reg2_error_loopf                                                                    \n"\r
557                 "       cmp r1, #1                                                                                              \n"\r
558                 "       bne reg2_error_loopf                                                                    \n"\r
559                 "       vmov r0, r1, d7                                                                                 \n"\r
560                 "       cmp r0, #2                                                                                              \n"\r
561                 "       bne reg2_error_loopf                                                                    \n"\r
562                 "       cmp r1, #3                                                                                              \n"\r
563                 "       bne reg2_error_loopf                                                                    \n"\r
564                 "       vmov r0, r1, d8                                                                                 \n"\r
565                 "       cmp r0, #4                                                                                              \n"\r
566                 "       bne reg2_error_loopf                                                                    \n"\r
567                 "       cmp r1, #5                                                                                              \n"\r
568                 "       bne reg2_error_loopf                                                                    \n"\r
569                 "       vmov r0, r1, d9                                                                                 \n"\r
570                 "       cmp r0, #6                                                                                              \n"\r
571                 "       bne reg2_error_loopf                                                                    \n"\r
572                 "       cmp r1, #7                                                                                              \n"\r
573                 "       bne reg2_error_loopf                                                                    \n"\r
574                 "       vmov r0, r1, d10                                                                                \n"\r
575                 "       cmp r0, #8                                                                                              \n"\r
576                 "       bne reg2_error_loopf                                                                    \n"\r
577                 "       cmp r1, #9                                                                                              \n"\r
578                 "       bne reg2_error_loopf                                                                    \n"\r
579                 "       vmov r0, r1, d11                                                                                \n"\r
580                 "       cmp r0, #10                                                                                             \n"\r
581                 "       bne reg2_error_loopf                                                                    \n"\r
582                 "       cmp r1, #11                                                                                             \n"\r
583                 "       bne reg2_error_loopf                                                                    \n"\r
584                 "       vmov r0, r1, d12                                                                                \n"\r
585                 "       cmp r0, #-1                                                                                             \n"\r
586                 "       bne reg2_error_loopf                                                                    \n"\r
587                 "       cmp r1, #1                                                                                              \n"\r
588                 "       bne reg2_error_loopf                                                                    \n"\r
589                 "       vmov r0, r1, d13                                                                                \n"\r
590                 "       cmp r0, #2                                                                                              \n"\r
591                 "       bne reg2_error_loopf                                                                    \n"\r
592                 "       cmp r1, #3                                                                                              \n"\r
593                 "       bne reg2_error_loopf                                                                    \n"\r
594                 "       vmov r0, r1, d14                                                                                \n"\r
595                 "       cmp r0, #4                                                                                              \n"\r
596                 "       bne reg2_error_loopf                                                                    \n"\r
597                 "       cmp r1, #5                                                                                              \n"\r
598                 "       bne reg2_error_loopf                                                                    \n"\r
599                 "       vmov r0, r1, d15                                                                                \n"\r
600                 "       cmp r0, #6                                                                                              \n"\r
601                 "       bne reg2_error_loopf                                                                    \n"\r
602                 "       cmp r1, #7                                                                                              \n"\r
603                 "       bne reg2_error_loopf                                                                    \n"\r
604                 "                                                                                                                       \n"\r
605                 "       /* Restore the registers that were clobbered by the test. */\n"\r
606                 "       pop {r0-r1}                                                                                             \n"\r
607                 "                                                                                                                       \n"\r
608                 "       /* VFP register test passed.  Jump to the core register test. */\n"\r
609                 "       b reg2_loopf_pass                                                                               \n"\r
610                 "                                                                                                                       \n"\r
611                 "reg2_error_loopf:                                                                                      \n"\r
612                 "       /* If this line is hit then a VFP register value was found to be\n"\r
613                 "       incorrect. */                                                                                   \n"\r
614                 "       b reg2_error_loopf                                                                              \n"\r
615                 "                                                                                                                       \n"\r
616                 "reg2_loopf_pass:                                                                                       \n"\r
617                 "                                                                                                                       \n"\r
618                 "       cmp     r0, #-1                                                                                         \n"\r
619                 "       bne     reg2_error_loop                                                                         \n"\r
620                 "       cmp     r1, #1                                                                                          \n"\r
621                 "       bne     reg2_error_loop                                                                         \n"\r
622                 "       cmp     r2, #2                                                                                          \n"\r
623                 "       bne     reg2_error_loop                                                                         \n"\r
624                 "       cmp r3, #3                                                                                              \n"\r
625                 "       bne     reg2_error_loop                                                                         \n"\r
626                 "       cmp     r4, #4                                                                                          \n"\r
627                 "       bne     reg2_error_loop                                                                         \n"\r
628                 "       cmp     r5, #5                                                                                          \n"\r
629                 "       bne     reg2_error_loop                                                                         \n"\r
630                 "       cmp     r6, #6                                                                                          \n"\r
631                 "       bne     reg2_error_loop                                                                         \n"\r
632                 "       cmp     r7, #7                                                                                          \n"\r
633                 "       bne     reg2_error_loop                                                                         \n"\r
634                 "       cmp     r8, #8                                                                                          \n"\r
635                 "       bne     reg2_error_loop                                                                         \n"\r
636                 "       cmp     r9, #9                                                                                          \n"\r
637                 "       bne     reg2_error_loop                                                                         \n"\r
638                 "       cmp     r10, #10                                                                                        \n"\r
639                 "       bne     reg2_error_loop                                                                         \n"\r
640                 "       cmp     r11, #11                                                                                        \n"\r
641                 "       bne     reg2_error_loop                                                                         \n"\r
642                 "       cmp     r12, #12                                                                                        \n"\r
643                 "       bne     reg2_error_loop                                                                         \n"\r
644                 "                                                                                                                       \n"\r
645                 "       /* Increment the loop counter to indicate this test is still functioning\n"\r
646                 "       correctly. */                                                                                   \n"\r
647                 "       push { r0-r1 }                                                                                  \n"\r
648                 "       ldr     r0, =ulRegTest2LoopCounter                                                      \n"\r
649                 "       ldr r1, [r0]                                                                                    \n"\r
650                 "       adds r1, r1, #1                                                                                 \n"\r
651                 "       str r1, [r0]                                                                                    \n"\r
652                 "                                                                                                                       \n"\r
653                 "       /* Yield to increase test coverage. */                                  \n"\r
654                 "       movs r0, #0x01                                                                                  \n"\r
655                 "       ldr r1, =0xe000ed04                                                                     \n" /*NVIC_INT_CTRL */\r
656                 "       lsl r0, #28                                                                                     \n" /* Shift to PendSV bit */\r
657                 "       str r0, [r1]                                                                                    \n"\r
658                 "       dsb                                                                                                             \n"\r
659                 "       pop { r0-r1 }                                                                                   \n"\r
660                 "                                                                                                                       \n"\r
661                 "       /* Start again. */                                                                              \n"\r
662                 "       b reg2_loop                                                                                             \n"\r
663                 "                                                                                                                       \n"\r
664                 "reg2_error_loop:                                                                                       \n"\r
665                 "       /* If this line is hit then there was an error in a core register value.\n"\r
666                 "       This loop ensures the loop counter variable stops incrementing. */\n"\r
667                 "       b reg2_error_loop                                                                               \n"\r
668                 "       nop                                                                                                             \n"\r
669         );\r
670 }\r