2 * -------------------------------------------
3 * MSP432 DriverLib - v01_04_00_18
4 * -------------------------------------------
6 * --COPYRIGHT--,BSD,BSD
7 * Copyright (c) 2015, Texas Instruments Incorporated
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
14 * * Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
17 * * Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * * Neither the name of Texas Instruments Incorporated nor the names of
22 * its contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
32 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
34 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
35 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <interrupt.h>
41 void I2C_initMaster(uint32_t moduleInstance, const eUSCI_I2C_MasterConfig *config)
43 uint16_t preScalarValue;
46 (EUSCI_B_I2C_CLOCKSOURCE_ACLK == config->selectClockSource)
47 || (EUSCI_B_I2C_CLOCKSOURCE_SMCLK
48 == config->selectClockSource));
51 (EUSCI_B_I2C_SET_DATA_RATE_400KBPS == config->dataRate)
52 || (EUSCI_B_I2C_SET_DATA_RATE_100KBPS == config->dataRate));
55 (EUSCI_B_I2C_NO_AUTO_STOP == config->autoSTOPGeneration)
56 || (EUSCI_B_I2C_SET_BYTECOUNT_THRESHOLD_FLAG
57 == config->autoSTOPGeneration)
58 || (EUSCI_B_I2C_SEND_STOP_AUTOMATICALLY_ON_BYTECOUNT_THRESHOLD
59 == config->autoSTOPGeneration));
61 /* Disable the USCI module and clears the other bits of control register */
62 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCSWRST_OFS) = 1;
64 /* Configure Automatic STOP condition generation */
65 EUSCI_B_CMSIS(moduleInstance)->rCTLW1.r =
66 (EUSCI_B_CMSIS(moduleInstance)->rCTLW1.r & ~UCASTP_M)
67 | (config->autoSTOPGeneration);
69 /* Byte Count Threshold */
70 EUSCI_B_CMSIS(moduleInstance)->rTBCNT.r = config->byteCounterThreshold;
73 * Configure as I2C master mode.
76 * UCSYNC = Synchronous mode
78 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r =
79 (EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r & ~UCSSEL_M)
80 | (config->selectClockSource | UCMST | UCMODE_3 | UCSYNC
84 * Compute the clock divider that achieves the fastest speed less than or
85 * equal to the desired speed. The numerator is biased to favor a larger
86 * clock divider so that the resulting clock is always less than or equal
87 * to the desired clock, never greater.
89 preScalarValue = (uint16_t) (config->i2cClk / config->dataRate);
91 EUSCI_B_CMSIS(moduleInstance)->rBRW = preScalarValue;
94 void I2C_initSlave(uint32_t moduleInstance, uint_fast16_t slaveAddress,
95 uint_fast8_t slaveAddressOffset, uint32_t slaveOwnAddressEnable)
98 (EUSCI_B_I2C_OWN_ADDRESS_OFFSET0 == slaveAddressOffset)
99 || (EUSCI_B_I2C_OWN_ADDRESS_OFFSET1 == slaveAddressOffset)
100 || (EUSCI_B_I2C_OWN_ADDRESS_OFFSET2 == slaveAddressOffset)
101 || (EUSCI_B_I2C_OWN_ADDRESS_OFFSET3 == slaveAddressOffset));
103 /* Disable the USCI module */
104 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCSWRST_OFS) = 1;
106 /* Clear USCI master mode */
107 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r =
108 (EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r & (~UCMST))
109 | (UCMODE_3 + UCSYNC);
111 /* Set up the slave address. */
112 HWREG16(moduleInstance + OFS_UCB0I2COA0 + slaveAddressOffset) = slaveAddress
113 + slaveOwnAddressEnable;
116 void I2C_enableModule(uint32_t moduleInstance)
118 /* Reset the UCSWRST bit to enable the USCI Module */
119 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCSWRST_OFS) = 0;
122 void I2C_disableModule(uint32_t moduleInstance)
124 /* Set the UCSWRST bit to disable the USCI Module */
125 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCSWRST_OFS) = 1;
129 void I2C_setSlaveAddress(uint32_t moduleInstance, uint_fast16_t slaveAddress)
131 /* Set the address of the slave with which the master will communicate */
132 EUSCI_B_CMSIS(moduleInstance)->rI2CSA.r = (slaveAddress);
135 void I2C_setMode(uint32_t moduleInstance, uint_fast8_t mode)
138 (EUSCI_B_I2C_TRANSMIT_MODE == mode)
139 || (EUSCI_B_I2C_RECEIVE_MODE == mode));
141 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r =
142 (EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r
143 & (~EUSCI_B_I2C_TRANSMIT_MODE)) | mode;
147 uint8_t I2C_masterReceiveSingleByte(uint32_t moduleInstance)
149 //Set USCI in Receive mode
150 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTR_OFS) = 0;
153 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r |= (UCTXSTT + UCTXSTP);
155 //Poll for receive interrupt flag.
156 while (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCRXIFG_OFS))
159 //Send single byte data.
160 return EUSCI_B_CMSIS(moduleInstance)->rRXBUF.b.bRXBUF;
163 void I2C_slavePutData(uint32_t moduleInstance, uint8_t transmitData)
165 //Send single byte data.
166 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = transmitData;
169 uint8_t I2C_slaveGetData(uint32_t moduleInstance)
172 return EUSCI_B_CMSIS(moduleInstance)->rRXBUF.b.bRXBUF;
175 uint8_t I2C_isBusBusy(uint32_t moduleInstance)
177 //Return the bus busy status.
178 return EUSCI_B_CMSIS(moduleInstance)->rSTATW.b.bBBUSY;
181 void I2C_masterSendSingleByte(uint32_t moduleInstance, uint8_t txData)
183 //Store current TXIE status
184 uint16_t txieStatus = EUSCI_B_CMSIS(moduleInstance)->rIE.r & UCTXIE;
186 //Disable transmit interrupt enable
187 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r,UCTXIE_OFS) = 0;
189 //Send start condition.
190 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r |= UCTR + UCTXSTT;
192 //Poll for transmit interrupt flag.
193 while (!(EUSCI_B_CMSIS(moduleInstance)->rIFG.r & UCTXIFG))
196 //Send single byte data.
197 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
199 //Poll for transmit interrupt flag.
200 while (!(EUSCI_B_CMSIS(moduleInstance)->rIFG.r & UCTXIFG))
203 //Send stop condition.
204 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r |= UCTXSTP;
206 //Clear transmit interrupt flag before enabling interrupt again
207 EUSCI_B_CMSIS(moduleInstance)->rIFG.r &= ~(UCTXIFG);
209 //Reinstate transmit interrupt enable
210 EUSCI_B_CMSIS(moduleInstance)->rIE.r |= txieStatus;
213 bool I2C_masterSendSingleByteWithTimeout(uint32_t moduleInstance,
214 uint8_t txData, uint32_t timeout)
217 uint32_t timeout2 = timeout;
221 //Store current TXIE status
222 txieStatus = EUSCI_B_CMSIS(moduleInstance)->rIE.r & UCTXIE;
224 //Disable transmit interrupt enable
225 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r,UCTXIE_OFS) = 0;
227 //Send start condition.
228 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r |= UCTR + UCTXSTT;
230 //Poll for transmit interrupt flag.
231 while ((!(EUSCI_B_CMSIS(moduleInstance)->rIFG.r & UCTXIFG)) && --timeout)
234 //Check if transfer timed out
238 //Send single byte data.
239 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
241 //Poll for transmit interrupt flag.
242 while ((!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
246 //Check if transfer timed out
250 //Send stop condition.
251 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
253 //Clear transmit interrupt flag before enabling interrupt again
254 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r,UCTXIFG_OFS) = 0;
256 //Reinstate transmit interrupt enable
257 EUSCI_B_CMSIS(moduleInstance)->rIE.r |= txieStatus;
262 void I2C_masterSendMultiByteStart(uint32_t moduleInstance, uint8_t txData)
264 //Store current transmit interrupt enable
265 uint16_t txieStatus = EUSCI_B_CMSIS(moduleInstance)->rIE.r & UCTXIE;
267 //Disable transmit interrupt enable
268 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCTXIE_OFS) = 0;
270 //Send start condition.
271 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r |= UCTR + UCTXSTT;
273 //Poll for transmit interrupt flag.
274 while (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
277 //Send single byte data.
278 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
280 //Reinstate transmit interrupt enable
281 EUSCI_B_CMSIS(moduleInstance)->rIE.r |= txieStatus;
284 bool I2C_masterSendMultiByteStartWithTimeout(uint32_t moduleInstance,
285 uint8_t txData, uint32_t timeout)
291 //Store current transmit interrupt enable
292 txieStatus = EUSCI_B_CMSIS(moduleInstance)->rIE.r & UCTXIE;
294 //Disable transmit interrupt enable
295 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r,UCTXIE_OFS) = 0;
297 //Send start condition.
298 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r |= UCTR + UCTXSTT;
300 //Poll for transmit interrupt flag.
301 while ((!(BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
305 //Check if transfer timed out
309 //Send single byte data.
310 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
312 //Reinstate transmit interrupt enable
313 EUSCI_B_CMSIS(moduleInstance)->rIE.r |= txieStatus;
318 void I2C_masterSendMultiByteNext(uint32_t moduleInstance, uint8_t txData)
320 //If interrupts are not used, poll for flags
321 if (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCTXIE_OFS))
323 //Poll for transmit interrupt flag.
325 (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
329 //Send single byte data.
330 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
333 bool I2C_masterSendMultiByteNextWithTimeout(uint32_t moduleInstance,
334 uint8_t txData, uint32_t timeout)
338 //If interrupts are not used, poll for flags
339 if (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCTXIE_OFS))
341 //Poll for transmit interrupt flag.
342 while ((!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r,
343 UCTXIFG_OFS)) && --timeout)
346 //Check if transfer timed out
351 //Send single byte data.
352 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
357 void I2C_masterSendMultiByteFinish(uint32_t moduleInstance, uint8_t txData)
359 //If interrupts are not used, poll for flags
360 if (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCTXIE_OFS))
362 //Poll for transmit interrupt flag.
364 (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
368 //Send single byte data.
369 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
371 //Poll for transmit interrupt flag.
372 while (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
375 //Send stop condition.
376 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
379 bool I2C_masterSendMultiByteFinishWithTimeout(uint32_t moduleInstance,
380 uint8_t txData, uint32_t timeout)
382 uint32_t timeout2 = timeout;
386 //If interrupts are not used, poll for flags
387 if (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCTXIE_OFS))
389 //Poll for transmit interrupt flag.
390 while ((!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r,
391 UCTXIFG_OFS)) && --timeout)
394 //Check if transfer timed out
399 //Send single byte data.
400 EUSCI_B_CMSIS(moduleInstance)->rTXBUF.r = txData;
402 //Poll for transmit interrupt flag.
403 while ((!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
407 //Check if transfer timed out
411 //Send stop condition.
412 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
417 void I2C_masterSendMultiByteStop(uint32_t moduleInstance)
419 //If interrupts are not used, poll for flags
420 if (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCTXIE_OFS))
422 //Poll for transmit interrupt flag.
424 (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCTXIFG_OFS))
428 //Send stop condition.
429 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
432 bool I2C_masterSendMultiByteStopWithTimeout(uint32_t moduleInstance,
437 //If interrupts are not used, poll for flags
438 if (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCTXIE_OFS))
440 //Poll for transmit interrupt flag.
441 while ((!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r,
442 UCTXIFG_OFS)) && --timeout)
445 //Check if transfer timed out
450 //Send stop condition.
451 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
456 void I2C_masterReceiveStart(uint32_t moduleInstance)
458 //Set USCI in Receive mode
459 EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r =
460 (EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r & (~UCTR)) | UCTXSTT;
463 uint8_t I2C_masterReceiveMultiByteNext(uint32_t moduleInstance)
465 return EUSCI_B_CMSIS(moduleInstance)->rRXBUF.a.bRXBUF;
468 uint8_t I2C_masterReceiveMultiByteFinish(uint32_t moduleInstance)
470 //Send stop condition.
471 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
473 //Wait for Stop to finish
474 while (BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r, UCTXSTP_OFS))
476 // Wait for RX buffer
477 while (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG, UCRXIFG_OFS))
481 /* Capture data from receive buffer after setting stop bit due to
482 MSP430 I2C critical timing. */
483 return EUSCI_B_CMSIS(moduleInstance)->rRXBUF.b.bRXBUF;
486 bool I2C_masterReceiveMultiByteFinishWithTimeout(uint32_t moduleInstance,
487 uint8_t *txData, uint32_t timeout)
489 uint32_t timeout2 = timeout;
493 //Send stop condition.
494 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
496 //Wait for Stop to finish
497 while (BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r, UCTXSTP_OFS)
501 //Check if transfer timed out
505 // Wait for RX buffer
506 while ((!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r, UCRXIFG_OFS))
510 //Check if transfer timed out
514 //Capture data from receive buffer after setting stop bit due to
515 //MSP430 I2C critical timing.
516 *txData = (EUSCI_B_CMSIS(moduleInstance)->rRXBUF.b.bRXBUF);
521 void I2C_masterReceiveMultiByteStop(uint32_t moduleInstance)
523 //Send stop condition.
524 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTP_OFS) = 1;
527 uint8_t I2C_masterReceiveSingle(uint32_t moduleInstance)
529 //Polling RXIFG0 if RXIE is not enabled
530 if (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIE.r, UCRXIE0_OFS))
532 while (!BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rIFG.r,
538 return EUSCI_B_CMSIS(moduleInstance)->rRXBUF.b.bRXBUF;
541 uint32_t I2C_getReceiveBufferAddressForDMA(uint32_t moduleInstance)
543 return moduleInstance + OFS_UCB0RXBUF;
546 uint32_t I2C_getTransmitBufferAddressForDMA(uint32_t moduleInstance)
548 return moduleInstance + OFS_UCB0TXBUF;
551 uint8_t I2C_masterIsStopSent(uint32_t moduleInstance)
553 return BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r, UCTXSTP_OFS);
556 bool I2C_masterIsStartSent(uint32_t moduleInstance)
558 return BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r, UCTXSTT_OFS);
561 void I2C_masterSendStart(uint32_t moduleInstance)
563 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCTXSTT_OFS) = 1;
566 void I2C_enableMultiMasterMode(uint32_t moduleInstance)
568 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCSWRST_OFS) = 1;
569 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCMM_OFS) = 1;
572 void I2C_disableMultiMasterMode(uint32_t moduleInstance)
574 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCSWRST_OFS) = 1;
575 BITBAND_PERI(EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r,UCMM_OFS) = 0;
578 void I2C_enableInterrupt(uint32_t moduleInstance, uint_fast16_t mask)
583 & ~(EUSCI_B_I2C_STOP_INTERRUPT
584 + EUSCI_B_I2C_START_INTERRUPT
585 + EUSCI_B_I2C_NAK_INTERRUPT
586 + EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT
587 + EUSCI_B_I2C_BIT9_POSITION_INTERRUPT
588 + EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT
589 + EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT
590 + EUSCI_B_I2C_TRANSMIT_INTERRUPT0
591 + EUSCI_B_I2C_TRANSMIT_INTERRUPT1
592 + EUSCI_B_I2C_TRANSMIT_INTERRUPT2
593 + EUSCI_B_I2C_TRANSMIT_INTERRUPT3
594 + EUSCI_B_I2C_RECEIVE_INTERRUPT0
595 + EUSCI_B_I2C_RECEIVE_INTERRUPT1
596 + EUSCI_B_I2C_RECEIVE_INTERRUPT2
597 + EUSCI_B_I2C_RECEIVE_INTERRUPT3)));
599 //Enable the interrupt masked bit
600 EUSCI_B_CMSIS(moduleInstance)->rIE.r |= mask;
603 void I2C_disableInterrupt(uint32_t moduleInstance, uint_fast16_t mask)
608 & ~(EUSCI_B_I2C_STOP_INTERRUPT
609 + EUSCI_B_I2C_START_INTERRUPT
610 + EUSCI_B_I2C_NAK_INTERRUPT
611 + EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT
612 + EUSCI_B_I2C_BIT9_POSITION_INTERRUPT
613 + EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT
614 + EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT
615 + EUSCI_B_I2C_TRANSMIT_INTERRUPT0
616 + EUSCI_B_I2C_TRANSMIT_INTERRUPT1
617 + EUSCI_B_I2C_TRANSMIT_INTERRUPT2
618 + EUSCI_B_I2C_TRANSMIT_INTERRUPT3
619 + EUSCI_B_I2C_RECEIVE_INTERRUPT0
620 + EUSCI_B_I2C_RECEIVE_INTERRUPT1
621 + EUSCI_B_I2C_RECEIVE_INTERRUPT2
622 + EUSCI_B_I2C_RECEIVE_INTERRUPT3)));
624 //Disable the interrupt masked bit
625 EUSCI_B_CMSIS(moduleInstance)->rIE.r &= ~(mask);
628 void I2C_clearInterruptFlag(uint32_t moduleInstance, uint_fast16_t mask)
633 & ~(EUSCI_B_I2C_STOP_INTERRUPT
634 + EUSCI_B_I2C_START_INTERRUPT
635 + EUSCI_B_I2C_NAK_INTERRUPT
636 + EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT
637 + EUSCI_B_I2C_BIT9_POSITION_INTERRUPT
638 + EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT
639 + EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT
640 + EUSCI_B_I2C_TRANSMIT_INTERRUPT0
641 + EUSCI_B_I2C_TRANSMIT_INTERRUPT1
642 + EUSCI_B_I2C_TRANSMIT_INTERRUPT2
643 + EUSCI_B_I2C_TRANSMIT_INTERRUPT3
644 + EUSCI_B_I2C_RECEIVE_INTERRUPT0
645 + EUSCI_B_I2C_RECEIVE_INTERRUPT1
646 + EUSCI_B_I2C_RECEIVE_INTERRUPT2
647 + EUSCI_B_I2C_RECEIVE_INTERRUPT3)));
648 //Clear the I2C interrupt source.
649 EUSCI_B_CMSIS(moduleInstance)->rIFG.r &= ~(mask);
652 uint_fast16_t I2C_getInterruptStatus(uint32_t moduleInstance, uint16_t mask)
657 & ~(EUSCI_B_I2C_STOP_INTERRUPT
658 + EUSCI_B_I2C_START_INTERRUPT
659 + EUSCI_B_I2C_NAK_INTERRUPT
660 + EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT
661 + EUSCI_B_I2C_BIT9_POSITION_INTERRUPT
662 + EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT
663 + EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT
664 + EUSCI_B_I2C_TRANSMIT_INTERRUPT0
665 + EUSCI_B_I2C_TRANSMIT_INTERRUPT1
666 + EUSCI_B_I2C_TRANSMIT_INTERRUPT2
667 + EUSCI_B_I2C_TRANSMIT_INTERRUPT3
668 + EUSCI_B_I2C_RECEIVE_INTERRUPT0
669 + EUSCI_B_I2C_RECEIVE_INTERRUPT1
670 + EUSCI_B_I2C_RECEIVE_INTERRUPT2
671 + EUSCI_B_I2C_RECEIVE_INTERRUPT3)));
672 //Return the interrupt status of the request masked bit.
673 return EUSCI_B_CMSIS(moduleInstance)->rIFG.r & mask;
676 uint_fast16_t I2C_getEnabledInterruptStatus(uint32_t moduleInstance)
678 return I2C_getInterruptStatus(moduleInstance,
679 EUSCI_B_CMSIS(moduleInstance)->rIE.r);
682 uint_fast16_t I2C_getMode(uint32_t moduleInstance)
685 return (EUSCI_B_CMSIS(moduleInstance)->rCTLW0.r & UCTR);
688 void I2C_registerInterrupt(uint32_t moduleInstance, void (*intHandler)(void))
690 switch (moduleInstance)
692 case EUSCI_B0_MODULE:
693 Interrupt_registerInterrupt(INT_EUSCIB0, intHandler);
694 Interrupt_enableInterrupt(INT_EUSCIB0);
696 case EUSCI_B1_MODULE:
697 Interrupt_registerInterrupt(INT_EUSCIB1, intHandler);
698 Interrupt_enableInterrupt(INT_EUSCIB1);
700 #ifdef EUSCI_B2_MODULE
701 case EUSCI_B2_MODULE:
702 Interrupt_registerInterrupt(INT_EUSCIB2, intHandler);
703 Interrupt_enableInterrupt(INT_EUSCIB2);
706 #ifdef EUSCI_B3_MODULE
707 case EUSCI_B3_MODULE:
708 Interrupt_registerInterrupt(INT_EUSCIB3, intHandler);
709 Interrupt_enableInterrupt(INT_EUSCIB3);
717 void I2C_unregisterInterrupt(uint32_t moduleInstance)
719 switch (moduleInstance)
721 case EUSCI_B0_MODULE:
722 Interrupt_disableInterrupt(INT_EUSCIB0);
723 Interrupt_unregisterInterrupt(INT_EUSCIB0);
725 case EUSCI_B1_MODULE:
726 Interrupt_disableInterrupt(INT_EUSCIB1);
727 Interrupt_unregisterInterrupt(INT_EUSCIB1);
729 #ifdef EUSCI_B2_MODULE
730 case EUSCI_B2_MODULE:
731 Interrupt_disableInterrupt(INT_EUSCIB2);
732 Interrupt_unregisterInterrupt(INT_EUSCIB2);
735 #ifdef EUSCI_B3_MODULE
736 case EUSCI_B3_MODULE:
737 Interrupt_disableInterrupt(INT_EUSCIB3);
738 Interrupt_unregisterInterrupt(INT_EUSCIB3);