2 * -------------------------------------------
3 * CC3220 SDK - v0.10.00.00
4 * -------------------------------------------
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37 //*****************************************************************************
41 // Defines and Macros for the AES module.
43 //*****************************************************************************
45 #ifndef __DRIVERLIB_AES_H__
46 #define __DRIVERLIB_AES_H__
48 //*****************************************************************************
50 // If building with a C++ compiler, make all of the definitions in this header
53 //*****************************************************************************
59 //*****************************************************************************
61 // The following defines are used to specify the operation direction in the
62 // ui32Config argument in the AESConfig function. Only one is permitted.
64 //*****************************************************************************
65 #define AES_CFG_DIR_ENCRYPT 0x00000004
66 #define AES_CFG_DIR_DECRYPT 0x00000000
68 //*****************************************************************************
70 // The following defines are used to specify the key size in the ui32Config
71 // argument in the AESConfig function. Only one is permitted.
73 //*****************************************************************************
74 #define AES_CFG_KEY_SIZE_128BIT 0x00000008
75 #define AES_CFG_KEY_SIZE_192BIT 0x00000010
76 #define AES_CFG_KEY_SIZE_256BIT 0x00000018
78 //*****************************************************************************
80 // The following defines are used to specify the mode of operation in the
81 // ui32Config argument in the AESConfig function. Only one is permitted.
83 //*****************************************************************************
84 #define AES_CFG_MODE_M 0x2007fe60
85 #define AES_CFG_MODE_ECB 0x00000000
86 #define AES_CFG_MODE_CBC 0x00000020
87 #define AES_CFG_MODE_CTR 0x00000040
88 #define AES_CFG_MODE_ICM 0x00000200
89 #define AES_CFG_MODE_CFB 0x00000400
90 #define AES_CFG_MODE_XTS_TWEAKJL \
92 #define AES_CFG_MODE_XTS_K2IJL \
94 #define AES_CFG_MODE_XTS_K2ILJ0 \
96 #define AES_CFG_MODE_F8 0x00002000
97 #define AES_CFG_MODE_F9 0x20004000
98 #define AES_CFG_MODE_CBCMAC 0x20008000
99 #define AES_CFG_MODE_GCM_HLY0ZERO \
101 #define AES_CFG_MODE_GCM_HLY0CALC \
103 #define AES_CFG_MODE_GCM_HY0CALC \
105 #define AES_CFG_MODE_CCM 0x20040040
107 //*****************************************************************************
109 // The following defines are used to specify the counter width in the
110 // ui32Config argument in the AESConfig function. It is only required to
111 // be defined when using CTR, CCM, or GCM modes. Only one length is permitted.
113 //*****************************************************************************
114 #define AES_CFG_CTR_WIDTH_32 0x00000000
115 #define AES_CFG_CTR_WIDTH_64 0x00000080
116 #define AES_CFG_CTR_WIDTH_96 0x00000100
117 #define AES_CFG_CTR_WIDTH_128 0x00000180
119 //*****************************************************************************
121 // The following defines are used to define the width of the length field for
122 // CCM operation through the ui32Config argument in the AESConfig function.
123 // This value is also known as L. Only one is permitted.
125 //*****************************************************************************
126 #define AES_CFG_CCM_L_2 0x00080000
127 #define AES_CFG_CCM_L_4 0x00180000
128 #define AES_CFG_CCM_L_8 0x00380000
130 //*****************************************************************************
132 // The following defines are used to define the length of the authentication
133 // field for CCM operations through the ui32Config argument in the AESConfig
134 // function. This value is also known as M. Only one is permitted.
136 //*****************************************************************************
137 #define AES_CFG_CCM_M_4 0x00400000
138 #define AES_CFG_CCM_M_6 0x00800000
139 #define AES_CFG_CCM_M_8 0x00c00000
140 #define AES_CFG_CCM_M_10 0x01000000
141 #define AES_CFG_CCM_M_12 0x01400000
142 #define AES_CFG_CCM_M_14 0x01800000
143 #define AES_CFG_CCM_M_16 0x01c00000
145 //*****************************************************************************
147 // Interrupt flags for use with the AESIntEnable, AESIntDisable, and
148 // AESIntStatus functions.
150 //*****************************************************************************
151 #define AES_INT_CONTEXT_IN 0x00000001
152 #define AES_INT_CONTEXT_OUT 0x00000008
153 #define AES_INT_DATA_IN 0x00000002
154 #define AES_INT_DATA_OUT 0x00000004
155 #define AES_INT_DMA_CONTEXT_IN 0x00010000
156 #define AES_INT_DMA_CONTEXT_OUT 0x00020000
157 #define AES_INT_DMA_DATA_IN 0x00040000
158 #define AES_INT_DMA_DATA_OUT 0x00080000
160 //*****************************************************************************
162 // Defines used when enabling and disabling DMA requests in the
163 // AESEnableDMA and AESDisableDMA functions.
165 //*****************************************************************************
166 #define AES_DMA_DATA_IN 0x00000040
167 #define AES_DMA_DATA_OUT 0x00000020
168 #define AES_DMA_CONTEXT_IN 0x00000080
169 #define AES_DMA_CONTEXT_OUT 0x00000100
171 //*****************************************************************************
173 // Function prototypes.
175 //*****************************************************************************
176 extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
177 extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key,
178 uint32_t ui32Keysize);
179 extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key,
180 uint32_t ui32Keysize);
181 extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key);
182 extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
183 extern void AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata);
184 extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData);
185 extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length);
186 extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
187 extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
189 extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
191 extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
193 extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
195 extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
197 uint32_t ui32Length);
198 extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src,
201 extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src,
202 uint8_t *pui8Dest, uint32_t ui32Length,
203 uint8_t *pui8AuthSrc, uint32_t ui32AuthLength,
205 extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
206 extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
207 extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
208 extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
209 extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
210 extern void AESIntUnregister(uint32_t ui32Base);
211 extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
212 extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
214 //*****************************************************************************
216 // Mark the end of the C bindings section for C++ compilers.
218 //*****************************************************************************
223 #endif // __DRIVERLIB_AES_H__