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   1 /*
   2  * -------------------------------------------
   3  *    CC3220 SDK - v0.10.00.00
   4  * -------------------------------------------
   5  *
   6  *  Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
   7  *
   8  *  Redistribution and use in source and binary forms, with or without
   9  *  modification, are permitted provided that the following conditions
  10  *  are met:
  11  *
  12  *    Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  *
  15  *    Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the
  18  *    distribution.
  19  *
  20  *    Neither the name of Texas Instruments Incorporated nor the names of
  21  *    its contributors may be used to endorse or promote products derived
  22  *    from this software without specific prior written permission.
  23  *
  24  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35  *
  36  */
  37 //*****************************************************************************
  38 //
  39 //  i2c.h
  40 //
  41 //  Prototypes for the I2C Driver.
  42 //
  43 //*****************************************************************************
  44
  45 #ifndef __DRIVERLIB_I2C_H__
  46 #define __DRIVERLIB_I2C_H__
  47
  48 //*****************************************************************************
  49 //
  50 // If building with a C++ compiler, make all of the definitions in this header
  51 // have a C binding.
  52 //
  53 //*****************************************************************************
  54 #ifdef __cplusplus
  55 extern "C"
  56 {
  57 #endif
  58
  59 //*****************************************************************************
  60 //
  61 // Defines for the API.
  62 //
  63 //*****************************************************************************
  64
  65 //*****************************************************************************
  66 //
  67 // Interrupt defines.
  68 //
  69 //*****************************************************************************
  70 #define I2C_INT_MASTER          0x00000001
  71 #define I2C_INT_SLAVE           0x00000002
  72
  73 //*****************************************************************************
  74 //
  75 // I2C Master commands.
  76 //
  77 //*****************************************************************************
  78 #define I2C_MASTER_CMD_SINGLE_SEND                                            \
  79                                 0x00000007
  80 #define I2C_MASTER_CMD_SINGLE_RECEIVE                                         \
  81                                 0x00000007
  82 #define I2C_MASTER_CMD_BURST_SEND_START                                       \
  83                                 0x00000003
  84 #define I2C_MASTER_CMD_BURST_SEND_CONT                                        \
  85                                 0x00000001
  86 #define I2C_MASTER_CMD_BURST_SEND_FINISH                                      \
  87                                 0x00000005
  88 #define I2C_MASTER_CMD_BURST_SEND_STOP                                        \
  89                                 0x00000004
  90 #define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP                                  \
  91                                 0x00000004
  92 #define I2C_MASTER_CMD_BURST_RECEIVE_START                                    \
  93                                 0x0000000b
  94 #define I2C_MASTER_CMD_BURST_RECEIVE_CONT                                     \
  95                                 0x00000009
  96 #define I2C_MASTER_CMD_BURST_RECEIVE_FINISH                                   \
  97                                 0x00000005
  98 #define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP                               \
  99                                 0x00000004
 100 #define I2C_MASTER_CMD_QUICK_COMMAND                                          \
 101                                 0x00000027
 102 #define I2C_MASTER_CMD_HS_MASTER_CODE_SEND                                    \
 103                                 0x00000013
 104 #define I2C_MASTER_CMD_FIFO_SINGLE_SEND                                       \
 105                                 0x00000046
 106 #define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE                                    \
 107                                 0x00000046
 108 #define I2C_MASTER_CMD_FIFO_BURST_SEND_START                                  \
 109                                 0x00000042
 110 #define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT                                   \
 111                                 0x00000040
 112 #define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH                                 \
 113                                 0x00000044
 114 #define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP                             \
 115                                 0x00000004
 116 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START                               \
 117                                 0x0000004a
 118 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT                                \
 119                                 0x00000048
 120 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH                              \
 121                                 0x00000044
 122 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP                          \
 123                                 0x00000004
 124
 125 //*****************************************************************************
 126 //
 127 // I2C Master glitch filter configuration.
 128 //
 129 //*****************************************************************************
 130 #define I2C_MASTER_GLITCH_FILTER_DISABLED                                     \
 131                                 0
 132 #define I2C_MASTER_GLITCH_FILTER_1                                            \
 133                                 0x00010000
 134 #define I2C_MASTER_GLITCH_FILTER_2                                            \
 135                                 0x00020000
 136 #define I2C_MASTER_GLITCH_FILTER_3                                            \
 137                                 0x00030000
 138 #define I2C_MASTER_GLITCH_FILTER_4                                            \
 139                                 0x00040000
 140 #define I2C_MASTER_GLITCH_FILTER_8                                            \
 141                                 0x00050000
 142 #define I2C_MASTER_GLITCH_FILTER_16                                           \
 143                                 0x00060000
 144 #define I2C_MASTER_GLITCH_FILTER_32                                           \
 145                                 0x00070000
 146
 147 //*****************************************************************************
 148 //
 149 // I2C Master error status.
 150 //
 151 //*****************************************************************************
 152 #define I2C_MASTER_ERR_NONE     0
 153 #define I2C_MASTER_ERR_ADDR_ACK 0x00000004
 154 #define I2C_MASTER_ERR_DATA_ACK 0x00000008
 155 #define I2C_MASTER_ERR_ARB_LOST 0x00000010
 156 #define I2C_MASTER_ERR_CLK_TOUT 0x00000080
 157
 158 //*****************************************************************************
 159 //
 160 // I2C Slave action requests
 161 //
 162 //*****************************************************************************
 163 #define I2C_SLAVE_ACT_NONE      0
 164 #define I2C_SLAVE_ACT_RREQ      0x00000001  // Master has sent data
 165 #define I2C_SLAVE_ACT_TREQ      0x00000002  // Master has requested data
 166 #define I2C_SLAVE_ACT_RREQ_FBR  0x00000005  // Master has sent first byte
 167 #define I2C_SLAVE_ACT_OWN2SEL   0x00000008  // Master requested secondary slave
 168 #define I2C_SLAVE_ACT_QCMD      0x00000010  // Master has sent a Quick Command
 169 #define I2C_SLAVE_ACT_QCMD_DATA 0x00000020  // Master Quick Command value
 170
 171 //*****************************************************************************
 172 //
 173 // Miscellaneous I2C driver definitions.
 174 //
 175 //*****************************************************************************
 176 #define I2C_MASTER_MAX_RETRIES  1000        // Number of retries
 177
 178 //*****************************************************************************
 179 //
 180 // I2C Master interrupts.
 181 //
 182 //*****************************************************************************
 183 #define I2C_MASTER_INT_RX_FIFO_FULL                                           \
 184                                 0x00000800  // RX FIFO Full Interrupt
 185 #define I2C_MASTER_INT_TX_FIFO_EMPTY                                          \
 186                                 0x00000400  // TX FIFO Empty Interrupt
 187 #define I2C_MASTER_INT_RX_FIFO_REQ                                            \
 188                                 0x00000200  // RX FIFO Request Interrupt
 189 #define I2C_MASTER_INT_TX_FIFO_REQ                                            \
 190                                 0x00000100  // TX FIFO Request Interrupt
 191 #define I2C_MASTER_INT_ARB_LOST                                               \
 192                                 0x00000080  // Arb Lost Interrupt
 193 #define I2C_MASTER_INT_STOP     0x00000040  // Stop Condition Interrupt
 194 #define I2C_MASTER_INT_START    0x00000020  // Start Condition Interrupt
 195 #define I2C_MASTER_INT_NACK     0x00000010  // Addr/Data NACK Interrupt
 196 #define I2C_MASTER_INT_TX_DMA_DONE                                            \
 197                                 0x00000008  // TX DMA Complete Interrupt
 198 #define I2C_MASTER_INT_RX_DMA_DONE                                            \
 199                                 0x00000004  // RX DMA Complete Interrupt
 200 #define I2C_MASTER_INT_TIMEOUT  0x00000002  // Clock Timeout Interrupt
 201 #define I2C_MASTER_INT_DATA     0x00000001  // Data Interrupt
 202
 203 //*****************************************************************************
 204 //
 205 // I2C Slave interrupts.
 206 //
 207 //*****************************************************************************
 208 #define I2C_SLAVE_INT_RX_FIFO_FULL                                            \
 209                                 0x00000100  // RX FIFO Full Interrupt
 210 #define I2C_SLAVE_INT_TX_FIFO_EMPTY                                           \
 211                                 0x00000080  // TX FIFO Empty Interrupt
 212 #define I2C_SLAVE_INT_RX_FIFO_REQ                                             \
 213                                 0x00000040  // RX FIFO Request Interrupt
 214 #define I2C_SLAVE_INT_TX_FIFO_REQ                                             \
 215                                 0x00000020  // TX FIFO Request Interrupt
 216 #define I2C_SLAVE_INT_TX_DMA_DONE                                             \
 217                                 0x00000010  // TX DMA Complete Interrupt
 218 #define I2C_SLAVE_INT_RX_DMA_DONE                                             \
 219                                 0x00000008  // RX DMA Complete Interrupt
 220 #define I2C_SLAVE_INT_STOP      0x00000004  // Stop Condition Interrupt
 221 #define I2C_SLAVE_INT_START     0x00000002  // Start Condition Interrupt
 222 #define I2C_SLAVE_INT_DATA      0x00000001  // Data Interrupt
 223
 224 //*****************************************************************************
 225 //
 226 // I2C Slave FIFO configuration macros.
 227 //
 228 //*****************************************************************************
 229 #define I2C_SLAVE_TX_FIFO_ENABLE                                              \
 230                                 0x00000002
 231 #define I2C_SLAVE_RX_FIFO_ENABLE                                              \
 232                                 0x00000004
 233
 234 //*****************************************************************************
 235 //
 236 // I2C FIFO configuration macros.
 237 //
 238 //*****************************************************************************
 239 #define I2C_FIFO_CFG_TX_MASTER  0x00000000
 240 #define I2C_FIFO_CFG_TX_SLAVE   0x00008000
 241 #define I2C_FIFO_CFG_RX_MASTER  0x00000000
 242 #define I2C_FIFO_CFG_RX_SLAVE   0x80000000
 243 #define I2C_FIFO_CFG_TX_MASTER_DMA                                            \
 244                                 0x00002000
 245 #define I2C_FIFO_CFG_TX_SLAVE_DMA                                             \
 246                                 0x0000a000
 247 #define I2C_FIFO_CFG_RX_MASTER_DMA                                            \
 248                                 0x20000000
 249 #define I2C_FIFO_CFG_RX_SLAVE_DMA                                             \
 250                                 0xa0000000
 251 #define I2C_FIFO_CFG_TX_NO_TRIG 0x00000000
 252 #define I2C_FIFO_CFG_TX_TRIG_1  0x00000001
 253 #define I2C_FIFO_CFG_TX_TRIG_2  0x00000002
 254 #define I2C_FIFO_CFG_TX_TRIG_3  0x00000003
 255 #define I2C_FIFO_CFG_TX_TRIG_4  0x00000004
 256 #define I2C_FIFO_CFG_TX_TRIG_5  0x00000005
 257 #define I2C_FIFO_CFG_TX_TRIG_6  0x00000006
 258 #define I2C_FIFO_CFG_TX_TRIG_7  0x00000007
 259 #define I2C_FIFO_CFG_TX_TRIG_8  0x00000008
 260 #define I2C_FIFO_CFG_RX_NO_TRIG 0x00000000
 261 #define I2C_FIFO_CFG_RX_TRIG_1  0x00010000
 262 #define I2C_FIFO_CFG_RX_TRIG_2  0x00020000
 263 #define I2C_FIFO_CFG_RX_TRIG_3  0x00030000
 264 #define I2C_FIFO_CFG_RX_TRIG_4  0x00040000
 265 #define I2C_FIFO_CFG_RX_TRIG_5  0x00050000
 266 #define I2C_FIFO_CFG_RX_TRIG_6  0x00060000
 267 #define I2C_FIFO_CFG_RX_TRIG_7  0x00070000
 268 #define I2C_FIFO_CFG_RX_TRIG_8  0x00080000
 269
 270 //*****************************************************************************
 271 //
 272 // I2C FIFO status.
 273 //
 274 //*****************************************************************************
 275 #define I2C_FIFO_RX_BELOW_TRIG_LEVEL                                          \
 276                                 0x00040000
 277 #define I2C_FIFO_RX_FULL        0x00020000
 278 #define I2C_FIFO_RX_EMPTY       0x00010000
 279 #define I2C_FIFO_TX_BELOW_TRIG_LEVEL                                          \
 280                                 0x00000004
 281 #define I2C_FIFO_TX_FULL        0x00000002
 282 #define I2C_FIFO_TX_EMPTY       0x00000001
 283
 284 //*****************************************************************************
 285 //
 286 // Prototypes for the APIs.
 287 //
 288 //*****************************************************************************
 289 extern void I2CIntRegister(uint32_t ui32Base, void(pfnHandler)(void));
 290 extern void I2CIntUnregister(uint32_t ui32Base);
 291 extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
 292 extern void I2CTxFIFOFlush(uint32_t ui32Base);
 293 extern void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
 294 extern void I2CRxFIFOFlush(uint32_t ui32Base);
 295 extern uint32_t I2CFIFOStatus(uint32_t ui32Base);
 296 extern void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data);
 297 extern uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base,
 298                                           uint8_t ui8Data);
 299 extern uint32_t I2CFIFODataGet(uint32_t ui32Base);
 300 extern uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base,
 301                                           uint8_t *pui8Data);
 302 extern void I2CMasterBurstLengthSet(uint32_t ui32Base,
 303                                     uint8_t ui8Length);
 304 extern uint32_t I2CMasterBurstCountGet(uint32_t ui32Base);
 305 extern void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base,
 306                                            uint32_t ui32Config);
 307 extern void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config);
 308 extern void I2CSlaveFIFODisable(uint32_t ui32Base);
 309 extern bool I2CMasterBusBusy(uint32_t ui32Base);
 310 extern bool I2CMasterBusy(uint32_t ui32Base);
 311 extern void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd);
 312 extern uint32_t I2CMasterDataGet(uint32_t ui32Base);
 313 extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data);
 314 extern void I2CMasterDisable(uint32_t ui32Base);
 315 extern void I2CMasterEnable(uint32_t ui32Base);
 316 extern uint32_t I2CMasterErr(uint32_t ui32Base);
 317 extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk,
 318                                 bool bFast);
 319 extern void I2CMasterIntClear(uint32_t ui32Base);
 320 extern void I2CMasterIntDisable(uint32_t ui32Base);
 321 extern void I2CMasterIntEnable(uint32_t ui32Base);
 322 extern bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked);
 323 extern void I2CMasterIntEnableEx(uint32_t ui32Base,
 324                                  uint32_t ui32IntFlags);
 325 extern void I2CMasterIntDisableEx(uint32_t ui32Base,
 326                                   uint32_t ui32IntFlags);
 327 extern uint32_t I2CMasterIntStatusEx(uint32_t ui32Base,
 328                                        bool bMasked);
 329 extern void I2CMasterIntClearEx(uint32_t ui32Base,
 330                                 uint32_t ui32IntFlags);
 331 extern void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value);
 332 extern void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable);
 333 extern void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK);
 334 extern uint32_t I2CMasterLineStateGet(uint32_t ui32Base);
 335 extern void I2CMasterSlaveAddrSet(uint32_t ui32Base,
 336                                   uint8_t ui8SlaveAddr,
 337                                   bool bReceive);
 338 extern uint32_t I2CSlaveDataGet(uint32_t ui32Base);
 339 extern void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data);
 340 extern void I2CSlaveDisable(uint32_t ui32Base);
 341 extern void I2CSlaveEnable(uint32_t ui32Base);
 342 extern void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr);
 343 extern void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum,
 344                                  uint8_t ui8SlaveAddr);
 345 extern void I2CSlaveIntClear(uint32_t ui32Base);
 346 extern void I2CSlaveIntDisable(uint32_t ui32Base);
 347 extern void I2CSlaveIntEnable(uint32_t ui32Base);
 348 extern void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
 349 extern void I2CSlaveIntDisableEx(uint32_t ui32Base,
 350                                  uint32_t ui32IntFlags);
 351 extern void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
 352 extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
 353 extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
 354                                       bool bMasked);
 355 extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
 356
 357 //*****************************************************************************
 358 //
 359 // Mark the end of the C bindings section for C++ compilers.
 360 //
 361 //*****************************************************************************
 362 #ifdef __cplusplus
 363 }
 364 #endif
 365
 366 #endif // __DRIVERLIB_I2C_H__